intel-ixp42x-iomega-nas100d.dts 3.1 KB

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  1. // SPDX-License-Identifier: ISC
  2. /*
  3. * Device Tree file for Iomega NAS 100D
  4. */
  5. /dts-v1/;
  6. #include "intel-ixp42x.dtsi"
  7. #include <dt-bindings/input/input.h>
  8. / {
  9. model = "Iomega NAS 100D";
  10. compatible = "iom,nas-100d", "intel,ixp42x";
  11. #address-cells = <1>;
  12. #size-cells = <1>;
  13. memory@0 {
  14. /* 64 MB SDRAM */
  15. device_type = "memory";
  16. reg = <0x00000000 0x4000000>;
  17. };
  18. chosen {
  19. bootargs = "console=ttyS0,115200n8 root=/dev/sda1 rw rootwait";
  20. stdout-path = "uart0:115200n8";
  21. };
  22. aliases {
  23. serial0 = &uart0;
  24. };
  25. leds {
  26. compatible = "gpio-leds";
  27. led-wlan {
  28. label = "nas100d:red:wlan";
  29. gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
  30. default-state = "on";
  31. /* We don't have WLAN trigger in the kernel (yet) */
  32. linux,default-trigger = "netdev";
  33. };
  34. led-disk {
  35. label = "nas100d:red:disk";
  36. gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
  37. default-state = "on";
  38. linux,default-trigger = "disk-activity";
  39. };
  40. led-power {
  41. label = "nas100d:red:power";
  42. gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
  43. default-state = "on";
  44. linux,default-trigger = "heartbeat";
  45. };
  46. };
  47. gpio_keys {
  48. compatible = "gpio-keys";
  49. button-power {
  50. wakeup-source;
  51. linux,code = <KEY_POWER>;
  52. label = "power";
  53. gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
  54. };
  55. button-reset {
  56. wakeup-source;
  57. linux,code = <KEY_ESC>;
  58. label = "reset";
  59. gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
  60. };
  61. };
  62. i2c {
  63. compatible = "i2c-gpio";
  64. sda-gpios = <&gpio0 5 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
  65. scl-gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
  66. #address-cells = <1>;
  67. #size-cells = <0>;
  68. rtc@51 {
  69. compatible = "nxp,pcf8563";
  70. reg = <0x51>;
  71. };
  72. };
  73. gpio-poweroff {
  74. compatible = "gpio-poweroff";
  75. gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
  76. timeout-ms = <5000>;
  77. };
  78. soc {
  79. bus@c4000000 {
  80. /* The first 16MB region at CS0 on the expansion bus */
  81. flash@0,0 {
  82. compatible = "intel,ixp4xx-flash", "cfi-flash";
  83. bank-width = <2>;
  84. /*
  85. * 8 MB of Flash in 0x20000 byte blocks
  86. * mapped in at CS0.
  87. */
  88. reg = <0 0x00000000 0x800000>;
  89. partitions {
  90. compatible = "redboot-fis";
  91. /* Eraseblock at 0x7e0000 */
  92. fis-index-block = <0x3f>;
  93. };
  94. };
  95. };
  96. pci@c0000000 {
  97. status = "ok";
  98. /*
  99. * Taken from NAS 100D PCI boardfile (nas100d-pci.c)
  100. * We have slots (IDSEL) 1, 2 and 3 and pins 1, 2 and 3.
  101. */
  102. #interrupt-cells = <1>;
  103. interrupt-map-mask = <0xf800 0 0 7>;
  104. interrupt-map =
  105. /* IDSEL 1 */
  106. <0x0800 0 0 1 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 1 is irq 11 */
  107. /* IDSEL 2 */
  108. <0x1000 0 0 1 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 2 is irq 10 */
  109. /* IDSEL 3 */
  110. <0x1800 0 0 1 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 3 is irq 9 */
  111. <0x1800 0 0 2 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 3 is irq 8 */
  112. <0x1800 0 0 3 &gpio0 7 IRQ_TYPE_LEVEL_LOW>; /* INT C on slot 3 is irq 7 */
  113. };
  114. ethernet@c8009000 {
  115. status = "ok";
  116. queue-rx = <&qmgr 3>;
  117. queue-txready = <&qmgr 20>;
  118. phy-mode = "rgmii";
  119. phy-handle = <&phy0>;
  120. mdio {
  121. #address-cells = <1>;
  122. #size-cells = <0>;
  123. phy0: ethernet-phy@0 {
  124. reg = <0>;
  125. };
  126. };
  127. };
  128. };
  129. };