integratorap-im-pd1.dts 6.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Device Tree for the ARM Integrator/AP platform
  4. * with the IM-PD1 example logical module mounted.
  5. */
  6. #include "integratorap.dts"
  7. / {
  8. model = "ARM Integrator/AP with IM-PD1";
  9. compatible = "arm,integrator-ap";
  10. reserved-memory {
  11. #address-cells = <1>;
  12. #size-cells = <1>;
  13. ranges;
  14. impd1_ram: vram@c2000000 {
  15. /* 1 MB of designated video RAM on the IM-PD1 */
  16. compatible = "shared-dma-pool";
  17. reg = <0xc2000000 0x00100000>;
  18. no-map;
  19. };
  20. };
  21. };
  22. &lm0 {
  23. syscon@0 {
  24. compatible = "arm,im-pd1-syscon", "syscon";
  25. reg = <0x00000000 0x1000>;
  26. ranges;
  27. #address-cells = <1>;
  28. #size-cells = <1>;
  29. vco1: clock-controller@0 {
  30. compatible = "arm,impd1-vco1";
  31. reg = <0x00 0x04>;
  32. #clock-cells = <0>;
  33. lock-offset = <0x08>;
  34. vco-offset = <0x00>;
  35. clocks = <&sysclk>;
  36. clock-output-names = "IM-PD1-VCO1";
  37. };
  38. vco2: clock-controller@4 {
  39. compatible = "arm,impd1-vco2";
  40. reg = <0x04 0x04>;
  41. #clock-cells = <0>;
  42. lock-offset = <0x08>;
  43. vco-offset = <0x04>;
  44. clocks = <&sysclk>;
  45. clock-output-names = "IM-PD1-VCO2";
  46. };
  47. };
  48. /* Also used for the Smart Card Interface SCI */
  49. impd1_uartclk: clock@1_4 {
  50. compatible = "fixed-factor-clock";
  51. #clock-cells = <0>;
  52. clock-div = <4>;
  53. clock-mult = <1>;
  54. clocks = <&vco2>;
  55. clock-output-names = "VCO2_DIV4";
  56. };
  57. /* For the SSP the clock is divided by 64 */
  58. impd1_sspclk: clock@1_64 {
  59. compatible = "fixed-factor-clock";
  60. #clock-cells = <0>;
  61. clock-div = <64>;
  62. clock-mult = <1>;
  63. clocks = <&vco2>;
  64. clock-output-names = "VCO2_DIV64";
  65. };
  66. /* Fixed regulator for the MMC */
  67. impd1_3v3: regulator {
  68. compatible = "regulator-fixed";
  69. regulator-name = "3V3";
  70. regulator-min-microvolt = <3300000>;
  71. regulator-max-microvolt = <3300000>;
  72. regulator-always-on;
  73. };
  74. /* Push buttons on the IM-PD1 */
  75. gpio_keys {
  76. compatible = "gpio-keys";
  77. #address-cells = <1>;
  78. #size-cells = <0>;
  79. button@0 {
  80. debounce-interval = <50>;
  81. linux,code = <KEY_UP>;
  82. label = "UP";
  83. gpios = <&impd1_gpio1 0 GPIO_ACTIVE_HIGH>;
  84. };
  85. button@1 {
  86. debounce-interval = <50>;
  87. linux,code = <KEY_DOWN>;
  88. label = "DOWN";
  89. gpios = <&impd1_gpio1 1 GPIO_ACTIVE_HIGH>;
  90. };
  91. button@2 {
  92. debounce-interval = <50>;
  93. linux,code = <KEY_LEFT>;
  94. label = "LEFT";
  95. gpios = <&impd1_gpio1 2 GPIO_ACTIVE_HIGH>;
  96. };
  97. button@3 {
  98. debounce-interval = <50>;
  99. linux,code = <KEY_RIGHT>;
  100. label = "UP";
  101. gpios = <&impd1_gpio1 3 GPIO_ACTIVE_HIGH>;
  102. };
  103. button@4 {
  104. debounce-interval = <50>;
  105. linux,code = <KEY_ESC>;
  106. label = "ESC";
  107. gpios = <&impd1_gpio1 4 GPIO_ACTIVE_HIGH>;
  108. };
  109. button@5 {
  110. debounce-interval = <50>;
  111. linux,code = <KEY_ENTER>;
  112. label = "ENTER";
  113. gpios = <&impd1_gpio1 5 GPIO_ACTIVE_HIGH>;
  114. };
  115. };
  116. bridge {
  117. compatible = "ti,ths8134b", "ti,ths8134";
  118. #address-cells = <1>;
  119. #size-cells = <0>;
  120. ports {
  121. #address-cells = <1>;
  122. #size-cells = <0>;
  123. port@0 {
  124. reg = <0>;
  125. vga_bridge_in: endpoint {
  126. remote-endpoint = <&clcd_pads_vga_dac>;
  127. };
  128. };
  129. port@1 {
  130. reg = <1>;
  131. vga_bridge_out: endpoint {
  132. remote-endpoint = <&vga_con_in>;
  133. };
  134. };
  135. };
  136. };
  137. vga {
  138. compatible = "vga-connector";
  139. port {
  140. vga_con_in: endpoint {
  141. remote-endpoint = <&vga_bridge_out>;
  142. };
  143. };
  144. };
  145. uart@100000 {
  146. compatible = "arm,pl011", "arm,primecell";
  147. reg = <0x00100000 0x1000>;
  148. interrupts-extended = <&impd1_vic 1>;
  149. clocks = <&impd1_uartclk>, <&sysclk>;
  150. clock-names = "uartclk", "apb_pclk";
  151. };
  152. uart@200000 {
  153. compatible = "arm,pl011", "arm,primecell";
  154. reg = <0x00200000 0x1000>;
  155. interrupts-extended = <&impd1_vic 2>;
  156. clocks = <&impd1_uartclk>, <&sysclk>;
  157. clock-names = "uartclk", "apb_pclk";
  158. };
  159. spi@300000 {
  160. compatible = "arm,pl022", "arm,primecell";
  161. reg = <0x00300000 0x1000>;
  162. interrupts-extended = <&impd1_vic 3>;
  163. clocks = <&impd1_sspclk>, <&sysclk>;
  164. clock-names = "sspclk", "apb_pclk";
  165. };
  166. impd1_gpio0: gpio@400000 {
  167. compatible = "arm,pl061", "arm,primecell";
  168. reg = <0x00400000 0x1000>;
  169. gpio-controller;
  170. #gpio-cells = <2>;
  171. interrupt-controller;
  172. #interrupt-cells = <2>;
  173. interrupts-extended = <&impd1_vic 4>;
  174. clocks = <&sysclk>;
  175. clock-names = "apb_pclk";
  176. };
  177. impd1_gpio1: gpio@500000 {
  178. compatible = "arm,pl061", "arm,primecell";
  179. reg = <0x00500000 0x1000>;
  180. gpio-controller;
  181. #gpio-cells = <2>;
  182. interrupt-controller;
  183. #interrupt-cells = <2>;
  184. interrupts-extended = <&impd1_vic 5>;
  185. clocks = <&sysclk>;
  186. clock-names = "apb_pclk";
  187. };
  188. rtc@600000 {
  189. compatible = "arm,pl030", "arm,primecell";
  190. reg = <0x00600000 0x1000>;
  191. interrupts-extended = <&impd1_vic 6>;
  192. clocks = <&sysclk>;
  193. clock-names = "apb_pclk";
  194. };
  195. mmc@700000 {
  196. compatible = "arm,pl181", "arm,primecell";
  197. reg = <0x00700000 0x1000>;
  198. interrupts-extended = <&impd1_vic 7>,
  199. <&impd1_vic 8>;
  200. clocks = <&sysclk>, <&sysclk>;
  201. clock-names = "mclk", "apb_pclk";
  202. bus-width = <1>;
  203. max-frequency = <515633>;
  204. vmmc-supply = <&impd1_3v3>;
  205. wp-gpios = <&impd1_gpio0 3 GPIO_ACTIVE_HIGH>;
  206. cd-gpios = <&impd1_gpio0 4 GPIO_ACTIVE_LOW>;
  207. };
  208. aaci@800000 {
  209. compatible = "arm,pl041", "arm,primecell";
  210. reg = <0x00800000 0x1000>;
  211. interrupts-extended = <&impd1_vic 9>;
  212. clocks = <&sysclk>;
  213. clock-names = "apb_pclk";
  214. };
  215. display@1000000 {
  216. compatible = "arm,pl110", "arm,primecell";
  217. reg = <0x01000000 0x1000>;
  218. interrupts-extended = <&impd1_vic 11>;
  219. clocks = <&vco1>, <&sysclk>;
  220. clock-names = "clcdclk", "apb_pclk";
  221. /* 640x480 16bpp @ 25.175MHz is 36827428 bytes/s */
  222. max-memory-bandwidth = <40000000>;
  223. memory-region = <&impd1_ram>;
  224. dma-ranges;
  225. port@0 {
  226. #address-cells = <1>;
  227. #size-cells = <0>;
  228. clcd_pads_vga_dac: endpoint@0 {
  229. reg = <0>;
  230. remote-endpoint = <&vga_bridge_in>;
  231. arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
  232. };
  233. };
  234. };
  235. impd1_vic: interrupt-controller@3000000 {
  236. compatible = "arm,pl192-vic";
  237. interrupt-controller;
  238. #interrupt-cells = <1>;
  239. reg = <0x03000000 0x1000>;
  240. /* Valid interrupts, 0-9 and 11 */
  241. valid-mask = <0x00000bff>;
  242. /* LM site 0 has IRQ 9 on the PIC */
  243. interrupts-extended = <&pic 9>;
  244. };
  245. };