imxrt1050-evk.dts 1.6 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright (C) 2019
  4. * Author(s): Giulio Benetti <[email protected]>
  5. */
  6. /dts-v1/;
  7. #include "imxrt1050.dtsi"
  8. #include "imxrt1050-pinfunc.h"
  9. / {
  10. model = "NXP IMXRT1050-evk board";
  11. compatible = "fsl,imxrt1050-evk", "fsl,imxrt1050";
  12. chosen {
  13. stdout-path = &lpuart1;
  14. };
  15. aliases {
  16. gpio0 = &gpio1;
  17. gpio1 = &gpio2;
  18. gpio2 = &gpio3;
  19. gpio3 = &gpio4;
  20. gpio4 = &gpio5;
  21. mmc0 = &usdhc1;
  22. serial0 = &lpuart1;
  23. };
  24. memory@80000000 {
  25. device_type = "memory";
  26. reg = <0x80000000 0x2000000>;
  27. };
  28. };
  29. &lpuart1 {
  30. pinctrl-names = "default";
  31. pinctrl-0 = <&pinctrl_lpuart1>;
  32. status = "okay";
  33. };
  34. &iomuxc {
  35. pinctrl-names = "default";
  36. pinctrl_lpuart1: lpuart1grp {
  37. fsl,pins = <
  38. MXRT1050_IOMUXC_GPIO_AD_B0_12_LPUART1_TXD 0xf1
  39. MXRT1050_IOMUXC_GPIO_AD_B0_13_LPUART1_RXD 0xf1
  40. >;
  41. };
  42. pinctrl_usdhc0: usdhc0grp {
  43. fsl,pins = <
  44. MXRT1050_IOMUXC_GPIO_B1_12_USDHC1_CD_B 0x1B000
  45. MXRT1050_IOMUXC_GPIO_B1_14_USDHC1_VSELECT 0xB069
  46. MXRT1050_IOMUXC_GPIO_SD_B0_00_USDHC1_CMD 0x17061
  47. MXRT1050_IOMUXC_GPIO_SD_B0_01_USDHC1_CLK 0x17061
  48. MXRT1050_IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3 0x17061
  49. MXRT1050_IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2 0x17061
  50. MXRT1050_IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1 0x17061
  51. MXRT1050_IOMUXC_GPIO_SD_B0_02_USDHC1_DATA0 0x17061
  52. >;
  53. };
  54. };
  55. &usdhc1 {
  56. pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
  57. pinctrl-0 = <&pinctrl_usdhc0>;
  58. pinctrl-1 = <&pinctrl_usdhc0>;
  59. pinctrl-2 = <&pinctrl_usdhc0>;
  60. pinctrl-3 = <&pinctrl_usdhc0>;
  61. cd-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
  62. status = "okay";
  63. };