imx6ull.dtsi 2.1 KB

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  1. // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2. //
  3. // Copyright 2016 Freescale Semiconductor, Inc.
  4. #include "imx6ul.dtsi"
  5. #include "imx6ull-pinfunc.h"
  6. #include "imx6ull-pinfunc-snvs.h"
  7. /* Delete UART8 in AIPS-1 (i.MX6UL specific) */
  8. /delete-node/ &uart8;
  9. /* Delete CAAM node in AIPS-2 (i.MX6UL specific) */
  10. /delete-node/ &crypto;
  11. &cpu0 {
  12. clock-frequency = <900000000>;
  13. operating-points = <
  14. /* kHz uV */
  15. 900000 1275000
  16. 792000 1225000
  17. 528000 1175000
  18. 396000 1025000
  19. 198000 950000
  20. >;
  21. fsl,soc-operating-points = <
  22. /* KHz uV */
  23. 900000 1250000
  24. 792000 1175000
  25. 528000 1175000
  26. 396000 1175000
  27. 198000 1175000
  28. >;
  29. };
  30. &ocotp {
  31. compatible = "fsl,imx6ull-ocotp", "syscon";
  32. };
  33. &pxp {
  34. compatible = "fsl,imx6ull-pxp";
  35. interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
  36. <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
  37. };
  38. &usdhc1 {
  39. compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc";
  40. };
  41. &usdhc2 {
  42. compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc";
  43. };
  44. / {
  45. soc: soc {
  46. aips3: bus@2200000 {
  47. compatible = "fsl,aips-bus", "simple-bus";
  48. #address-cells = <1>;
  49. #size-cells = <1>;
  50. reg = <0x02200000 0x100000>;
  51. ranges;
  52. dcp: crypto@2280000 {
  53. compatible = "fsl,imx6ull-dcp", "fsl,imx28-dcp";
  54. reg = <0x02280000 0x4000>;
  55. interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
  56. <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
  57. <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
  58. clocks = <&clks IMX6ULL_CLK_DCP_CLK>;
  59. clock-names = "dcp";
  60. };
  61. rngb: rng@2284000 {
  62. compatible = "fsl,imx6ull-rngb", "fsl,imx25-rngb";
  63. reg = <0x02284000 0x4000>;
  64. interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
  65. clocks = <&clks IMX6UL_CLK_DUMMY>;
  66. };
  67. iomuxc_snvs: iomuxc-snvs@2290000 {
  68. compatible = "fsl,imx6ull-iomuxc-snvs";
  69. reg = <0x02290000 0x4000>;
  70. };
  71. uart8: serial@2288000 {
  72. compatible = "fsl,imx6ul-uart",
  73. "fsl,imx6q-uart";
  74. reg = <0x02288000 0x4000>;
  75. interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
  76. clocks = <&clks IMX6UL_CLK_UART8_IPG>,
  77. <&clks IMX6UL_CLK_UART8_SERIAL>;
  78. clock-names = "ipg", "per";
  79. status = "disabled";
  80. };
  81. };
  82. };
  83. };