imx6ull-phytec-tauri.dtsi 12 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright (C) 2021 PHYTEC Messtechnik GmbH
  4. * Author: Alexander Bauer <[email protected]>
  5. */
  6. /dts-v1/;
  7. #include "imx6ull.dtsi"
  8. #include "imx6ull-phytec-phycore-som.dtsi"
  9. / {
  10. model = "PHYTEC phyGate-Tauri i.MX6 UltraLite";
  11. compatible = "phytec,imx6ull-phygate-tauri",
  12. "phytec,imx6ull-pcl063", "fsl,imx6ull";
  13. aliases {
  14. rtc0 = &i2c_rtc;
  15. rtc1 = &snvs_rtc;
  16. };
  17. gpio_keys: gpio-keys {
  18. compatible = "gpio-key";
  19. pinctrl-names = "default";
  20. pinctrl-0 = <&pinctrl_gpio_keys>;
  21. key {
  22. label = "KEY-A";
  23. gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
  24. linux,code = <KEY_A>;
  25. wakeup-source;
  26. };
  27. };
  28. reg_adc1_vref_3v3: regulator-vref-3v3 {
  29. compatible = "regulator-fixed";
  30. regulator-name = "vref-3v3";
  31. regulator-min-microvolt = <3300000>;
  32. regulator-max-microvolt = <3300000>;
  33. };
  34. reg_s25fl064_hold: regulator-s25fl064-hold {
  35. pinctrl-names = "default";
  36. pinctrl-0 = <&pinctrl_s25fl064_hold>;
  37. compatible = "regulator-fixed";
  38. regulator-name = "s25fl064_hold";
  39. regulator-min-microvolt = <3300000>;
  40. regulator-max-microvolt = <3300000>;
  41. gpio = <&gpio3 17 GPIO_ACTIVE_HIGH>;
  42. enable-active-high;
  43. regulator-always-on;
  44. };
  45. reg_usb_hub_vbus: regulator-hub-otg1-vbus {
  46. pinctrl-names = "default";
  47. pinctrl-0 = <&pinctrl_usbhubpwr>;
  48. compatible = "regulator-fixed";
  49. regulator-name = "usb_hub_vbus";
  50. regulator-min-microvolt = <3300000>;
  51. regulator-max-microvolt = <3300000>;
  52. gpio = <&gpio5 5 GPIO_ACTIVE_HIGH>;
  53. enable-active-high;
  54. regulator-always-on;
  55. };
  56. reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
  57. pinctrl-names = "default";
  58. pinctrl-0 = <&pinctrl_usbotg1pwr>;
  59. compatible = "regulator-fixed";
  60. regulator-name = "usb_otg1_vbus";
  61. regulator-min-microvolt = <3300000>;
  62. regulator-max-microvolt = <3300000>;
  63. gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
  64. enable-active-high;
  65. regulator-always-on;
  66. };
  67. user_leds: user-leds {
  68. compatible = "gpio-leds";
  69. pinctrl-names = "default";
  70. pinctrl-0 = <&pinctrl_user_leds>,
  71. <&pinctrl_user_leds_snvs>;
  72. user-led1 {
  73. label = "yellow";
  74. gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
  75. linux,default-trigger = "off";
  76. };
  77. user-led2 {
  78. label = "red";
  79. gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>;
  80. linux,default-trigger = "off";
  81. };
  82. };
  83. };
  84. &can1 {
  85. pinctrl-names = "default";
  86. pinctrl-0 = <&pinctrl_flexcan1>;
  87. status = "okay";
  88. };
  89. &can2 {
  90. pinctrl-names = "default";
  91. pinctrl-0 = <&pinctrl_flexcan2>;
  92. status = "okay";
  93. };
  94. &ecspi1 {
  95. #address-cells = <1>;
  96. #size-cells = <0>;
  97. pinctrl-names = "default";
  98. pinctrl-0 = <&pinctrl_ecspi1>,
  99. <&pinctrl_ecspi1_cs>;
  100. cs-gpios = <&gpio3 26 GPIO_ACTIVE_LOW>,
  101. <&gpio3 10 GPIO_ACTIVE_LOW>,
  102. <&gpio3 11 GPIO_ACTIVE_LOW>;
  103. status = "okay";
  104. tpm_tis: tpm@1 {
  105. pinctrl-names = "default";
  106. pinctrl-0 = <&pinctrl_tpm>;
  107. compatible = "tcg,tpm_tis-spi";
  108. reg = <1>;
  109. spi-max-frequency = <20000000>;
  110. interrupt-parent = <&gpio5>;
  111. interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
  112. };
  113. s25fl064: flash@2 {
  114. #address-cells = <1>;
  115. #size-cells = <1>;
  116. compatible = " jedec,spi-nor";
  117. reg = <2>;
  118. spi-max-frequency = <40000000>;
  119. m25p,fast-read;
  120. status = "disabled";
  121. };
  122. };
  123. &ecspi3 {
  124. pinctrl-names = "default";
  125. pinctrl-0 = <&pinctrl_ecspi3>;
  126. cs-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
  127. dmas = <&sdma 7 8 0>,
  128. <&sdma 8 8 0>;
  129. dma-names = "rx", "tx";
  130. status = "okay";
  131. };
  132. &ethphy1 {
  133. status = "okay";
  134. };
  135. &fec1 {
  136. status = "okay";
  137. };
  138. &fec2 {
  139. pinctrl-names = "default";
  140. pinctrl-0 = <&pinctrl_enet2>;
  141. phy-mode = "rmii";
  142. phy-handle = <&ethphy2>;
  143. status = "okay";
  144. };
  145. &i2c1 {
  146. status = "okay";
  147. tmp102: tmp@49 {
  148. compatible = "ti,tmp102";
  149. reg = <0x49>;
  150. pinctrl-names = "default";
  151. pinctrl-0 = <&pinctrl_tempsense>;
  152. interrupt-parent = <&gpio5>;
  153. interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
  154. #thermal-sensor-cells = <1>;
  155. };
  156. i2c_rtc: rtc@68 {
  157. pinctrl-names = "default";
  158. pinctrl-0 = <&pinctrl_rtc_int>;
  159. compatible = "microcrystal,rv4162";
  160. reg = <0x68>;
  161. interrupt-parent = <&gpio5>;
  162. interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
  163. };
  164. };
  165. &i2c2 {
  166. pinctrl-names = "default", "gpio";
  167. pinctrl-0 = <&pinctrl_i2c2>;
  168. pinctrl-1 = <&pinctrl_i2c2_gpio>;
  169. sda-gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  170. scl-gpios = <&gpio1 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  171. status = "okay";
  172. };
  173. &i2c3 {
  174. pinctrl-names = "default", "gpio";
  175. pinctrl-0 = <&pinctrl_i2c3>;
  176. pinctrl-1 = <&pinctrl_i2c3_gpio>;
  177. sda-gpios = <&gpio3 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  178. scl-gpios = <&gpio3 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  179. status = "okay";
  180. };
  181. &i2c4 {
  182. pinctrl-names = "default", "gpio";
  183. pinctrl-0 = <&pinctrl_i2c4>;
  184. pinctrl-1 = <&pinctrl_i2c4_gpio>;
  185. sda-gpios = <&gpio3 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  186. scl-gpios = <&gpio3 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  187. status = "okay";
  188. };
  189. &mdio {
  190. ethphy2: ethernet-phy@2 {
  191. reg = <2>;
  192. micrel,led-mode = <1>;
  193. clocks = <&clks IMX6UL_CLK_ENET2_REF>;
  194. clock-names = "rmii-ref";
  195. status = "okay";
  196. };
  197. };
  198. &pwm3 {
  199. pinctrl-names = "default";
  200. pinctrl-0 = <&pinctrl_pwm3>;
  201. status = "okay";
  202. };
  203. &pwm6 {
  204. pinctrl-names = "default";
  205. pinctrl-0 = <&pinctrl_pwm6>;
  206. status = "okay";
  207. };
  208. &pwm7 {
  209. pinctrl-names = "default";
  210. pinctrl-0 = <&pinctrl_pwm7>;
  211. status = "okay";
  212. };
  213. &pwm8 {
  214. pinctrl-names = "default";
  215. pinctrl-0 = <&pinctrl_pwm8>;
  216. status = "okay";
  217. };
  218. &uart3 {
  219. pinctrl-names = "default";
  220. pinctrl-0 = <&pinctrl_uart3>;
  221. status = "okay";
  222. };
  223. /* UART4 * RS485 */
  224. &uart4 {
  225. pinctrl-names = "default";
  226. pinctrl-0 = <&pinctrl_uart4>;
  227. rts-gpios = <&gpio3 2 GPIO_ACTIVE_HIGH>;
  228. rs485-rts-active-high;
  229. linux,rs485-enabled-at-boot-time;
  230. status = "okay";
  231. };
  232. /* UART5 * RS232 */
  233. &uart5 {
  234. pinctrl-names = "default";
  235. pinctrl-0 = <&pinctrl_uart5>;
  236. uart-has-rtscts;
  237. status = "okay";
  238. };
  239. &uart7 {
  240. pinctrl-names = "default";
  241. pinctrl-0 = <&pinctrl_uart7>;
  242. status = "okay";
  243. };
  244. /* USB */
  245. &usbotg1 {
  246. pinctrl-names = "default";
  247. pinctrl-0 = <&pinctrl_usb_otg1>;
  248. vbus-supply = <&reg_usb_otg1_vbus>;
  249. dr_mode = "host";
  250. disable-over-current;
  251. status = "okay";
  252. };
  253. &usbotg2 {
  254. vbus-supply = <&reg_usb_hub_vbus>;
  255. disable-over-current;
  256. dr_mode = "host";
  257. status = "okay";
  258. };
  259. &usdhc1 {
  260. pinctrl-names = "default", "state_100mhz", "state_200mhz";
  261. pinctrl-0 = <&pinctrl_usdhc1>;
  262. pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
  263. pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
  264. cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
  265. no-1-8-v;
  266. keep-power-in-suspend;
  267. wakeup-source;
  268. status = "okay";
  269. };
  270. &usdhc2 {
  271. status = "disabled";
  272. };
  273. &iomuxc_snvs {
  274. pinctrl_rtc_int: rtcintgrp {
  275. fsl,pins = <
  276. MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x17059
  277. >;
  278. };
  279. pinctrl_stmpe: stmpegrp {
  280. fsl,pins = <
  281. MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x17059
  282. >;
  283. };
  284. pinctrl_tempsense: tempsensegrp {
  285. fsl,pins = <
  286. MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x17059
  287. >;
  288. };
  289. pinctrl_tpm: tpmgrp {
  290. fsl,pins = <
  291. MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x17059
  292. >;
  293. };
  294. pinctrl_usbhubpwr: usbhubpwrgrp {
  295. fsl,pins = <
  296. MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x17059
  297. >;
  298. };
  299. pinctrl_user_leds_snvs: user_ledsgrp {
  300. fsl,pins = <
  301. MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x79
  302. >;
  303. };
  304. };
  305. &iomuxc {
  306. pinctrl_gpio: gpiogrp {
  307. fsl,pins = <
  308. MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0x17059 /* nUART_MUX_RS232 */
  309. MX6UL_PAD_CSI_DATA04__GPIO4_IO25 0x17059 /* nUART_MUX_DUAL_RX_TX */
  310. >;
  311. };
  312. pinctrl_gpio_keys: gpiokeysgrp {
  313. fsl,pins = <
  314. MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x79
  315. >;
  316. };
  317. pinctrl_ecspi3: ecspi3grp {
  318. fsl,pins = <
  319. MX6UL_PAD_UART2_RX_DATA__ECSPI3_SCLK 0x100b1
  320. MX6UL_PAD_UART2_RTS_B__ECSPI3_MISO 0x100b1
  321. MX6UL_PAD_UART2_CTS_B__ECSPI3_MOSI 0x100b1
  322. MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20 0x10b0
  323. >;
  324. };
  325. pinctrl_ecspi1: ecspi1grp {
  326. fsl,pins = <
  327. MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK 0x100b1
  328. MX6UL_PAD_LCD_DATA23__ECSPI1_MISO 0x100b1
  329. MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI 0x100b1
  330. >;
  331. };
  332. pinctrl_ecspi1_cs: ecspi1csgrp {
  333. fsl,pins = <
  334. MX6UL_PAD_LCD_DATA21__GPIO3_IO26 0x10b0
  335. MX6UL_PAD_LCD_DATA05__GPIO3_IO10 0x10b0
  336. MX6UL_PAD_LCD_DATA06__GPIO3_IO11 0x10b0
  337. >;
  338. };
  339. pinctrl_enet2: enet2grp {
  340. fsl,pins = <
  341. MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
  342. MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
  343. MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
  344. MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
  345. MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b010
  346. MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b010
  347. MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b010
  348. MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b010
  349. >;
  350. };
  351. pinctrl_flexcan1: flexcan1grp {
  352. fsl,pins = <
  353. MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x0b0b0
  354. MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x0b0b0
  355. >;
  356. };
  357. pinctrl_flexcan2: flexcan2grp {
  358. fsl,pins = <
  359. MX6UL_PAD_LCD_DATA10__FLEXCAN2_TX 0x0b0b0
  360. MX6UL_PAD_LCD_DATA11__FLEXCAN2_RX 0x0b0b0
  361. >;
  362. };
  363. princtrl_flexcan2_en: flexcan2engrp {
  364. fsl,pins = <
  365. MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x17059
  366. >;
  367. };
  368. pinctrl_i2c2: i2c2grp {
  369. fsl,pins = <
  370. MX6UL_PAD_GPIO1_IO00__I2C2_SCL 0xb0
  371. MX6UL_PAD_GPIO1_IO01__I2C2_SDA 0xb0
  372. >;
  373. };
  374. pinctrl_i2c2_gpio: i2c2gpiogrp {
  375. fsl,pins = <
  376. MX6UL_PAD_GPIO1_IO00__GPIO1_IO00 0xb0
  377. MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
  378. >;
  379. };
  380. pinctrl_i2c3: i2c3grp {
  381. fsl,pins = <
  382. MX6UL_PAD_LCD_DATA01__I2C3_SCL 0xb0
  383. MX6UL_PAD_LCD_DATA00__I2C3_SDA 0xb0
  384. >;
  385. };
  386. pinctrl_i2c3_gpio: i2c3gpiogrp {
  387. fsl,pins = <
  388. MX6UL_PAD_LCD_DATA01__GPIO3_IO06 0xb0
  389. MX6UL_PAD_LCD_DATA00__GPIO3_IO05 0xb0
  390. >;
  391. };
  392. pinctrl_i2c4: i2c4grp {
  393. fsl,pins = <
  394. MX6UL_PAD_LCD_DATA03__I2C4_SCL 0xb0
  395. MX6UL_PAD_LCD_DATA02__I2C4_SDA 0xb0
  396. >;
  397. };
  398. pinctrl_i2c4_gpio: i2c4gpiogrp {
  399. fsl,pins = <
  400. MX6UL_PAD_LCD_DATA03__GPIO3_IO08 0xb0
  401. MX6UL_PAD_LCD_DATA02__GPIO3_IO07 0xb0
  402. >;
  403. };
  404. pinctrl_pwm3: pwm3grp {
  405. fsl,pins = <
  406. MX6UL_PAD_GPIO1_IO04__PWM3_OUT 0x0b0b0
  407. >;
  408. };
  409. pinctrl_pwm6: pwm6grp {
  410. fsl,pins = <
  411. MX6UL_PAD_JTAG_TDI__PWM6_OUT 0x0b0b0
  412. >;
  413. };
  414. pinctrl_pwm7: pwm7grp {
  415. fsl,pins = <
  416. MX6UL_PAD_JTAG_TCK__PWM7_OUT 0x0b0b0
  417. >;
  418. };
  419. pinctrl_pwm8: pwm8grp {
  420. fsl,pins = <
  421. MX6UL_PAD_JTAG_TRST_B__PWM8_OUT 0x0b0b0
  422. >;
  423. };
  424. pinctrl_s25fl064_hold: s25fl064holdgrp {
  425. fsl,pins = <
  426. MX6UL_PAD_LCD_DATA12__GPIO3_IO17 0x100b1
  427. >;
  428. };
  429. pinctrl_sai2: sai2grp {
  430. fsl,pins = <
  431. MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088
  432. MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088
  433. MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x11088
  434. MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x11088
  435. MX6UL_PAD_JTAG_TMS__SAI2_MCLK 0x17088
  436. >;
  437. };
  438. pinctrl_uart3: uart3grp {
  439. fsl,pins = <
  440. MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1
  441. MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1
  442. >;
  443. };
  444. pinctrl_uart4: uart4grp {
  445. fsl,pins = <
  446. MX6UL_PAD_LCD_CLK__UART4_DCE_TX 0x1b0b1
  447. MX6UL_PAD_LCD_ENABLE__UART4_DCE_RX 0x1b0b1
  448. MX6UL_PAD_LCD_HSYNC__GPIO3_IO02 0x1b0b1
  449. >;
  450. };
  451. pinctrl_uart5: uart5grp {
  452. fsl,pins = <
  453. MX6UL_PAD_UART5_TX_DATA__UART5_DCE_TX 0x1b0b1
  454. MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x1b0b1
  455. >;
  456. };
  457. pinctrl_uart7: uart7grp {
  458. fsl,pins = <
  459. MX6UL_PAD_LCD_DATA16__UART7_DCE_TX 0x1b0b1
  460. MX6UL_PAD_LCD_DATA17__UART7_DCE_RX 0x1b0b1
  461. >;
  462. };
  463. pinctrl_usb_otg1: usbotg1grp {
  464. fsl,pins = <
  465. MX6UL_PAD_CSI_DATA06__GPIO4_IO27 0x80
  466. >;
  467. };
  468. pinctrl_usbotg1pwr: usbotg1pwrgrp {
  469. fsl,pins = <
  470. MX6UL_PAD_CSI_DATA07__GPIO4_IO28 0x17059
  471. >;
  472. };
  473. pinctrl_usdhc1: usdhc1grp {
  474. fsl,pins = <
  475. MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
  476. MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
  477. MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
  478. MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
  479. MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
  480. MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
  481. MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059
  482. >;
  483. };
  484. pinctrl_usdhc1_100mhz: usdhc1100mhzgrp {
  485. fsl,pins = <
  486. MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
  487. MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
  488. MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
  489. MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
  490. MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
  491. MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
  492. >;
  493. };
  494. pinctrl_usdhc1_200mhz: usdhc1200mhzgrp {
  495. fsl,pins = <
  496. MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
  497. MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
  498. MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
  499. MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
  500. MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
  501. MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
  502. >;
  503. };
  504. pinctrl_user_leds: userledsgrp {
  505. fsl,pins = <
  506. MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x79
  507. >;
  508. };
  509. };