imx6sll-evk.dts 13 KB

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  1. // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2. /*
  3. * Copyright 2016 Freescale Semiconductor, Inc.
  4. * Copyright 2017-2018 NXP.
  5. *
  6. */
  7. /dts-v1/;
  8. #include <dt-bindings/gpio/gpio.h>
  9. #include <dt-bindings/input/input.h>
  10. #include "imx6sll.dtsi"
  11. / {
  12. model = "Freescale i.MX6SLL EVK Board";
  13. compatible = "fsl,imx6sll-evk", "fsl,imx6sll";
  14. chosen {
  15. stdout-path = &uart1;
  16. };
  17. memory@80000000 {
  18. device_type = "memory";
  19. reg = <0x80000000 0x80000000>;
  20. };
  21. backlight_display: backlight-display {
  22. compatible = "pwm-backlight";
  23. pwms = <&pwm1 0 5000000>;
  24. brightness-levels = <0 4 8 16 32 64 128 255>;
  25. default-brightness-level = <6>;
  26. status = "okay";
  27. };
  28. leds {
  29. compatible = "gpio-leds";
  30. pinctrl-names = "default";
  31. pinctrl-0 = <&pinctrl_led>;
  32. led-user {
  33. label = "debug";
  34. gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
  35. linux,default-trigger = "heartbeat";
  36. };
  37. };
  38. reg_usb_otg1_vbus: regulator-otg1-vbus {
  39. compatible = "regulator-fixed";
  40. pinctrl-names = "default";
  41. pinctrl-0 = <&pinctrl_usb_otg1_vbus>;
  42. regulator-name = "usb_otg1_vbus";
  43. regulator-min-microvolt = <5000000>;
  44. regulator-max-microvolt = <5000000>;
  45. gpio = <&gpio4 0 GPIO_ACTIVE_HIGH>;
  46. enable-active-high;
  47. };
  48. reg_usb_otg2_vbus: regulator-otg2-vbus {
  49. compatible = "regulator-fixed";
  50. pinctrl-names = "default";
  51. pinctrl-0 = <&pinctrl_usb_otg2_vbus>;
  52. regulator-name = "usb_otg2_vbus";
  53. regulator-min-microvolt = <5000000>;
  54. regulator-max-microvolt = <5000000>;
  55. gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>;
  56. enable-active-high;
  57. };
  58. reg_aud3v: regulator-aud3v {
  59. compatible = "regulator-fixed";
  60. regulator-name = "wm8962-supply-3v15";
  61. regulator-min-microvolt = <3150000>;
  62. regulator-max-microvolt = <3150000>;
  63. regulator-boot-on;
  64. };
  65. reg_aud4v: regulator-aud4v {
  66. compatible = "regulator-fixed";
  67. regulator-name = "wm8962-supply-4v2";
  68. regulator-min-microvolt = <4325000>;
  69. regulator-max-microvolt = <4325000>;
  70. regulator-boot-on;
  71. };
  72. reg_lcd_3v3: regulator-lcd-3v3 {
  73. compatible = "regulator-fixed";
  74. pinctrl-names = "default";
  75. pinctrl-0 = <&pinctrl_reg_lcd_3v3>;
  76. regulator-name = "lcd-3v3";
  77. gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>;
  78. enable-active-high;
  79. };
  80. reg_lcd_5v: regulator-lcd-5v {
  81. compatible = "regulator-fixed";
  82. regulator-name = "lcd-5v0";
  83. regulator-min-microvolt = <5000000>;
  84. regulator-max-microvolt = <5000000>;
  85. };
  86. reg_sd1_vmmc: regulator-sd1-vmmc {
  87. compatible = "regulator-fixed";
  88. pinctrl-names = "default";
  89. pinctrl-0 = <&pinctrl_reg_sd1_vmmc>;
  90. regulator-name = "SD1_SPWR";
  91. regulator-min-microvolt = <3000000>;
  92. regulator-max-microvolt = <3000000>;
  93. gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;
  94. enable-active-high;
  95. };
  96. reg_sd3_vmmc: regulator-sd3-vmmc {
  97. compatible = "regulator-fixed";
  98. pinctrl-names = "default";
  99. pinctrl-0 = <&pinctrl_reg_sd3_vmmc>;
  100. regulator-name = "SD3_WIFI";
  101. regulator-min-microvolt = <3000000>;
  102. regulator-max-microvolt = <3000000>;
  103. gpio = <&gpio4 4 GPIO_ACTIVE_HIGH>;
  104. enable-active-high;
  105. };
  106. panel {
  107. compatible = "sii,43wvf1g";
  108. backlight = <&backlight_display>;
  109. dvdd-supply = <&reg_lcd_3v3>;
  110. avdd-supply = <&reg_lcd_5v>;
  111. port {
  112. panel_in: endpoint {
  113. remote-endpoint = <&display_out>;
  114. };
  115. };
  116. };
  117. sound {
  118. compatible = "fsl,imx6sl-evk-wm8962", "fsl,imx-audio-wm8962";
  119. pinctrl-names = "default";
  120. pinctrl-0 = <&pinctrl_hp>;
  121. model = "wm8962-audio";
  122. audio-cpu = <&ssi2>;
  123. audio-codec = <&wm8962>;
  124. audio-routing =
  125. "Headphone Jack", "HPOUTL",
  126. "Headphone Jack", "HPOUTR",
  127. "Ext Spk", "SPKOUTL",
  128. "Ext Spk", "SPKOUTR",
  129. "AMIC", "MICBIAS",
  130. "IN3R", "AMIC";
  131. mux-int-port = <2>;
  132. mux-ext-port = <3>;
  133. hp-det-gpio = <&gpio4 24 GPIO_ACTIVE_LOW>;
  134. };
  135. };
  136. &audmux {
  137. pinctrl-names = "default";
  138. pinctrl-0 = <&pinctrl_audmux3>;
  139. status = "okay";
  140. };
  141. &cpu0 {
  142. arm-supply = <&sw1a_reg>;
  143. soc-supply = <&sw1c_reg>;
  144. };
  145. &i2c1 {
  146. clock-frequency = <100000>;
  147. pinctrl-names = "default";
  148. pinctrl-0 = <&pinctrl_i2c1>;
  149. status = "okay";
  150. pfuze100: pmic@8 {
  151. compatible = "fsl,pfuze100";
  152. reg = <0x08>;
  153. regulators {
  154. sw1a_reg: sw1ab {
  155. regulator-min-microvolt = <300000>;
  156. regulator-max-microvolt = <1875000>;
  157. regulator-boot-on;
  158. regulator-always-on;
  159. regulator-ramp-delay = <6250>;
  160. };
  161. sw1c_reg: sw1c {
  162. regulator-min-microvolt = <300000>;
  163. regulator-max-microvolt = <1875000>;
  164. regulator-boot-on;
  165. regulator-always-on;
  166. regulator-ramp-delay = <6250>;
  167. };
  168. sw2_reg: sw2 {
  169. regulator-min-microvolt = <800000>;
  170. regulator-max-microvolt = <3300000>;
  171. regulator-boot-on;
  172. regulator-always-on;
  173. };
  174. sw3a_reg: sw3a {
  175. regulator-min-microvolt = <400000>;
  176. regulator-max-microvolt = <1975000>;
  177. regulator-boot-on;
  178. regulator-always-on;
  179. };
  180. sw3b_reg: sw3b {
  181. regulator-min-microvolt = <400000>;
  182. regulator-max-microvolt = <1975000>;
  183. regulator-boot-on;
  184. regulator-always-on;
  185. };
  186. sw4_reg: sw4 {
  187. regulator-min-microvolt = <800000>;
  188. regulator-max-microvolt = <3300000>;
  189. regulator-always-on;
  190. };
  191. swbst_reg: swbst {
  192. regulator-min-microvolt = <5000000>;
  193. regulator-max-microvolt = <5150000>;
  194. };
  195. snvs_reg: vsnvs {
  196. regulator-min-microvolt = <1000000>;
  197. regulator-max-microvolt = <3000000>;
  198. regulator-boot-on;
  199. regulator-always-on;
  200. };
  201. vref_reg: vrefddr {
  202. regulator-boot-on;
  203. regulator-always-on;
  204. };
  205. vgen1_reg: vgen1 {
  206. regulator-min-microvolt = <800000>;
  207. regulator-max-microvolt = <1550000>;
  208. regulator-always-on;
  209. };
  210. vgen2_reg: vgen2 {
  211. regulator-min-microvolt = <800000>;
  212. regulator-max-microvolt = <1550000>;
  213. };
  214. vgen3_reg: vgen3 {
  215. regulator-min-microvolt = <1800000>;
  216. regulator-max-microvolt = <3300000>;
  217. };
  218. vgen4_reg: vgen4 {
  219. regulator-min-microvolt = <1800000>;
  220. regulator-max-microvolt = <3300000>;
  221. regulator-always-on;
  222. };
  223. vgen5_reg: vgen5 {
  224. regulator-min-microvolt = <1800000>;
  225. regulator-max-microvolt = <3300000>;
  226. regulator-always-on;
  227. };
  228. vgen6_reg: vgen6 {
  229. regulator-min-microvolt = <1800000>;
  230. regulator-max-microvolt = <3300000>;
  231. regulator-always-on;
  232. };
  233. };
  234. };
  235. };
  236. &i2c3 {
  237. clock-frequency = <100000>;
  238. pinctrl-names = "default";
  239. pinctrl-0 = <&pinctrl_i2c3>;
  240. status = "okay";
  241. wm8962: audio-codec@1a {
  242. compatible = "wlf,wm8962";
  243. reg = <0x1a>;
  244. clocks = <&clks IMX6SLL_CLK_EXTERN_AUDIO>;
  245. DCVDD-supply = <&vgen3_reg>;
  246. DBVDD-supply = <&reg_aud3v>;
  247. AVDD-supply = <&vgen3_reg>;
  248. CPVDD-supply = <&vgen3_reg>;
  249. MICVDD-supply = <&reg_aud3v>;
  250. PLLVDD-supply = <&vgen3_reg>;
  251. SPKVDD1-supply = <&reg_aud4v>;
  252. SPKVDD2-supply = <&reg_aud4v>;
  253. };
  254. };
  255. &lcdif {
  256. pinctrl-names = "default";
  257. pinctrl-0 = <&pinctrl_lcd>;
  258. status = "okay";
  259. port {
  260. display_out: endpoint {
  261. remote-endpoint = <&panel_in>;
  262. };
  263. };
  264. };
  265. &pwm1 {
  266. #pwm-cells = <2>;
  267. pinctrl-names = "default";
  268. pinctrl-0 = <&pinctrl_pwm1>;
  269. status = "okay";
  270. };
  271. &snvs_poweroff {
  272. status = "okay";
  273. };
  274. &snvs_pwrkey {
  275. status = "okay";
  276. };
  277. &ssi2 {
  278. status = "okay";
  279. };
  280. &uart1 {
  281. pinctrl-names = "default";
  282. pinctrl-0 = <&pinctrl_uart1>;
  283. status = "okay";
  284. };
  285. &usdhc1 {
  286. pinctrl-names = "default", "state_100mhz", "state_200mhz";
  287. pinctrl-0 = <&pinctrl_usdhc1>;
  288. pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
  289. pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
  290. cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
  291. wp-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
  292. keep-power-in-suspend;
  293. wakeup-source;
  294. vmmc-supply = <&reg_sd1_vmmc>;
  295. status = "okay";
  296. };
  297. &usbotg1 {
  298. vbus-supply = <&reg_usb_otg1_vbus>;
  299. pinctrl-names = "default";
  300. pinctrl-0 = <&pinctrl_usbotg1>;
  301. disable-over-current;
  302. srp-disable;
  303. hnp-disable;
  304. adp-disable;
  305. status = "okay";
  306. };
  307. &usbotg2 {
  308. vbus-supply = <&reg_usb_otg2_vbus>;
  309. dr_mode = "host";
  310. disable-over-current;
  311. status = "okay";
  312. };
  313. &usdhc3 {
  314. pinctrl-names = "default", "state_100mhz", "state_200mhz";
  315. pinctrl-0 = <&pinctrl_usdhc3>;
  316. pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
  317. pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
  318. cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
  319. keep-power-in-suspend;
  320. wakeup-source;
  321. vmmc-supply = <&reg_sd3_vmmc>;
  322. status = "okay";
  323. };
  324. &wdog1 {
  325. pinctrl-names = "default";
  326. pinctrl-0 = <&pinctrl_wdog1>;
  327. fsl,ext-reset-output;
  328. };
  329. &iomuxc {
  330. pinctrl_audmux3: audmux3grp {
  331. fsl,pins = <
  332. MX6SLL_PAD_AUD_TXC__AUD3_TXC 0x4130b0
  333. MX6SLL_PAD_AUD_TXFS__AUD3_TXFS 0x4130b0
  334. MX6SLL_PAD_AUD_TXD__AUD3_TXD 0x4110b0
  335. MX6SLL_PAD_AUD_RXD__AUD3_RXD 0x4130b0
  336. MX6SLL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x4130b0
  337. >;
  338. };
  339. pinctrl_hp: hpgrp {
  340. fsl,pins = <
  341. MX6SLL_PAD_GPIO4_IO24__GPIO4_IO24 0x17059 /* HP DETECT */
  342. >;
  343. };
  344. pinctrl_reg_sd3_vmmc: sd3vmmcgrp {
  345. fsl,pins = <
  346. MX6SLL_PAD_KEY_COL6__GPIO4_IO04 0x17059
  347. >;
  348. };
  349. pinctrl_usb_otg1_vbus: vbus1grp {
  350. fsl,pins = <
  351. MX6SLL_PAD_KEY_COL4__GPIO4_IO00 0x17059
  352. >;
  353. };
  354. pinctrl_usb_otg2_vbus: vbus2grp {
  355. fsl,pins = <
  356. MX6SLL_PAD_KEY_COL5__GPIO4_IO02 0x17059
  357. >;
  358. };
  359. pinctrl_reg_lcd_3v3: reglcd3v3grp {
  360. fsl,pins = <
  361. MX6SLL_PAD_KEY_ROW5__GPIO4_IO03 0x17059
  362. >;
  363. };
  364. pinctrl_reg_sd1_vmmc: sd1vmmcgrp {
  365. fsl,pins = <
  366. MX6SLL_PAD_KEY_COL3__GPIO3_IO30 0x17059
  367. >;
  368. };
  369. pinctrl_uart1: uart1grp {
  370. fsl,pins = <
  371. MX6SLL_PAD_UART1_TXD__UART1_DCE_TX 0x1b0b1
  372. MX6SLL_PAD_UART1_RXD__UART1_DCE_RX 0x1b0b1
  373. >;
  374. };
  375. pinctrl_usdhc1: usdhc1grp {
  376. fsl,pins = <
  377. MX6SLL_PAD_SD1_CMD__SD1_CMD 0x17059
  378. MX6SLL_PAD_SD1_CLK__SD1_CLK 0x13059
  379. MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x17059
  380. MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x17059
  381. MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x17059
  382. MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x17059
  383. >;
  384. };
  385. pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
  386. fsl,pins = <
  387. MX6SLL_PAD_SD1_CMD__SD1_CMD 0x170b9
  388. MX6SLL_PAD_SD1_CLK__SD1_CLK 0x130b9
  389. MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x170b9
  390. MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x170b9
  391. MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x170b9
  392. MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x170b9
  393. >;
  394. };
  395. pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
  396. fsl,pins = <
  397. MX6SLL_PAD_SD1_CMD__SD1_CMD 0x170f9
  398. MX6SLL_PAD_SD1_CLK__SD1_CLK 0x130f9
  399. MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x170f9
  400. MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x170f9
  401. MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x170f9
  402. MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x170f9
  403. >;
  404. };
  405. pinctrl_usbotg1: usbotg1grp {
  406. fsl,pins = <
  407. MX6SLL_PAD_EPDC_PWR_COM__USB_OTG1_ID 0x17059
  408. >;
  409. };
  410. pinctrl_usdhc3: usdhc3grp {
  411. fsl,pins = <
  412. MX6SLL_PAD_SD3_CMD__SD3_CMD 0x17061
  413. MX6SLL_PAD_SD3_CLK__SD3_CLK 0x13061
  414. MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x17061
  415. MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x17061
  416. MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x17061
  417. MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x17061
  418. MX6SLL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
  419. >;
  420. };
  421. pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
  422. fsl,pins = <
  423. MX6SLL_PAD_SD3_CMD__SD3_CMD 0x170a1
  424. MX6SLL_PAD_SD3_CLK__SD3_CLK 0x130a1
  425. MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x170a1
  426. MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x170a1
  427. MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x170a1
  428. MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x170a1
  429. MX6SLL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
  430. >;
  431. };
  432. pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
  433. fsl,pins = <
  434. MX6SLL_PAD_SD3_CMD__SD3_CMD 0x170e9
  435. MX6SLL_PAD_SD3_CLK__SD3_CLK 0x130f9
  436. MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x170e9
  437. MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x170e9
  438. MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x170e9
  439. MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x170e9
  440. MX6SLL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
  441. >;
  442. };
  443. pinctrl_i2c1: i2c1grp {
  444. fsl,pins = <
  445. MX6SLL_PAD_I2C1_SCL__I2C1_SCL 0x4001b8b1
  446. MX6SLL_PAD_I2C1_SDA__I2C1_SDA 0x4001b8b1
  447. >;
  448. };
  449. pinctrl_i2c3: i2c3grp {
  450. fsl,pins = <
  451. MX6SLL_PAD_AUD_RXFS__I2C3_SCL 0x4041b8b1
  452. MX6SLL_PAD_AUD_RXC__I2C3_SDA 0x4041b8b1
  453. >;
  454. };
  455. pinctrl_lcd: lcdgrp {
  456. fsl,pins = <
  457. MX6SLL_PAD_LCD_DATA00__LCD_DATA00 0x79
  458. MX6SLL_PAD_LCD_DATA01__LCD_DATA01 0x79
  459. MX6SLL_PAD_LCD_DATA02__LCD_DATA02 0x79
  460. MX6SLL_PAD_LCD_DATA03__LCD_DATA03 0x79
  461. MX6SLL_PAD_LCD_DATA04__LCD_DATA04 0x79
  462. MX6SLL_PAD_LCD_DATA05__LCD_DATA05 0x79
  463. MX6SLL_PAD_LCD_DATA06__LCD_DATA06 0x79
  464. MX6SLL_PAD_LCD_DATA07__LCD_DATA07 0x79
  465. MX6SLL_PAD_LCD_DATA08__LCD_DATA08 0x79
  466. MX6SLL_PAD_LCD_DATA09__LCD_DATA09 0x79
  467. MX6SLL_PAD_LCD_DATA10__LCD_DATA10 0x79
  468. MX6SLL_PAD_LCD_DATA11__LCD_DATA11 0x79
  469. MX6SLL_PAD_LCD_DATA12__LCD_DATA12 0x79
  470. MX6SLL_PAD_LCD_DATA13__LCD_DATA13 0x79
  471. MX6SLL_PAD_LCD_DATA14__LCD_DATA14 0x79
  472. MX6SLL_PAD_LCD_DATA15__LCD_DATA15 0x79
  473. MX6SLL_PAD_LCD_DATA16__LCD_DATA16 0x79
  474. MX6SLL_PAD_LCD_DATA17__LCD_DATA17 0x79
  475. MX6SLL_PAD_LCD_DATA18__LCD_DATA18 0x79
  476. MX6SLL_PAD_LCD_DATA19__LCD_DATA19 0x79
  477. MX6SLL_PAD_LCD_DATA20__LCD_DATA20 0x79
  478. MX6SLL_PAD_LCD_DATA21__LCD_DATA21 0x79
  479. MX6SLL_PAD_LCD_DATA22__LCD_DATA22 0x79
  480. MX6SLL_PAD_LCD_DATA23__LCD_DATA23 0x79
  481. MX6SLL_PAD_LCD_CLK__LCD_CLK 0x79
  482. MX6SLL_PAD_LCD_ENABLE__LCD_ENABLE 0x79
  483. MX6SLL_PAD_LCD_HSYNC__LCD_HSYNC 0x79
  484. MX6SLL_PAD_LCD_VSYNC__LCD_VSYNC 0x79
  485. MX6SLL_PAD_LCD_RESET__LCD_RESET 0x79
  486. >;
  487. };
  488. pinctrl_led: ledgrp {
  489. fsl,pins = <
  490. MX6SLL_PAD_EPDC_VCOM1__GPIO2_IO04 0x17059
  491. >;
  492. };
  493. pinctrl_pwm1: pmw1grp {
  494. fsl,pins = <
  495. MX6SLL_PAD_PWM1__PWM1_OUT 0x110b0
  496. >;
  497. };
  498. pinctrl_wdog1: wdog1grp {
  499. fsl,pins = <
  500. MX6SLL_PAD_WDOG_B__WDOG1_B 0x170b0
  501. >;
  502. };
  503. };