imx6qdl-phytec-mira.dtsi 8.5 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright (C) 2018 PHYTEC Messtechnik GmbH
  4. * Author: Christian Hemp <[email protected]>
  5. */
  6. / {
  7. aliases {
  8. rtc0 = &i2c_rtc;
  9. };
  10. backlight: backlight {
  11. compatible = "pwm-backlight";
  12. brightness-levels = <0 4 8 16 32 64 128 255>;
  13. default-brightness-level = <7>;
  14. power-supply = <&reg_backlight>;
  15. pwms = <&pwm1 0 5000000>;
  16. status = "okay";
  17. };
  18. gpio_leds: leds {
  19. compatible = "gpio-leds";
  20. pinctrl-names = "default";
  21. pinctrl-0 = <&pinctrl_gpioleds>;
  22. status = "disabled";
  23. led-red {
  24. label = "phyboard-mira:red";
  25. gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>;
  26. };
  27. led-green {
  28. label = "phyboard-mira:green";
  29. gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>;
  30. };
  31. led-blue {
  32. label = "phyboard-mira:blue";
  33. gpios = <&gpio5 24 GPIO_ACTIVE_HIGH>;
  34. linux,default-trigger = "mmc0";
  35. };
  36. };
  37. reg_backlight: regulator-backlight {
  38. compatible = "regulator-fixed";
  39. regulator-name = "backlight_3v3";
  40. regulator-min-microvolt = <3300000>;
  41. regulator-max-microvolt = <3300000>;
  42. regulator-always-on;
  43. };
  44. reg_en_switch: regulator-en-switch {
  45. compatible = "regulator-fixed";
  46. pinctrl-names = "default";
  47. pinctrl-0 = <&pinctrl_en_switch>;
  48. regulator-name = "Enable Switch";
  49. regulator-min-microvolt = <3300000>;
  50. regulator-max-microvolt = <3300000>;
  51. enable-active-high;
  52. gpio = <&gpio3 4 GPIO_ACTIVE_HIGH>;
  53. regulator-always-on;
  54. };
  55. reg_flexcan1: regulator-flexcan1 {
  56. compatible = "regulator-fixed";
  57. pinctrl-names = "default";
  58. pinctrl-0 = <&pinctrl_flexcan1_en>;
  59. regulator-name = "flexcan1-reg";
  60. regulator-min-microvolt = <1500000>;
  61. regulator-max-microvolt = <1500000>;
  62. gpio = <&gpio2 20 GPIO_ACTIVE_HIGH>;
  63. enable-active-high;
  64. };
  65. reg_panel: regulator-panel {
  66. compatible = "regulator-fixed";
  67. regulator-name = "panel-power-supply";
  68. regulator-min-microvolt = <12000000>;
  69. regulator-max-microvolt = <12000000>;
  70. regulator-always-on;
  71. };
  72. reg_pcie: regulator-pcie {
  73. compatible = "regulator-fixed";
  74. pinctrl-names = "default";
  75. pinctrl-0 = <&pinctrl_pcie_reg>;
  76. regulator-name = "mPCIe_1V5";
  77. regulator-min-microvolt = <1500000>;
  78. regulator-max-microvolt = <1500000>;
  79. gpio = <&gpio3 0 GPIO_ACTIVE_HIGH>;
  80. enable-active-high;
  81. };
  82. reg_usb_h1_vbus: usb-h1-vbus {
  83. compatible = "regulator-fixed";
  84. pinctrl-names = "default";
  85. pinctrl-0 = <&pinctrl_usbh1_vbus>;
  86. regulator-name = "usb_h1_vbus";
  87. regulator-min-microvolt = <5000000>;
  88. regulator-max-microvolt = <5000000>;
  89. gpio = <&gpio2 18 GPIO_ACTIVE_HIGH>;
  90. enable-active-high;
  91. };
  92. reg_usbotg_vbus: usbotg-vbus {
  93. compatible = "regulator-fixed";
  94. pinctrl-names = "default";
  95. pinctrl-0 = <&pinctrl_usbotg_vbus>;
  96. regulator-name = "usb_otg_vbus";
  97. regulator-min-microvolt = <5000000>;
  98. regulator-max-microvolt = <5000000>;
  99. gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
  100. enable-active-high;
  101. };
  102. panel {
  103. compatible = "auo,g104sn02";
  104. pinctrl-names = "default";
  105. pinctrl-0 = <&pinctrl_panel_en>;
  106. power-supply = <&reg_panel>;
  107. enable-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
  108. backlight = <&backlight>;
  109. port {
  110. panel_in: endpoint {
  111. remote-endpoint = <&lvds0_out>;
  112. };
  113. };
  114. };
  115. };
  116. &can1 {
  117. pinctrl-names = "default";
  118. pinctrl-0 = <&pinctrl_flexcan1>;
  119. xceiver-supply = <&reg_flexcan1>;
  120. status = "disabled";
  121. };
  122. &hdmi {
  123. pinctrl-names = "default";
  124. pinctrl-0 = <&pinctrl_hdmicec>;
  125. ddc-i2c-bus = <&i2c2>;
  126. status = "disabled";
  127. };
  128. &i2c1 {
  129. pinctrl-names = "default", "gpio";
  130. pinctrl-0 = <&pinctrl_i2c1>;
  131. pinctrl-1 = <&pinctrl_i2c1_gpio>;
  132. scl-gpios = <&gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  133. sda-gpios = <&gpio3 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  134. clock-frequency = <400000>;
  135. status = "disabled";
  136. stmpe: touchctrl@44 {
  137. compatible = "st,stmpe811";
  138. pinctrl-names = "default";
  139. pinctrl-0 = <&pinctrl_stmpe>;
  140. reg = <0x44>;
  141. interrupt-parent = <&gpio7>;
  142. interrupts = <12 IRQ_TYPE_NONE>;
  143. status = "disabled";
  144. stmpe_touchscreen {
  145. compatible = "st,stmpe-ts";
  146. st,sample-time = <4>;
  147. st,mod-12b = <1>;
  148. st,ref-sel = <0>;
  149. st,adc-freq = <1>;
  150. st,ave-ctrl = <1>;
  151. st,touch-det-delay = <2>;
  152. st,settling = <2>;
  153. st,fraction-z = <7>;
  154. st,i-drive = <1>;
  155. };
  156. };
  157. i2c_rtc: rtc@68 {
  158. compatible = "microcrystal,rv4162";
  159. pinctrl-names = "default";
  160. pinctrl-0 = <&pinctrl_rtc_int>;
  161. reg = <0x68>;
  162. interrupt-parent = <&gpio7>;
  163. interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
  164. status = "disabled";
  165. };
  166. };
  167. &i2c2 {
  168. pinctrl-names = "default", "gpio";
  169. pinctrl-0 = <&pinctrl_i2c2>;
  170. pinctrl-1 = <&pinctrl_i2c2_gpio>;
  171. scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  172. sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  173. clock-frequency = <100000>;
  174. status = "disabled";
  175. };
  176. &ldb {
  177. status = "okay";
  178. lvds-channel@0 {
  179. fsl,data-mapping = "spwg";
  180. fsl,data-width = <24>;
  181. status = "disabled";
  182. port@4 {
  183. reg = <4>;
  184. lvds0_out: endpoint {
  185. remote-endpoint = <&panel_in>;
  186. };
  187. };
  188. };
  189. };
  190. &pcie {
  191. pinctrl-names = "default";
  192. pinctrl-0 = <&pinctrl_pcie>;
  193. reset-gpio = <&gpio2 25 GPIO_ACTIVE_LOW>;
  194. vpcie-supply = <&reg_pcie>;
  195. status = "disabled";
  196. };
  197. &pwm1 {
  198. #pwm-cells = <2>;
  199. pinctrl-names = "default";
  200. pinctrl-0 = <&pinctrl_pwm1>;
  201. status = "okay";
  202. };
  203. &uart2 {
  204. pinctrl-names = "default";
  205. pinctrl-0 = <&pinctrl_uart2>;
  206. status = "okay";
  207. };
  208. &uart3 {
  209. pinctrl-names = "default";
  210. pinctrl-0 = <&pinctrl_uart3>;
  211. uart-has-rtscts;
  212. status = "disabled";
  213. };
  214. &usbh1 {
  215. vbus-supply = <&reg_usb_h1_vbus>;
  216. disable-over-current;
  217. status = "disabled";
  218. };
  219. &usbotg {
  220. pinctrl-names = "default";
  221. pinctrl-0 = <&pinctrl_usbotg>;
  222. vbus-supply = <&reg_usbotg_vbus>;
  223. disable-over-current;
  224. status = "disabled";
  225. };
  226. &usdhc1 {
  227. pinctrl-names = "default";
  228. pinctrl-0 = <&pinctrl_usdhc1>;
  229. cd-gpios = <&gpio6 31 GPIO_ACTIVE_LOW>;
  230. no-1-8-v;
  231. disable-wp;
  232. status = "disabled";
  233. };
  234. &iomuxc {
  235. pinctrl_panel_en: panelen1grp {
  236. fsl,pins = <
  237. MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0xb0b1
  238. >;
  239. };
  240. pinctrl_en_switch: enswitchgrp {
  241. fsl,pins = <
  242. MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0xb0b1
  243. >;
  244. };
  245. pinctrl_flexcan1: flexcan1grp {
  246. fsl,pins = <
  247. MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
  248. MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
  249. >;
  250. };
  251. pinctrl_flexcan1_en: flexcan1engrp {
  252. fsl,pins = <
  253. MX6QDL_PAD_EIM_A18__GPIO2_IO20 0xb0b1
  254. >;
  255. };
  256. pinctrl_gpioleds: gpioledsgrp {
  257. fsl,pins = <
  258. MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x1b0b0
  259. MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x1b0b0
  260. MX6QDL_PAD_CSI0_DAT6__GPIO5_IO24 0x1b0b0
  261. >;
  262. };
  263. pinctrl_hdmicec: hdmicecgrp {
  264. fsl,pins = <
  265. MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
  266. >;
  267. };
  268. pinctrl_i2c1: i2c1grp {
  269. fsl,pins = <
  270. MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
  271. MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
  272. >;
  273. };
  274. pinctrl_i2c1_gpio: i2c1gpiogrp {
  275. fsl,pins = <
  276. MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x4001b8b1
  277. MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x4001b8b1
  278. >;
  279. };
  280. pinctrl_i2c2: i2c2grp {
  281. fsl,pins = <
  282. MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
  283. MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
  284. >;
  285. };
  286. pinctrl_i2c2_gpio: i2c2gpiogrp {
  287. fsl,pins = <
  288. MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x4001b8b1
  289. MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x4001b8b1
  290. >;
  291. };
  292. pinctrl_pcie: pciegrp {
  293. fsl,pins = <
  294. MX6QDL_PAD_EIM_OE__GPIO2_IO25 0xb0b1
  295. >;
  296. };
  297. pinctrl_pcie_reg: pciereggrp {
  298. fsl,pins = <
  299. MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0xb0b1
  300. >;
  301. };
  302. pinctrl_pwm1: pwm1grp {
  303. fsl,pins = <
  304. MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
  305. >;
  306. };
  307. pinctrl_rtc_int: rtcintgrp {
  308. fsl,pins = <
  309. MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b0
  310. >;
  311. };
  312. pinctrl_stmpe: stmpegrp {
  313. fsl,pins = <
  314. MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
  315. >;
  316. };
  317. pinctrl_uart2: uart2grp {
  318. fsl,pins = <
  319. MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
  320. MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
  321. >;
  322. };
  323. pinctrl_uart3: uart3grp {
  324. fsl,pins = <
  325. MX6QDL_PAD_EIM_EB3__UART3_CTS_B 0x1b0b1
  326. MX6QDL_PAD_EIM_D23__UART3_RTS_B 0x1b0b1
  327. MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
  328. MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
  329. >;
  330. };
  331. pinctrl_usbh1_vbus: usbh1vbusgrp {
  332. fsl,pins = <
  333. MX6QDL_PAD_EIM_A20__GPIO2_IO18 0xb0b1
  334. >;
  335. };
  336. pinctrl_usbotg: usbotggrp {
  337. fsl,pins = <
  338. MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
  339. >;
  340. };
  341. pinctrl_usbotg_vbus: usbotgvbusgrp {
  342. fsl,pins = <
  343. MX6QDL_PAD_EIM_A19__GPIO2_IO19 0xb0b1
  344. >;
  345. };
  346. pinctrl_usdhc1: usdhc1grp {
  347. fsl,pins = <
  348. MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9
  349. MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
  350. MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
  351. MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
  352. MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
  353. MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
  354. MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0xb0b1 /* CD */
  355. >;
  356. };
  357. };