imx6qdl-nit6xlite.dtsi 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0 OR X11
  2. /*
  3. * Copyright 2015 Boundary Devices, Inc.
  4. */
  5. #include <dt-bindings/gpio/gpio.h>
  6. #include <dt-bindings/input/input.h>
  7. / {
  8. chosen {
  9. stdout-path = &uart2;
  10. };
  11. memory@10000000 {
  12. device_type = "memory";
  13. reg = <0x10000000 0x20000000>;
  14. };
  15. regulators {
  16. compatible = "simple-bus";
  17. #address-cells = <1>;
  18. #size-cells = <0>;
  19. reg_2p5v: regulator@0 {
  20. compatible = "regulator-fixed";
  21. reg = <0>;
  22. regulator-name = "2P5V";
  23. regulator-min-microvolt = <2500000>;
  24. regulator-max-microvolt = <2500000>;
  25. regulator-always-on;
  26. };
  27. reg_3p3v: regulator@1 {
  28. compatible = "regulator-fixed";
  29. reg = <1>;
  30. regulator-name = "3P3V";
  31. regulator-min-microvolt = <3300000>;
  32. regulator-max-microvolt = <3300000>;
  33. regulator-always-on;
  34. };
  35. reg_usb_otg_vbus: regulator@2 {
  36. compatible = "regulator-fixed";
  37. reg = <2>;
  38. regulator-name = "usb_otg_vbus";
  39. regulator-min-microvolt = <5000000>;
  40. regulator-max-microvolt = <5000000>;
  41. gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
  42. enable-active-high;
  43. };
  44. reg_wlan_vmmc: regulator@3 {
  45. compatible = "regulator-fixed";
  46. reg = <3>;
  47. pinctrl-names = "default";
  48. pinctrl-0 = <&pinctrl_wlan_vmmc>;
  49. regulator-name = "reg_wlan_vmmc";
  50. regulator-min-microvolt = <1800000>;
  51. regulator-max-microvolt = <1800000>;
  52. gpio = <&gpio6 7 GPIO_ACTIVE_HIGH>;
  53. startup-delay-us = <70000>;
  54. enable-active-high;
  55. };
  56. };
  57. gpio-keys {
  58. compatible = "gpio-keys";
  59. pinctrl-names = "default";
  60. pinctrl-0 = <&pinctrl_gpio_keys>;
  61. home {
  62. label = "Home";
  63. gpios = <&gpio7 13 IRQ_TYPE_LEVEL_LOW>;
  64. linux,code = <102>;
  65. };
  66. back {
  67. label = "Back";
  68. gpios = <&gpio4 5 IRQ_TYPE_LEVEL_LOW>;
  69. linux,code = <158>;
  70. };
  71. };
  72. leds {
  73. compatible = "gpio-leds";
  74. pinctrl-names = "default";
  75. pinctrl-0 = <&pinctrl_leds>;
  76. led-j14-pin1 {
  77. gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
  78. retain-state-suspended;
  79. default-state = "off";
  80. };
  81. led-j14-pin3 {
  82. gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
  83. retain-state-suspended;
  84. default-state = "off";
  85. };
  86. led-j14-pins8-9 {
  87. gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
  88. retain-state-suspended;
  89. default-state = "off";
  90. };
  91. led-j46-pin2 {
  92. gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
  93. retain-state-suspended;
  94. default-state = "off";
  95. };
  96. led-j46-pin3 {
  97. gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
  98. retain-state-suspended;
  99. default-state = "off";
  100. };
  101. };
  102. backlight-lcd {
  103. compatible = "pwm-backlight";
  104. pwms = <&pwm1 0 5000000>;
  105. brightness-levels = <0 4 8 16 32 64 128 255>;
  106. default-brightness-level = <7>;
  107. power-supply = <&reg_3p3v>;
  108. status = "okay";
  109. };
  110. backlight_lvds0: backlight-lvds0 {
  111. compatible = "pwm-backlight";
  112. pwms = <&pwm4 0 5000000>;
  113. brightness-levels = <0 4 8 16 32 64 128 255>;
  114. default-brightness-level = <7>;
  115. power-supply = <&reg_3p3v>;
  116. status = "okay";
  117. };
  118. panel-lvds0 {
  119. compatible = "hannstar,hsd100pxn1";
  120. backlight = <&backlight_lvds0>;
  121. port {
  122. panel_in_lvds0: endpoint {
  123. remote-endpoint = <&lvds0_out>;
  124. };
  125. };
  126. };
  127. sound {
  128. compatible = "fsl,imx6dl-nit6xlite-sgtl5000",
  129. "fsl,imx-audio-sgtl5000";
  130. model = "imx6dl-nit6xlite-sgtl5000";
  131. ssi-controller = <&ssi1>;
  132. audio-codec = <&codec>;
  133. audio-routing =
  134. "MIC_IN", "Mic Jack",
  135. "Mic Jack", "Mic Bias",
  136. "Headphone Jack", "HP_OUT";
  137. mux-int-port = <1>;
  138. mux-ext-port = <3>;
  139. };
  140. };
  141. &audmux {
  142. pinctrl-names = "default";
  143. pinctrl-0 = <&pinctrl_audmux>;
  144. status = "okay";
  145. };
  146. &clks {
  147. assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
  148. <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
  149. assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
  150. <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
  151. };
  152. &ecspi1 {
  153. cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
  154. pinctrl-names = "default";
  155. pinctrl-0 = <&pinctrl_ecspi1>;
  156. status = "okay";
  157. flash: flash@0 {
  158. compatible = "microchip,sst25vf016b";
  159. spi-max-frequency = <20000000>;
  160. reg = <0>;
  161. };
  162. };
  163. &fec {
  164. pinctrl-names = "default";
  165. pinctrl-0 = <&pinctrl_enet>;
  166. phy-mode = "rgmii";
  167. phy-handle = <&ethphy>;
  168. phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
  169. /delete-property/ interrupts;
  170. interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
  171. <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
  172. fsl,err006687-workaround-present;
  173. status = "okay";
  174. mdio {
  175. #address-cells = <1>;
  176. #size-cells = <0>;
  177. ethphy: ethernet-phy {
  178. compatible = "ethernet-phy-ieee802.3-c22";
  179. txen-skew-ps = <0>;
  180. txc-skew-ps = <3000>;
  181. rxdv-skew-ps = <0>;
  182. rxc-skew-ps = <3000>;
  183. rxd0-skew-ps = <0>;
  184. rxd1-skew-ps = <0>;
  185. rxd2-skew-ps = <0>;
  186. rxd3-skew-ps = <0>;
  187. txd0-skew-ps = <0>;
  188. txd1-skew-ps = <0>;
  189. txd2-skew-ps = <0>;
  190. txd3-skew-ps = <0>;
  191. };
  192. };
  193. };
  194. &hdmi {
  195. ddc-i2c-bus = <&i2c2>;
  196. status = "okay";
  197. };
  198. &i2c1 {
  199. clock-frequency = <100000>;
  200. pinctrl-names = "default";
  201. pinctrl-0 = <&pinctrl_i2c1>;
  202. status = "okay";
  203. codec: sgtl5000@a {
  204. compatible = "fsl,sgtl5000";
  205. pinctrl-names = "default";
  206. pinctrl-0 = <&pinctrl_sgtl5000>;
  207. reg = <0x0a>;
  208. clocks = <&clks IMX6QDL_CLK_CKO>;
  209. VDDA-supply = <&reg_2p5v>;
  210. VDDIO-supply = <&reg_3p3v>;
  211. };
  212. };
  213. &i2c2 {
  214. clock-frequency = <100000>;
  215. pinctrl-names = "default";
  216. pinctrl-0 = <&pinctrl_i2c2>;
  217. status = "okay";
  218. };
  219. &i2c3 {
  220. clock-frequency = <100000>;
  221. pinctrl-names = "default";
  222. pinctrl-0 = <&pinctrl_i2c3>;
  223. status = "okay";
  224. touchscreen@4 {
  225. compatible = "eeti,egalax_ts";
  226. reg = <0x04>;
  227. interrupt-parent = <&gpio1>;
  228. interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
  229. wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
  230. };
  231. touchscreen@38 {
  232. compatible = "edt,edt-ft5x06";
  233. reg = <0x38>;
  234. interrupt-parent = <&gpio1>;
  235. interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
  236. wakeup-source;
  237. };
  238. rtc@6f {
  239. compatible = "isil,isl1208";
  240. pinctrl-names = "default";
  241. pinctrl-0 = <&pinctrl_rtc>;
  242. reg = <0x6f>;
  243. interrupts-extended = <&gpio2 26 IRQ_TYPE_LEVEL_LOW>;
  244. };
  245. };
  246. &iomuxc {
  247. pinctrl-names = "default";
  248. pinctrl-0 = <&pinctrl_j10>;
  249. pinctrl-1 = <&pinctrl_j28>;
  250. imx6dl-nit6xlite {
  251. pinctrl_audmux: audmuxgrp {
  252. fsl,pins = <
  253. MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
  254. MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
  255. MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
  256. MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
  257. >;
  258. };
  259. pinctrl_ecspi1: ecspi1grp {
  260. fsl,pins = <
  261. MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
  262. MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
  263. MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
  264. MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1
  265. >;
  266. };
  267. pinctrl_enet: enetgrp {
  268. fsl,pins = <
  269. MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
  270. MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
  271. MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
  272. MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
  273. MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
  274. MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
  275. MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
  276. MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
  277. MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
  278. MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
  279. MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
  280. MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
  281. MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
  282. MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
  283. MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
  284. /* Phy reset */
  285. MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x0f0b0
  286. MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0
  287. MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
  288. >;
  289. };
  290. pinctrl_gpio_keys: gpio-keysgrp {
  291. fsl,pins = <
  292. /* Home Button: J14 pin 5 */
  293. MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
  294. /* Back Button: J14 pin 7 */
  295. MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
  296. >;
  297. };
  298. pinctrl_i2c1: i2c1grp {
  299. fsl,pins = <
  300. MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
  301. MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
  302. >;
  303. };
  304. pinctrl_i2c2: i2c2grp {
  305. fsl,pins = <
  306. MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
  307. MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
  308. >;
  309. };
  310. pinctrl_i2c3: i2c3grp {
  311. fsl,pins = <
  312. MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
  313. MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
  314. /* Touch IRQ: J7 pin 4 */
  315. MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
  316. /* tcs2004 IRQ */
  317. MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x1b0b0
  318. /* tsc2004 reset */
  319. MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x0b0b0
  320. >;
  321. };
  322. pinctrl_j10: j10grp {
  323. fsl,pins = <
  324. /* Broadcom WiFi module pins */
  325. MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
  326. MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
  327. MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
  328. MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
  329. MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x0b0b0
  330. MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0
  331. MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT 0x000b0
  332. >;
  333. };
  334. pinctrl_j28: j28grp {
  335. fsl,pins = <
  336. MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
  337. >;
  338. };
  339. pinctrl_leds: ledsgrp {
  340. fsl,pins = <
  341. MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x0b0b0
  342. MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x0b0b0
  343. MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x030b0
  344. MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x0b0b0
  345. MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0b0b0
  346. >;
  347. };
  348. pinctrl_pwm1: pwm1grp {
  349. fsl,pins = <
  350. MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
  351. >;
  352. };
  353. pinctrl_pwm3: pwm3grp {
  354. fsl,pins = <
  355. MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
  356. >;
  357. };
  358. pinctrl_pwm4: pwm4grp {
  359. fsl,pins = <
  360. MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
  361. >;
  362. };
  363. pinctrl_wlan_vmmc: wlan-vmmcgrp {
  364. fsl,pins = <
  365. MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x030b0
  366. >;
  367. };
  368. pinctrl_rtc: rtcgrp {
  369. fsl,pins = <
  370. MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x1b0b0
  371. >;
  372. };
  373. pinctrl_sgtl5000: sgtl5000grp {
  374. fsl,pins = <
  375. MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0
  376. MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b0
  377. >;
  378. };
  379. pinctrl_uart1: uart1grp {
  380. fsl,pins = <
  381. MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
  382. MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
  383. >;
  384. };
  385. pinctrl_uart2: uart2grp {
  386. fsl,pins = <
  387. MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
  388. MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
  389. >;
  390. };
  391. pinctrl_uart3: uart3grp {
  392. fsl,pins = <
  393. MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
  394. MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
  395. MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
  396. MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
  397. >;
  398. };
  399. pinctrl_usbotg: usbotggrp {
  400. fsl,pins = <
  401. MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
  402. MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
  403. /* power enable, high active */
  404. MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
  405. >;
  406. };
  407. pinctrl_usdhc2: usdhc2grp {
  408. fsl,pins = <
  409. MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
  410. MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
  411. MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
  412. MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
  413. MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
  414. MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
  415. >;
  416. };
  417. pinctrl_usdhc3: usdhc3grp {
  418. fsl,pins = <
  419. MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
  420. MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
  421. MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
  422. MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
  423. MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
  424. MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
  425. MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
  426. >;
  427. };
  428. };
  429. };
  430. &ldb {
  431. status = "okay";
  432. lvds-channel@0 {
  433. status = "okay";
  434. port@4 {
  435. reg = <4>;
  436. lvds0_out: endpoint {
  437. remote-endpoint = <&panel_in_lvds0>;
  438. };
  439. };
  440. };
  441. };
  442. &pcie {
  443. status = "okay";
  444. };
  445. &pwm1 {
  446. #pwm-cells = <2>;
  447. pinctrl-names = "default";
  448. pinctrl-0 = <&pinctrl_pwm1>;
  449. status = "okay";
  450. };
  451. &pwm3 {
  452. pinctrl-names = "default";
  453. pinctrl-0 = <&pinctrl_pwm3>;
  454. status = "okay";
  455. };
  456. &pwm4 {
  457. #pwm-cells = <2>;
  458. pinctrl-names = "default";
  459. pinctrl-0 = <&pinctrl_pwm4>;
  460. status = "okay";
  461. };
  462. &ssi1 {
  463. status = "okay";
  464. };
  465. &uart1 {
  466. pinctrl-names = "default";
  467. pinctrl-0 = <&pinctrl_uart1>;
  468. status = "okay";
  469. };
  470. &uart2 {
  471. pinctrl-names = "default";
  472. pinctrl-0 = <&pinctrl_uart2>;
  473. status = "okay";
  474. };
  475. &uart3 {
  476. pinctrl-names = "default";
  477. pinctrl-0 = <&pinctrl_uart3>;
  478. uart-has-rtscts;
  479. status = "okay";
  480. };
  481. &usbh1 {
  482. status = "okay";
  483. };
  484. &usbotg {
  485. vbus-supply = <&reg_usb_otg_vbus>;
  486. pinctrl-names = "default";
  487. pinctrl-0 = <&pinctrl_usbotg>;
  488. disable-over-current;
  489. status = "okay";
  490. };
  491. &usdhc2 {
  492. pinctrl-names = "default";
  493. pinctrl-0 = <&pinctrl_usdhc2>;
  494. bus-width = <4>;
  495. non-removable;
  496. vmmc-supply = <&reg_3p3v>;
  497. vqmmc-supply = <&reg_wlan_vmmc>;
  498. cap-power-off-card;
  499. keep-power-in-suspend;
  500. status = "okay";
  501. };
  502. &usdhc3 {
  503. pinctrl-names = "default";
  504. pinctrl-0 = <&pinctrl_usdhc3>;
  505. cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
  506. vmmc-supply = <&reg_3p3v>;
  507. status = "okay";
  508. };