imx6q-ba16.dtsi 16 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661
  1. /*
  2. * Support for imx6 based Advantech DMS-BA16 Qseven module
  3. *
  4. * Copyright 2015 Timesys Corporation.
  5. * Copyright 2015 General Electric Company
  6. *
  7. * This file is dual-licensed: you can use it either under the terms
  8. * of the GPL or the X11 license, at your option. Note that this dual
  9. * licensing only applies to this file, and not this project as a
  10. * whole.
  11. *
  12. * a) This file is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License
  14. * version 2 as published by the Free Software Foundation.
  15. *
  16. * This file is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * Or, alternatively,
  22. *
  23. * b) Permission is hereby granted, free of charge, to any person
  24. * obtaining a copy of this software and associated documentation
  25. * files (the "Software"), to deal in the Software without
  26. * restriction, including without limitation the rights to use,
  27. * copy, modify, merge, publish, distribute, sublicense, and/or
  28. * sell copies of the Software, and to permit persons to whom the
  29. * Software is furnished to do so, subject to the following
  30. * conditions:
  31. *
  32. * The above copyright notice and this permission notice shall be
  33. * included in all copies or substantial portions of the Software.
  34. *
  35. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  36. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  37. * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  38. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  39. * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  40. * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  41. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  42. * OTHER DEALINGS IN THE SOFTWARE.
  43. */
  44. #include "imx6q.dtsi"
  45. #include <dt-bindings/gpio/gpio.h>
  46. / {
  47. memory@10000000 {
  48. device_type = "memory";
  49. reg = <0x10000000 0x40000000>;
  50. };
  51. backlight_lvds: backlight {
  52. compatible = "pwm-backlight";
  53. pinctrl-names = "default";
  54. pinctrl-0 = <&pinctrl_display>;
  55. pwms = <&pwm1 0 5000000>;
  56. brightness-levels = < 0 1 2 3 4 5 6 7 8 9
  57. 10 11 12 13 14 15 16 17 18 19
  58. 20 21 22 23 24 25 26 27 28 29
  59. 30 31 32 33 34 35 36 37 38 39
  60. 40 41 42 43 44 45 46 47 48 49
  61. 50 51 52 53 54 55 56 57 58 59
  62. 60 61 62 63 64 65 66 67 68 69
  63. 70 71 72 73 74 75 76 77 78 79
  64. 80 81 82 83 84 85 86 87 88 89
  65. 90 91 92 93 94 95 96 97 98 99
  66. 100 101 102 103 104 105 106 107 108 109
  67. 110 111 112 113 114 115 116 117 118 119
  68. 120 121 122 123 124 125 126 127 128 129
  69. 130 131 132 133 134 135 136 137 138 139
  70. 140 141 142 143 144 145 146 147 148 149
  71. 150 151 152 153 154 155 156 157 158 159
  72. 160 161 162 163 164 165 166 167 168 169
  73. 170 171 172 173 174 175 176 177 178 179
  74. 180 181 182 183 184 185 186 187 188 189
  75. 190 191 192 193 194 195 196 197 198 199
  76. 200 201 202 203 204 205 206 207 208 209
  77. 210 211 212 213 214 215 216 217 218 219
  78. 220 221 222 223 224 225 226 227 228 229
  79. 230 231 232 233 234 235 236 237 238 239
  80. 240 241 242 243 244 245 246 247 248 249
  81. 250 251 252 253 254 255>;
  82. default-brightness-level = <255>;
  83. enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
  84. };
  85. reg_1p8v: regulator-1p8v {
  86. compatible = "regulator-fixed";
  87. regulator-name = "1P8V";
  88. regulator-min-microvolt = <1800000>;
  89. regulator-max-microvolt = <1800000>;
  90. regulator-always-on;
  91. };
  92. reg_3p3v: regulator-3p3v {
  93. compatible = "regulator-fixed";
  94. regulator-name = "3P3V";
  95. regulator-min-microvolt = <3300000>;
  96. regulator-max-microvolt = <3300000>;
  97. regulator-always-on;
  98. };
  99. reg_lvds: regulator-lvds {
  100. compatible = "regulator-fixed";
  101. regulator-name = "lvds_ppen";
  102. regulator-min-microvolt = <3300000>;
  103. regulator-max-microvolt = <3300000>;
  104. regulator-boot-on;
  105. gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
  106. enable-active-high;
  107. };
  108. reg_usb_h1_vbus: regulator-usbh1vbus {
  109. compatible = "regulator-fixed";
  110. regulator-name = "usb_h1_vbus";
  111. regulator-min-microvolt = <5000000>;
  112. regulator-max-microvolt = <5000000>;
  113. };
  114. reg_usb_otg_vbus: regulator-usbotgvbus {
  115. compatible = "regulator-fixed";
  116. regulator-name = "usb_otg_vbus";
  117. regulator-min-microvolt = <5000000>;
  118. regulator-max-microvolt = <5000000>;
  119. pinctrl-0 = <&pinctrl_usbotg_vbus>;
  120. gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
  121. enable-active-high;
  122. };
  123. };
  124. &audmux {
  125. pinctrl-names = "default";
  126. pinctrl-0 = <&pinctrl_audmux>;
  127. status = "okay";
  128. };
  129. &ecspi1 {
  130. cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
  131. pinctrl-names = "default";
  132. pinctrl-0 = <&pinctrl_ecspi1>;
  133. status = "okay";
  134. flash: flash@0 {
  135. compatible = "jedec,spi-nor";
  136. #address-cells = <1>;
  137. #size-cells = <1>;
  138. spi-max-frequency = <20000000>;
  139. reg = <0>;
  140. partition@0 {
  141. label = "U-Boot";
  142. reg = <0x0 0xc0000>;
  143. };
  144. partition@c0000 {
  145. label = "env";
  146. reg = <0xc0000 0x10000>;
  147. };
  148. partition@d0000 {
  149. label = "spare";
  150. reg = <0xd0000 0x320000>;
  151. };
  152. partition@3f0000 {
  153. label = "mfg";
  154. reg = <0x3f0000 0x10000>;
  155. };
  156. };
  157. };
  158. &fec {
  159. pinctrl-names = "default";
  160. pinctrl-0 = <&pinctrl_enet>;
  161. phy-mode = "rgmii-id";
  162. phy-supply = <&reg_3p3v>;
  163. phy-handle = <&phy0>;
  164. status = "okay";
  165. mdio {
  166. #address-cells = <1>;
  167. #size-cells = <0>;
  168. phy0: ethernet-phy@4 {
  169. reg = <4>;
  170. qca,clk-out-frequency = <125000000>;
  171. };
  172. };
  173. };
  174. &hdmi {
  175. ddc-i2c-bus = <&i2c2>;
  176. status = "okay";
  177. };
  178. &i2c1 {
  179. clock-frequency = <100000>;
  180. pinctrl-names = "default";
  181. pinctrl-0 = <&pinctrl_i2c1>;
  182. status = "okay";
  183. };
  184. &i2c2 {
  185. clock-frequency = <100000>;
  186. pinctrl-names = "default";
  187. pinctrl-0 = <&pinctrl_i2c2>;
  188. status = "okay";
  189. };
  190. &i2c3 {
  191. clock-frequency = <100000>;
  192. pinctrl-names = "default";
  193. pinctrl-0 = <&pinctrl_i2c3>;
  194. status = "okay";
  195. pmic@58 {
  196. compatible = "dlg,da9063";
  197. reg = <0x58>;
  198. pinctrl-names = "default";
  199. pinctrl-0 = <&pinctrl_pmic>;
  200. interrupt-parent = <&gpio7>;
  201. interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
  202. onkey {
  203. compatible = "dlg,da9063-onkey";
  204. };
  205. regulators {
  206. vdd_bcore1: bcore1 {
  207. regulator-min-microvolt = <1420000>;
  208. regulator-max-microvolt = <1420000>;
  209. regulator-always-on;
  210. regulator-boot-on;
  211. };
  212. vdd_bcore2: bcore2 {
  213. regulator-min-microvolt = <1420000>;
  214. regulator-max-microvolt = <1420000>;
  215. regulator-always-on;
  216. regulator-boot-on;
  217. };
  218. vdd_bpro: bpro {
  219. regulator-min-microvolt = <1500000>;
  220. regulator-max-microvolt = <1500000>;
  221. regulator-always-on;
  222. regulator-boot-on;
  223. };
  224. vdd_bmem: bmem {
  225. regulator-min-microvolt = <1800000>;
  226. regulator-max-microvolt = <1800000>;
  227. regulator-always-on;
  228. regulator-boot-on;
  229. };
  230. vdd_bio: bio {
  231. regulator-min-microvolt = <1800000>;
  232. regulator-max-microvolt = <1800000>;
  233. regulator-always-on;
  234. regulator-boot-on;
  235. };
  236. vdd_bperi: bperi {
  237. regulator-min-microvolt = <3300000>;
  238. regulator-max-microvolt = <3300000>;
  239. regulator-always-on;
  240. regulator-boot-on;
  241. };
  242. vdd_ldo1: ldo1 {
  243. regulator-min-microvolt = <600000>;
  244. regulator-max-microvolt = <1860000>;
  245. };
  246. vdd_ldo2: ldo2 {
  247. regulator-min-microvolt = <600000>;
  248. regulator-max-microvolt = <1860000>;
  249. };
  250. vdd_ldo3: ldo3 {
  251. regulator-min-microvolt = <900000>;
  252. regulator-max-microvolt = <3440000>;
  253. };
  254. vdd_ldo4: ldo4 {
  255. regulator-min-microvolt = <900000>;
  256. regulator-max-microvolt = <3440000>;
  257. };
  258. vdd_ldo5: ldo5 {
  259. regulator-min-microvolt = <900000>;
  260. regulator-max-microvolt = <3600000>;
  261. };
  262. vdd_ldo6: ldo6 {
  263. regulator-min-microvolt = <900000>;
  264. regulator-max-microvolt = <3600000>;
  265. };
  266. vdd_ldo7: ldo7 {
  267. regulator-min-microvolt = <900000>;
  268. regulator-max-microvolt = <3600000>;
  269. };
  270. vdd_ldo8: ldo8 {
  271. regulator-min-microvolt = <900000>;
  272. regulator-max-microvolt = <3600000>;
  273. };
  274. vdd_ldo9: ldo9 {
  275. regulator-min-microvolt = <950000>;
  276. regulator-max-microvolt = <3600000>;
  277. };
  278. vdd_ldo10: ldo10 {
  279. regulator-min-microvolt = <900000>;
  280. regulator-max-microvolt = <3600000>;
  281. };
  282. vdd_ldo11: ldo11 {
  283. regulator-min-microvolt = <900000>;
  284. regulator-max-microvolt = <3600000>;
  285. regulator-always-on;
  286. regulator-boot-on;
  287. };
  288. };
  289. };
  290. rtc@32 {
  291. compatible = "epson,rx8010";
  292. pinctrl-names = "default";
  293. pinctrl-0 = <&pinctrl_rtc>;
  294. reg = <0x32>;
  295. interrupt-parent = <&gpio4>;
  296. interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
  297. };
  298. };
  299. &pcie {
  300. pinctrl-names = "default";
  301. pinctrl-0 = <&pinctrl_pcie>;
  302. reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
  303. fsl,tx-swing-full = <103>;
  304. fsl,tx-swing-low = <103>;
  305. status = "okay";
  306. };
  307. &pwm1 {
  308. #pwm-cells = <2>;
  309. pinctrl-names = "default";
  310. pinctrl-0 = <&pinctrl_pwm1>;
  311. status = "okay";
  312. };
  313. &pwm2 {
  314. pinctrl-names = "default";
  315. pinctrl-0 = <&pinctrl_pwm2>;
  316. status = "disabled";
  317. };
  318. &sata {
  319. status = "okay";
  320. };
  321. &ssi1 {
  322. status = "okay";
  323. };
  324. &uart3 {
  325. pinctrl-names = "default";
  326. pinctrl-0 = <&pinctrl_uart3>;
  327. uart-has-rtscts;
  328. status = "okay";
  329. };
  330. &uart4 {
  331. pinctrl-names = "default";
  332. pinctrl-0 = <&pinctrl_uart4>;
  333. status = "okay";
  334. };
  335. &usbh1 {
  336. pinctrl-names = "default";
  337. pinctrl-0 = <&pinctrl_usbhub>;
  338. vbus-supply = <&reg_usb_h1_vbus>;
  339. reset-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
  340. status = "okay";
  341. };
  342. &usbotg {
  343. vbus-supply = <&reg_usb_otg_vbus>;
  344. pinctrl-names = "default";
  345. pinctrl-0 = <&pinctrl_usbotg>;
  346. disable-over-current;
  347. status = "okay";
  348. };
  349. &usdhc2 {
  350. pinctrl-names = "default";
  351. pinctrl-0 = <&pinctrl_usdhc2>;
  352. cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
  353. no-1-8-v;
  354. keep-power-in-suspend;
  355. wakeup-source;
  356. status = "okay";
  357. };
  358. &usdhc3 {
  359. pinctrl-names = "default";
  360. pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>;
  361. bus-width = <8>;
  362. vmmc-supply = <&vdd_bperi>;
  363. non-removable;
  364. keep-power-in-suspend;
  365. status = "okay";
  366. };
  367. &wdog1 {
  368. pinctrl-names = "default";
  369. pinctrl-0 = <&pinctrl_wdog>;
  370. fsl,ext-reset-output;
  371. };
  372. &iomuxc {
  373. pinctrl-names = "default";
  374. pinctrl-0 = <&pinctrl_hog>;
  375. pinctrl_audmux: audmuxgrp {
  376. fsl,pins = <
  377. MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
  378. MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x130b0
  379. MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
  380. MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
  381. >;
  382. };
  383. pinctrl_display: dispgrp {
  384. fsl,pins = <
  385. /* BLEN_OUT */
  386. MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
  387. /* LVDS_PPEN_OUT */
  388. MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
  389. >;
  390. };
  391. pinctrl_ecspi1: ecspi1grp {
  392. fsl,pins = <
  393. MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
  394. MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
  395. MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
  396. /* SPI1 CS */
  397. MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
  398. >;
  399. };
  400. pinctrl_ecspi5: ecspi5grp {
  401. fsl,pins = <
  402. MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x1b0b0
  403. MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x1b0b0
  404. MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x1b0b0
  405. MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0
  406. >;
  407. };
  408. pinctrl_enet: enetgrp {
  409. fsl,pins = <
  410. MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
  411. MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
  412. MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
  413. MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
  414. MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
  415. MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
  416. MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
  417. MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
  418. MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
  419. MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
  420. MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
  421. MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
  422. MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
  423. MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
  424. MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
  425. /* FEC Reset */
  426. MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0
  427. /* AR8033 Interrupt */
  428. MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
  429. >;
  430. };
  431. pinctrl_hog: hoggrp {
  432. fsl,pins = <
  433. /* GPIO 0-7 */
  434. MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
  435. MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
  436. MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
  437. MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
  438. MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
  439. MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x1b0b0
  440. MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0
  441. MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x1b0b0
  442. /* SUS_S3_OUT to CPLD */
  443. MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
  444. >;
  445. };
  446. pinctrl_i2c1: i2c1grp {
  447. fsl,pins = <
  448. MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
  449. MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
  450. >;
  451. };
  452. pinctrl_i2c2: i2c2grp {
  453. fsl,pins = <
  454. MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
  455. MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
  456. >;
  457. };
  458. pinctrl_i2c3: i2c3grp {
  459. fsl,pins = <
  460. MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
  461. MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
  462. >;
  463. };
  464. pinctrl_pcie: pciegrp {
  465. fsl,pins = <
  466. /* PCIe Reset */
  467. MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
  468. /* PCIe Wake */
  469. MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0
  470. >;
  471. };
  472. pinctrl_pmic: pmicgrp {
  473. fsl,pins = <
  474. /* PMIC Interrupt */
  475. MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
  476. >;
  477. };
  478. pinctrl_pwm1: pwm1grp {
  479. fsl,pins = <
  480. MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
  481. >;
  482. };
  483. pinctrl_pwm2: pwm2grp {
  484. fsl,pins = <
  485. MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
  486. >;
  487. };
  488. pinctrl_rtc: rtcgrp {
  489. fsl,pins = <
  490. /* RTC_INT */
  491. MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
  492. >;
  493. };
  494. pinctrl_uart3: uart3grp {
  495. fsl,pins = <
  496. MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
  497. MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
  498. MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
  499. MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
  500. >;
  501. };
  502. pinctrl_uart4: uart4grp {
  503. fsl,pins = <
  504. MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
  505. MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
  506. >;
  507. };
  508. pinctrl_usbhub: usbhubgrp {
  509. fsl,pins = <
  510. /* HUB_RESET */
  511. MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x1b0b0
  512. >;
  513. };
  514. pinctrl_usbotg: usbotggrp {
  515. fsl,pins = <
  516. MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
  517. >;
  518. };
  519. pinctrl_usbotg_vbus: usbotgvbusgrp {
  520. fsl,pins = <
  521. MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x000b0
  522. >;
  523. };
  524. pinctrl_usdhc2: usdhc2grp {
  525. fsl,pins = <
  526. MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
  527. MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
  528. MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
  529. MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
  530. MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
  531. MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
  532. /* uSDHC2 CD */
  533. MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
  534. >;
  535. };
  536. pinctrl_usdhc3: usdhc3grp {
  537. fsl,pins = <
  538. MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
  539. MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
  540. MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
  541. MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
  542. MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
  543. MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
  544. MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
  545. MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
  546. MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
  547. MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
  548. >;
  549. };
  550. pinctrl_usdhc3_reset: usdhc3grp-reset {
  551. fsl,pins = <
  552. MX6QDL_PAD_SD3_RST__SD3_RESET 0x170F9
  553. >;
  554. };
  555. pinctrl_usdhc4: usdhc4grp {
  556. fsl,pins = <
  557. MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
  558. MX6QDL_PAD_SD4_CLK__SD4_CLK 0x17059
  559. MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
  560. MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
  561. MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
  562. MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
  563. MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
  564. MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
  565. MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
  566. MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
  567. /* uSDHC4 CD */
  568. MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x1b0b0
  569. /* uSDHC4 SDIO PWR */
  570. MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0
  571. /* uSDHC4 SDIO WP */
  572. MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0
  573. /* uSDHC4 SDIO LED */
  574. MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0
  575. >;
  576. };
  577. pinctrl_wdog: wdoggrp {
  578. fsl,pins = <
  579. MX6QDL_PAD_GPIO_9__WDOG1_B 0x1b0b0
  580. >;
  581. };
  582. };