imx6dl-yapp4-common.dtsi 14 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // Copyright (C) 2015-2018 Y Soft Corporation, a.s.
  4. #include <dt-bindings/gpio/gpio.h>
  5. #include <dt-bindings/interrupt-controller/irq.h>
  6. #include <dt-bindings/input/input.h>
  7. #include <dt-bindings/leds/common.h>
  8. #include <dt-bindings/pwm/pwm.h>
  9. / {
  10. aliases: aliases {
  11. ethernet1 = &eth1;
  12. ethernet2 = &eth2;
  13. mmc0 = &usdhc3;
  14. mmc1 = &usdhc4;
  15. };
  16. backlight: backlight {
  17. compatible = "pwm-backlight";
  18. pwms = <&pwm1 0 500000 PWM_POLARITY_INVERTED>;
  19. brightness-levels = <0 32 64 128 255>;
  20. default-brightness-level = <32>;
  21. num-interpolated-steps = <8>;
  22. power-supply = <&sw2_reg>;
  23. status = "disabled";
  24. };
  25. lcd_display: display {
  26. compatible = "fsl,imx-parallel-display";
  27. #address-cells = <1>;
  28. #size-cells = <0>;
  29. interface-pix-fmt = "rgb24";
  30. pinctrl-names = "default";
  31. pinctrl-0 = <&pinctrl_ipu1>;
  32. status = "disabled";
  33. port@0 {
  34. reg = <0>;
  35. lcd_display_in: endpoint {
  36. remote-endpoint = <&ipu1_di0_disp0>;
  37. };
  38. };
  39. port@1 {
  40. reg = <1>;
  41. lcd_display_out: endpoint {
  42. remote-endpoint = <&lcd_panel_in>;
  43. };
  44. };
  45. };
  46. panel: panel {
  47. compatible = "dataimage,scf0700c48ggu18";
  48. power-supply = <&sw2_reg>;
  49. backlight = <&backlight>;
  50. status = "disabled";
  51. port {
  52. lcd_panel_in: endpoint {
  53. remote-endpoint = <&lcd_display_out>;
  54. };
  55. };
  56. };
  57. reg_pcie: regulator-pcie {
  58. compatible = "regulator-fixed";
  59. pinctrl-names = "default";
  60. pinctrl-0 = <&pinctrl_pcie_reg>;
  61. regulator-name = "MPCIE_3V3";
  62. regulator-min-microvolt = <3300000>;
  63. regulator-max-microvolt = <3300000>;
  64. gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>;
  65. enable-active-high;
  66. status = "disabled";
  67. };
  68. reg_usb_h1_vbus: regulator-usb-h1-vbus {
  69. compatible = "regulator-fixed";
  70. pinctrl-names = "default";
  71. pinctrl-0 = <&pinctrl_usbh1_vbus>;
  72. regulator-name = "usb_h1_vbus";
  73. regulator-min-microvolt = <5000000>;
  74. regulator-max-microvolt = <5000000>;
  75. gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
  76. enable-active-high;
  77. status = "disabled";
  78. };
  79. reg_usb_otg_vbus: regulator-usb-otg-vbus {
  80. compatible = "regulator-fixed";
  81. pinctrl-names = "default";
  82. pinctrl-0 = <&pinctrl_usbotg_vbus>;
  83. regulator-name = "usb_otg_vbus";
  84. regulator-min-microvolt = <5000000>;
  85. regulator-max-microvolt = <5000000>;
  86. gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
  87. enable-active-high;
  88. status = "okay";
  89. };
  90. };
  91. &fec {
  92. pinctrl-names = "default";
  93. pinctrl-0 = <&pinctrl_enet>;
  94. phy-mode = "rgmii-id";
  95. phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
  96. phy-reset-duration = <20>;
  97. phy-supply = <&sw2_reg>;
  98. status = "okay";
  99. fixed-link {
  100. speed = <1000>;
  101. full-duplex;
  102. };
  103. mdio {
  104. #address-cells = <1>;
  105. #size-cells = <0>;
  106. phy_port2: phy@1 {
  107. reg = <1>;
  108. };
  109. phy_port3: phy@2 {
  110. reg = <2>;
  111. };
  112. switch@10 {
  113. compatible = "qca,qca8334";
  114. reg = <10>;
  115. switch_ports: ports {
  116. #address-cells = <1>;
  117. #size-cells = <0>;
  118. ethphy0: port@0 {
  119. reg = <0>;
  120. label = "cpu";
  121. phy-mode = "rgmii-id";
  122. ethernet = <&fec>;
  123. fixed-link {
  124. speed = <1000>;
  125. full-duplex;
  126. };
  127. };
  128. eth2: port@2 {
  129. reg = <2>;
  130. label = "eth2";
  131. phy-handle = <&phy_port2>;
  132. };
  133. eth1: port@3 {
  134. reg = <3>;
  135. label = "eth1";
  136. phy-handle = <&phy_port3>;
  137. };
  138. };
  139. };
  140. };
  141. };
  142. &hdmi {
  143. pinctrl-names = "default";
  144. pinctrl-0 = <&pinctrl_hdmi_cec>;
  145. ddc-i2c-bus = <&i2c2>;
  146. status = "disabled";
  147. };
  148. &i2c2 {
  149. clock-frequency = <100000>;
  150. pinctrl-names = "default";
  151. pinctrl-0 = <&pinctrl_i2c2>;
  152. status = "okay";
  153. pmic@8 {
  154. compatible = "fsl,pfuze200";
  155. pinctrl-names = "default";
  156. pinctrl-0 = <&pinctrl_pmic>;
  157. reg = <0x8>;
  158. regulators {
  159. sw1a_reg: sw1ab {
  160. regulator-min-microvolt = <300000>;
  161. regulator-max-microvolt = <1875000>;
  162. regulator-boot-on;
  163. regulator-always-on;
  164. regulator-ramp-delay = <6250>;
  165. };
  166. sw2_reg: sw2 {
  167. regulator-min-microvolt = <800000>;
  168. regulator-max-microvolt = <3300000>;
  169. regulator-boot-on;
  170. regulator-always-on;
  171. };
  172. sw3a_reg: sw3a {
  173. regulator-min-microvolt = <400000>;
  174. regulator-max-microvolt = <1975000>;
  175. regulator-boot-on;
  176. regulator-always-on;
  177. };
  178. sw3b_reg: sw3b {
  179. regulator-min-microvolt = <400000>;
  180. regulator-max-microvolt = <1975000>;
  181. regulator-boot-on;
  182. regulator-always-on;
  183. };
  184. swbst_reg: swbst {
  185. regulator-min-microvolt = <5000000>;
  186. regulator-max-microvolt = <5150000>;
  187. };
  188. vgen1_reg: vgen1 {
  189. regulator-min-microvolt = <800000>;
  190. regulator-max-microvolt = <1550000>;
  191. };
  192. vgen2_reg: vgen2 {
  193. regulator-min-microvolt = <800000>;
  194. regulator-max-microvolt = <1550000>;
  195. };
  196. vgen3_reg: vgen3 {
  197. regulator-min-microvolt = <1800000>;
  198. regulator-max-microvolt = <3300000>;
  199. regulator-always-on;
  200. };
  201. vgen4_reg: vgen4 {
  202. regulator-min-microvolt = <1800000>;
  203. regulator-max-microvolt = <3300000>;
  204. regulator-always-on;
  205. };
  206. vgen5_reg: vgen5 {
  207. regulator-min-microvolt = <1800000>;
  208. regulator-max-microvolt = <3300000>;
  209. regulator-always-on;
  210. };
  211. vgen6_reg: vgen6 {
  212. regulator-min-microvolt = <1800000>;
  213. regulator-max-microvolt = <3300000>;
  214. regulator-always-on;
  215. };
  216. vref_reg: vrefddr {
  217. regulator-boot-on;
  218. regulator-always-on;
  219. };
  220. vsnvs_reg: vsnvs {
  221. regulator-min-microvolt = <1000000>;
  222. regulator-max-microvolt = <3000000>;
  223. regulator-boot-on;
  224. regulator-always-on;
  225. };
  226. };
  227. };
  228. leds: led-controller@30 {
  229. compatible = "ti,lp5562";
  230. reg = <0x30>;
  231. clock-mode = /bits/ 8 <1>;
  232. status = "disabled";
  233. #address-cells = <1>;
  234. #size-cells = <0>;
  235. led@0 {
  236. chan-name = "R";
  237. led-cur = /bits/ 8 <0x20>;
  238. max-cur = /bits/ 8 <0x60>;
  239. reg = <0>;
  240. color = <LED_COLOR_ID_RED>;
  241. };
  242. led@1 {
  243. chan-name = "G";
  244. led-cur = /bits/ 8 <0x20>;
  245. max-cur = /bits/ 8 <0x60>;
  246. reg = <1>;
  247. color = <LED_COLOR_ID_GREEN>;
  248. };
  249. led@2 {
  250. chan-name = "B";
  251. led-cur = /bits/ 8 <0x20>;
  252. max-cur = /bits/ 8 <0x60>;
  253. reg = <2>;
  254. color = <LED_COLOR_ID_BLUE>;
  255. };
  256. };
  257. eeprom@57 {
  258. compatible = "atmel,24c128";
  259. reg = <0x57>;
  260. pagesize = <64>;
  261. status = "okay";
  262. };
  263. touchscreen: touchscreen@5c {
  264. compatible = "pixcir,pixcir_tangoc";
  265. reg = <0x5c>;
  266. pinctrl-0 = <&pinctrl_touch>;
  267. interrupt-parent = <&gpio4>;
  268. interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
  269. attb-gpio = <&gpio4 5 GPIO_ACTIVE_HIGH>;
  270. reset-gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
  271. touchscreen-size-x = <800>;
  272. touchscreen-size-y = <480>;
  273. status = "disabled";
  274. };
  275. };
  276. &i2c3 {
  277. clock-frequency = <100000>;
  278. pinctrl-names = "default";
  279. pinctrl-0 = <&pinctrl_i2c3>;
  280. status = "okay";
  281. oled_1309: oled@3c {
  282. compatible = "solomon,ssd1309fb-i2c";
  283. reg = <0x3c>;
  284. solomon,height = <64>;
  285. solomon,width = <128>;
  286. solomon,page-offset = <0>;
  287. solomon,segment-no-remap;
  288. solomon,prechargep2 = <15>;
  289. reset-gpios = <&gpio_oled 1 GPIO_ACTIVE_LOW>;
  290. vbat-supply = <&sw2_reg>;
  291. status = "disabled";
  292. };
  293. oled_1305: oled@3d {
  294. compatible = "solomon,ssd1305fb-i2c";
  295. reg = <0x3d>;
  296. solomon,height = <64>;
  297. solomon,width = <128>;
  298. solomon,page-offset = <0>;
  299. solomon,col-offset = <4>;
  300. solomon,prechargep2 = <15>;
  301. reset-gpios = <&gpio_oled 1 GPIO_ACTIVE_LOW>;
  302. vbat-supply = <&sw2_reg>;
  303. status = "disabled";
  304. };
  305. gpio_oled: gpio@41 {
  306. compatible = "nxp,pca9536";
  307. gpio-controller;
  308. #gpio-cells = <2>;
  309. reg = <0x41>;
  310. vcc-supply = <&sw2_reg>;
  311. status = "disabled";
  312. };
  313. touchkeys: keys@5a {
  314. compatible = "fsl,mpr121-touchkey";
  315. reg = <0x5a>;
  316. vdd-supply = <&sw2_reg>;
  317. autorepeat;
  318. linux,keycodes = <KEY_1>, <KEY_2>, <KEY_3>, <KEY_4>, <KEY_5>,
  319. <KEY_6>, <KEY_7>, <KEY_8>, <KEY_9>,
  320. <KEY_BACKSPACE>, <KEY_0>, <KEY_ENTER>;
  321. poll-interval = <50>;
  322. status = "disabled";
  323. };
  324. };
  325. &iomuxc {
  326. pinctrl_enet: enetgrp {
  327. fsl,pins = <
  328. MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b020
  329. MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b020
  330. MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b020
  331. MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b020
  332. MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b020
  333. MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b020
  334. MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b020
  335. MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b020
  336. MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b020
  337. MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b020
  338. MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b020
  339. MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b020
  340. MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b020
  341. MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b020
  342. MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b010
  343. MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b010
  344. MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b098
  345. >;
  346. };
  347. pinctrl_hdmi_cec: hdmicecgrp {
  348. fsl,pins = <
  349. MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1b898
  350. >;
  351. };
  352. pinctrl_i2c2: i2c2grp {
  353. fsl,pins = <
  354. MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b899
  355. MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b899
  356. >;
  357. };
  358. pinctrl_i2c3: i2c3grp {
  359. fsl,pins = <
  360. MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b899
  361. MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b899
  362. >;
  363. };
  364. pinctrl_ipu1: ipu1grp {
  365. fsl,pins = <
  366. MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
  367. MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
  368. MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
  369. MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
  370. MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
  371. MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
  372. MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
  373. MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
  374. MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
  375. MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
  376. MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
  377. MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
  378. MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
  379. MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
  380. MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
  381. MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
  382. MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
  383. MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
  384. MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
  385. MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
  386. MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
  387. MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
  388. MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
  389. MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
  390. MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
  391. MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
  392. MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
  393. >;
  394. };
  395. pinctrl_pcie: pciegrp {
  396. fsl,pins = <
  397. MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b098
  398. MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b098
  399. MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b098
  400. >;
  401. };
  402. pinctrl_pcie_reg: pciereggrp {
  403. fsl,pins = <
  404. MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b098
  405. >;
  406. };
  407. pinctrl_pmic: pmicgrp {
  408. fsl,pins = <
  409. MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b098
  410. >;
  411. };
  412. pinctrl_pwm1: pwm1grp {
  413. fsl,pins = <
  414. MX6QDL_PAD_GPIO_9__PWM1_OUT 0x8
  415. >;
  416. };
  417. pinctrl_touch: touchgrp {
  418. fsl,pins = <
  419. MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b098
  420. MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b098
  421. >;
  422. };
  423. pinctrl_uart1: uart1grp {
  424. fsl,pins = <
  425. MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0a8
  426. MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0a8
  427. >;
  428. };
  429. pinctrl_uart2: uart2grp {
  430. fsl,pins = <
  431. MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b098
  432. MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b098
  433. >;
  434. };
  435. pinctrl_usbh1: usbh1grp {
  436. fsl,pins = <
  437. MX6QDL_PAD_EIM_D30__USB_H1_OC 0x1b098
  438. >;
  439. };
  440. pinctrl_usbh1_vbus: usbh1-vbus {
  441. fsl,pins = <
  442. MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x98
  443. >;
  444. };
  445. pinctrl_usbotg: usbotggrp {
  446. fsl,pins = <
  447. MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x1b098
  448. MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b098
  449. >;
  450. };
  451. pinctrl_usbotg_vbus: usbotg-vbus {
  452. fsl,pins = <
  453. MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x98
  454. >;
  455. };
  456. pinctrl_usdhc3: usdhc3grp {
  457. fsl,pins = <
  458. MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x1b018
  459. MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b018
  460. MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
  461. MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
  462. MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
  463. MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
  464. MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
  465. MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
  466. >;
  467. };
  468. pinctrl_usdhc4: usdhc4grp {
  469. fsl,pins = <
  470. MX6QDL_PAD_SD4_CMD__SD4_CMD 0x1f069
  471. MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10069
  472. MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17069
  473. MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17069
  474. MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17069
  475. MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17069
  476. MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17069
  477. MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17069
  478. MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17069
  479. MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17069
  480. >;
  481. };
  482. pinctrl_wdog: wdoggrp {
  483. fsl,pins = <
  484. MX6QDL_PAD_GPIO_1__WDOG2_B 0x1b0b0
  485. >;
  486. };
  487. };
  488. &ipu1_di0_disp0 {
  489. remote-endpoint = <&lcd_display_in>;
  490. };
  491. &pcie {
  492. pinctrl-names = "default";
  493. pinctrl-0 = <&pinctrl_pcie>;
  494. reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
  495. vpcie-supply = <&reg_pcie>;
  496. status = "disabled";
  497. };
  498. &pwm1 {
  499. pinctrl-names = "default";
  500. pinctrl-0 = <&pinctrl_pwm1>;
  501. status = "disabled";
  502. };
  503. &uart1 {
  504. pinctrl-names = "default";
  505. pinctrl-0 = <&pinctrl_uart1>;
  506. status = "okay";
  507. };
  508. &uart2 {
  509. pinctrl-names = "default";
  510. pinctrl-0 = <&pinctrl_uart2>;
  511. status = "okay";
  512. };
  513. &usbh1 {
  514. pinctrl-names = "default";
  515. pinctrl-0 = <&pinctrl_usbh1>;
  516. vbus-supply = <&reg_usb_h1_vbus>;
  517. over-current-active-low;
  518. status = "disabled";
  519. };
  520. &usbotg {
  521. pinctrl-names = "default";
  522. pinctrl-0 = <&pinctrl_usbotg>;
  523. vbus-supply = <&reg_usb_otg_vbus>;
  524. over-current-active-low;
  525. srp-disable;
  526. hnp-disable;
  527. adp-disable;
  528. status = "okay";
  529. };
  530. &usbphy1 {
  531. fsl,tx-d-cal = <106>;
  532. status = "okay";
  533. };
  534. &usbphy2 {
  535. fsl,tx-d-cal = <109>;
  536. status = "disabled";
  537. };
  538. &usdhc3 {
  539. pinctrl-names = "default";
  540. pinctrl-0 = <&pinctrl_usdhc3>;
  541. bus-width = <4>;
  542. cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
  543. wp-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
  544. no-1-8-v;
  545. keep-power-in-suspend;
  546. wakeup-source;
  547. vmmc-supply = <&sw2_reg>;
  548. status = "disabled";
  549. };
  550. &usdhc4 {
  551. pinctrl-names = "default";
  552. pinctrl-0 = <&pinctrl_usdhc4>;
  553. bus-width = <8>;
  554. non-removable;
  555. no-1-8-v;
  556. keep-power-in-suspend;
  557. vmmc-supply = <&sw2_reg>;
  558. status = "okay";
  559. };
  560. &wdog1 {
  561. status = "disabled";
  562. };
  563. &wdog2 {
  564. pinctrl-names = "default";
  565. pinctrl-0 = <&pinctrl_wdog>;
  566. fsl,ext-reset-output;
  567. status = "okay";
  568. };