imx6dl-skov-revc-lt6.dts 2.8 KB

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  1. // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2. //
  3. // Copyright (C) 2020 Pengutronix, Ulrich Oelmann <[email protected]>
  4. /dts-v1/;
  5. #include "imx6dl.dtsi"
  6. #include "imx6qdl-skov-cpu.dtsi"
  7. #include "imx6qdl-skov-cpu-revc.dtsi"
  8. / {
  9. model = "SKOV IMX6 CPU SoloCore";
  10. compatible = "skov,imx6dl-skov-revc-lt6", "fsl,imx6dl";
  11. backlight: backlight {
  12. compatible = "pwm-backlight";
  13. pinctrl-names = "default";
  14. pinctrl-0 = <&pinctrl_backlight>;
  15. enable-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>;
  16. pwms = <&pwm2 0 20000 0>;
  17. brightness-levels = <0 255>;
  18. num-interpolated-steps = <17>;
  19. default-brightness-level = <8>;
  20. power-supply = <&reg_24v0>;
  21. };
  22. display {
  23. compatible = "fsl,imx-parallel-display";
  24. pinctrl-names = "default";
  25. pinctrl-0 = <&pinctrl_ipu1>;
  26. #address-cells = <1>;
  27. #size-cells = <0>;
  28. port@0 {
  29. reg = <0>;
  30. display0_in: endpoint {
  31. remote-endpoint = <&ipu1_di0_disp0>;
  32. };
  33. };
  34. port@1 {
  35. reg = <1>;
  36. display0_out: endpoint {
  37. remote-endpoint = <&panel_in>;
  38. };
  39. };
  40. };
  41. panel {
  42. compatible = "logictechno,lttd800480070-l6wh-rt";
  43. backlight = <&backlight>;
  44. power-supply = <&reg_3v3>;
  45. port {
  46. panel_in: endpoint {
  47. remote-endpoint = <&display0_out>;
  48. };
  49. };
  50. };
  51. };
  52. &ipu1_di0_disp0 {
  53. remote-endpoint = <&display0_in>;
  54. };
  55. &iomuxc {
  56. pinctrl_backlight: backlightgrp {
  57. fsl,pins = <
  58. MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 0x58
  59. >;
  60. };
  61. pinctrl_ipu1: ipu1grp {
  62. fsl,pins = <
  63. MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
  64. MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
  65. MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
  66. MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
  67. MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
  68. MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
  69. MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
  70. MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
  71. MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
  72. MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
  73. MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
  74. MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
  75. MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
  76. MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
  77. MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
  78. MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
  79. MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
  80. MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
  81. MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
  82. MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
  83. MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
  84. MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
  85. MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
  86. MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
  87. MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
  88. MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
  89. MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
  90. MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
  91. >;
  92. };
  93. };