imx6dl-prtvt7.dts 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. /*
  3. * Copyright (c) 2016 Protonic Holland
  4. */
  5. /dts-v1/;
  6. #include "imx6dl.dtsi"
  7. #include "imx6qdl-prti6q.dtsi"
  8. #include <dt-bindings/display/sdtv-standards.h>
  9. #include <dt-bindings/input/input.h>
  10. #include <dt-bindings/leds/common.h>
  11. #include <dt-bindings/sound/fsl-imx-audmux.h>
  12. / {
  13. model = "Protonic VT7";
  14. compatible = "prt,prtvt7", "fsl,imx6dl";
  15. memory@10000000 {
  16. device_type = "memory";
  17. reg = <0x10000000 0x20000000>;
  18. };
  19. backlight_lcd: backlight-lcd {
  20. compatible = "pwm-backlight";
  21. pwms = <&pwm1 0 500000 0>;
  22. brightness-levels = <0 20 81 248 1000>;
  23. default-brightness-level = <20>;
  24. num-interpolated-steps = <21>;
  25. power-supply = <&reg_bl_12v0>;
  26. };
  27. display {
  28. compatible = "fsl,imx-parallel-display";
  29. pinctrl-0 = <&pinctrl_ipu1_disp>;
  30. pinctrl-names = "default";
  31. #address-cells = <1>;
  32. #size-cells = <0>;
  33. port@0 {
  34. reg = <0>;
  35. display_in: endpoint {
  36. remote-endpoint = <&ipu1_di0_disp0>;
  37. };
  38. };
  39. port@1 {
  40. reg = <1>;
  41. display_out: endpoint {
  42. remote-endpoint = <&panel_in>;
  43. };
  44. };
  45. };
  46. iio-hwmon {
  47. compatible = "iio-hwmon";
  48. io-channels = <&vdiv_vaccu>;
  49. };
  50. keys {
  51. compatible = "gpio-keys";
  52. autorepeat;
  53. key-esc {
  54. label = "GPIO Key ESC";
  55. linux,code = <KEY_ESC>;
  56. gpios = <&gpio_pca 0 GPIO_ACTIVE_LOW>;
  57. };
  58. key-up {
  59. label = "GPIO Key UP";
  60. linux,code = <KEY_UP>;
  61. gpios = <&gpio_pca 1 GPIO_ACTIVE_LOW>;
  62. };
  63. key-down {
  64. label = "GPIO Key DOWN";
  65. linux,code = <KEY_DOWN>;
  66. gpios = <&gpio_pca 4 GPIO_ACTIVE_LOW>;
  67. };
  68. key-enter {
  69. label = "GPIO Key Enter";
  70. linux,code = <KEY_ENTER>;
  71. gpios = <&gpio_pca 3 GPIO_ACTIVE_LOW>;
  72. };
  73. key-cycle {
  74. label = "GPIO Key CYCLE";
  75. linux,code = <KEY_CYCLEWINDOWS>;
  76. gpios = <&gpio_pca 2 GPIO_ACTIVE_LOW>;
  77. };
  78. key-f1 {
  79. label = "GPIO Key F1";
  80. linux,code = <KEY_F1>;
  81. gpios = <&gpio_pca 14 GPIO_ACTIVE_LOW>;
  82. };
  83. key-f2 {
  84. label = "GPIO Key F2";
  85. linux,code = <KEY_F2>;
  86. gpios = <&gpio_pca 13 GPIO_ACTIVE_LOW>;
  87. };
  88. key-f3 {
  89. label = "GPIO Key F3";
  90. linux,code = <KEY_F3>;
  91. gpios = <&gpio_pca 12 GPIO_ACTIVE_LOW>;
  92. };
  93. key-f4 {
  94. label = "GPIO Key F4";
  95. linux,code = <KEY_F4>;
  96. gpios = <&gpio_pca 11 GPIO_ACTIVE_LOW>;
  97. };
  98. key-f5 {
  99. label = "GPIO Key F5";
  100. linux,code = <KEY_F5>;
  101. gpios = <&gpio_pca 10 GPIO_ACTIVE_LOW>;
  102. };
  103. key-f6 {
  104. label = "GPIO Key F6";
  105. linux,code = <KEY_F6>;
  106. gpios = <&gpio_pca 5 GPIO_ACTIVE_LOW>;
  107. };
  108. key-f7 {
  109. label = "GPIO Key F7";
  110. linux,code = <KEY_F7>;
  111. gpios = <&gpio_pca 6 GPIO_ACTIVE_LOW>;
  112. };
  113. key-f8 {
  114. label = "GPIO Key F8";
  115. linux,code = <KEY_F8>;
  116. gpios = <&gpio_pca 7 GPIO_ACTIVE_LOW>;
  117. };
  118. key-f9 {
  119. label = "GPIO Key F9";
  120. linux,code = <KEY_F9>;
  121. gpios = <&gpio_pca 8 GPIO_ACTIVE_LOW>;
  122. };
  123. key-f10 {
  124. label = "GPIO Key F10";
  125. linux,code = <KEY_F10>;
  126. gpios = <&gpio_pca 9 GPIO_ACTIVE_LOW>;
  127. };
  128. };
  129. leds {
  130. compatible = "gpio-leds";
  131. pinctrl-names = "default";
  132. pinctrl-0 = <&pinctrl_leds>;
  133. led-debug0 {
  134. function = LED_FUNCTION_STATUS;
  135. gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
  136. linux,default-trigger = "heartbeat";
  137. };
  138. };
  139. panel {
  140. compatible = "innolux,g070y2-t02";
  141. backlight = <&backlight_lcd>;
  142. power-supply = <&reg_3v3>;
  143. port {
  144. panel_in: endpoint {
  145. remote-endpoint = <&display_out>;
  146. };
  147. };
  148. };
  149. connector {
  150. compatible = "composite-video-connector";
  151. label = "Composite0";
  152. sdtv-standards = <SDTV_STD_PAL_B>;
  153. port {
  154. comp0_out: endpoint {
  155. remote-endpoint = <&tvp5150_comp0_in>;
  156. };
  157. };
  158. };
  159. reg_bl_12v0: regulator-bl-12v0 {
  160. compatible = "regulator-fixed";
  161. pinctrl-names = "default";
  162. pinctrl-0 = <&pinctrl_reg_bl_12v0>;
  163. regulator-name = "bl-12v0";
  164. regulator-min-microvolt = <12000000>;
  165. regulator-max-microvolt = <12000000>;
  166. gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
  167. enable-active-high;
  168. };
  169. reg_3v3: regulator-3v3 {
  170. compatible = "regulator-fixed";
  171. regulator-name = "3v3";
  172. regulator-min-microvolt = <3300000>;
  173. regulator-max-microvolt = <3300000>;
  174. };
  175. reg_1v8: regulator-1v8 {
  176. compatible = "regulator-fixed";
  177. regulator-name = "1v8";
  178. regulator-min-microvolt = <1800000>;
  179. regulator-max-microvolt = <1800000>;
  180. };
  181. sound {
  182. compatible = "simple-audio-card";
  183. simple-audio-card,name = "prti6q-sgtl5000";
  184. simple-audio-card,format = "i2s";
  185. simple-audio-card,widgets =
  186. "Microphone", "Microphone Jack",
  187. "Line", "Line In Jack",
  188. "Headphone", "Headphone Jack",
  189. "Speaker", "External Speaker";
  190. simple-audio-card,routing =
  191. "MIC_IN", "Microphone Jack",
  192. "LINE_IN", "Line In Jack",
  193. "Headphone Jack", "HP_OUT",
  194. "External Speaker", "LINE_OUT";
  195. simple-audio-card,cpu {
  196. sound-dai = <&ssi1>;
  197. system-clock-frequency = <0>;
  198. };
  199. simple-audio-card,codec {
  200. sound-dai = <&sgtl5000>;
  201. bitclock-master;
  202. frame-master;
  203. };
  204. };
  205. thermal-zones {
  206. chassis-thermal {
  207. polling-delay = <20000>;
  208. polling-delay-passive = <0>;
  209. thermal-sensors = <&tsens0>;
  210. };
  211. touch-thermal0 {
  212. polling-delay = <20000>;
  213. polling-delay-passive = <0>;
  214. thermal-sensors = <&touch_temp0>;
  215. };
  216. touch-thermal1 {
  217. polling-delay = <20000>;
  218. polling-delay-passive = <0>;
  219. thermal-sensors = <&touch_temp1>;
  220. };
  221. };
  222. touchscreen {
  223. compatible = "resistive-adc-touch";
  224. io-channels = <&adc_ts 1>, <&adc_ts 3>, <&adc_ts 4>,
  225. <&adc_ts 5>;
  226. io-channel-names = "y", "z1", "z2", "x";
  227. touchscreen-min-pressure = <64687>;
  228. touchscreen-inverted-x;
  229. touchscreen-inverted-y;
  230. touchscreen-x-plate-ohms = <300>;
  231. touchscreen-y-plate-ohms = <800>;
  232. };
  233. touch_temp0: touch-temperature-sensor0 {
  234. compatible = "generic-adc-thermal";
  235. #thermal-sensor-cells = <0>;
  236. io-channels = <&adc_ts 0>;
  237. io-channel-names = "sensor-channel";
  238. temperature-lookup-table = < (-40000) 736
  239. 85000 474>;
  240. };
  241. touch_temp1: touch-temperature-sensor1 {
  242. compatible = "generic-adc-thermal";
  243. #thermal-sensor-cells = <0>;
  244. io-channels = <&adc_ts 7>;
  245. io-channel-names = "sensor-channel";
  246. temperature-lookup-table = < (-40000) 826
  247. 85000 609>;
  248. };
  249. vdiv_vaccu: voltage-divider-vaccu {
  250. compatible = "voltage-divider";
  251. io-channels = <&adc_ts 2>;
  252. output-ohms = <2500>;
  253. full-ohms = <64000>;
  254. #io-channel-cells = <0>;
  255. };
  256. };
  257. &audmux {
  258. pinctrl-names = "default";
  259. pinctrl-0 = <&pinctrl_audmux>;
  260. status = "okay";
  261. mux-ssi1 {
  262. fsl,audmux-port = <0>;
  263. fsl,port-config = <
  264. IMX_AUDMUX_V2_PTCR_SYN 0
  265. IMX_AUDMUX_V2_PTCR_TFSEL(2) 0
  266. IMX_AUDMUX_V2_PTCR_TCSEL(2) 0
  267. IMX_AUDMUX_V2_PTCR_TFSDIR 0
  268. IMX_AUDMUX_V2_PTCR_TCLKDIR IMX_AUDMUX_V2_PDCR_RXDSEL(2)
  269. >;
  270. };
  271. mux-pins3 {
  272. fsl,audmux-port = <2>;
  273. fsl,port-config = <
  274. IMX_AUDMUX_V2_PTCR_SYN IMX_AUDMUX_V2_PDCR_RXDSEL(0)
  275. 0 IMX_AUDMUX_V2_PDCR_TXRXEN
  276. >;
  277. };
  278. };
  279. &can1 {
  280. pinctrl-0 = <&pinctrl_can1 &pinctrl_can1phy>;
  281. };
  282. &clks {
  283. assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>;
  284. assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
  285. };
  286. &ecspi2 {
  287. cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
  288. pinctrl-names = "default";
  289. pinctrl-0 = <&pinctrl_ecspi2>;
  290. status = "okay";
  291. adc_ts: adc@0 {
  292. compatible = "ti,tsc2046e-adc";
  293. reg = <0>;
  294. pinctrl-0 = <&pinctrl_tsc>;
  295. pinctrl-names = "default";
  296. spi-max-frequency = <1000000>;
  297. interrupts-extended = <&gpio3 20 IRQ_TYPE_LEVEL_LOW>;
  298. #io-channel-cells = <1>;
  299. #address-cells = <1>;
  300. #size-cells = <0>;
  301. channel@1 {
  302. reg = <1>;
  303. settling-time-us = <700>;
  304. oversampling-ratio = <5>;
  305. };
  306. channel@3 {
  307. reg = <3>;
  308. settling-time-us = <700>;
  309. oversampling-ratio = <5>;
  310. };
  311. channel@4 {
  312. reg = <4>;
  313. settling-time-us = <700>;
  314. oversampling-ratio = <5>;
  315. };
  316. channel@5 {
  317. reg = <5>;
  318. settling-time-us = <700>;
  319. oversampling-ratio = <5>;
  320. };
  321. };
  322. };
  323. &i2c1 {
  324. sgtl5000: audio-codec@a {
  325. compatible = "fsl,sgtl5000";
  326. reg = <0xa>;
  327. pinctrl-names = "default";
  328. pinctrl-0 = <&pinctrl_codec>;
  329. #sound-dai-cells = <0>;
  330. clocks = <&clks 201>;
  331. VDDA-supply = <&reg_3v3>;
  332. VDDIO-supply = <&reg_3v3>;
  333. VDDD-supply = <&reg_1v8>;
  334. };
  335. video@5c {
  336. compatible = "ti,tvp5150";
  337. reg = <0x5c>;
  338. #address-cells = <1>;
  339. #size-cells = <0>;
  340. port@0 {
  341. reg = <0>;
  342. tvp5150_comp0_in: endpoint {
  343. remote-endpoint = <&comp0_out>;
  344. };
  345. };
  346. /* Output port 2 is video output pad */
  347. port@2 {
  348. reg = <2>;
  349. tvp5151_to_ipu1_csi0_mux: endpoint {
  350. remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
  351. };
  352. };
  353. };
  354. };
  355. &i2c3 {
  356. rtc@51 {
  357. compatible = "nxp,pcf8563";
  358. reg = <0x51>;
  359. };
  360. tsens0: temperature-sensor@70 {
  361. compatible = "ti,tmp103";
  362. reg = <0x70>;
  363. #thermal-sensor-cells = <0>;
  364. };
  365. gpio_pca: gpio@74 {
  366. compatible = "nxp,pca9539";
  367. reg = <0x74>;
  368. interrupts-extended = <&gpio4 5 IRQ_TYPE_LEVEL_LOW>;
  369. #gpio-cells = <2>;
  370. gpio-controller;
  371. };
  372. };
  373. &ipu1 {
  374. pinctrl-names = "default";
  375. pinctrl-0 = <&pinctrl_ipu1_csi0>;
  376. status = "okay";
  377. };
  378. &ipu1_di0_disp0 {
  379. remote-endpoint = <&display_in>;
  380. };
  381. &ipu1_csi0_mux_from_parallel_sensor {
  382. remote-endpoint = <&tvp5151_to_ipu1_csi0_mux>;
  383. };
  384. &pwm1 {
  385. pinctrl-names = "default";
  386. pinctrl-0 = <&pinctrl_pwm1>;
  387. status = "okay";
  388. };
  389. &snvs_poweroff {
  390. status = "okay";
  391. };
  392. &snvs_pwrkey {
  393. status = "okay";
  394. };
  395. &ssi1 {
  396. status = "okay";
  397. };
  398. &usbh1 {
  399. status = "disabled";
  400. };
  401. &iomuxc {
  402. pinctrl_audmux: audmuxgrp {
  403. fsl,pins = <
  404. MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x030b0
  405. MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
  406. MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
  407. MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
  408. MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
  409. >;
  410. };
  411. pinctrl_can1phy: can1phy {
  412. fsl,pins = <
  413. /* CAN1_SR */
  414. MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x13070
  415. /* CAN1_TERM */
  416. MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
  417. >;
  418. };
  419. pinctrl_codec: codecgrp {
  420. fsl,pins = <
  421. /* AUDIO_nRESET */
  422. MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x1f0b0
  423. >;
  424. };
  425. pinctrl_ecspi2: ecspi2grp {
  426. fsl,pins = <
  427. MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
  428. MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
  429. MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
  430. MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x000b1
  431. >;
  432. };
  433. pinctrl_ipu1_csi0: ipu1csi0grp {
  434. fsl,pins = <
  435. MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
  436. MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
  437. MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
  438. MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
  439. MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
  440. MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
  441. MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
  442. MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
  443. MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
  444. /* ITU656_nRESET */
  445. MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
  446. /* ITU656_nPDN */
  447. MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b0b0
  448. >;
  449. };
  450. pinctrl_ipu1_disp: ipudisp1grp {
  451. fsl,pins = <
  452. MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0xb0
  453. MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0xb0
  454. MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0xb0
  455. MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0xb0
  456. MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0xb0
  457. MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0xb0
  458. MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0xb0
  459. MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0xb0
  460. MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0xb0
  461. MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0xb0
  462. MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0xb0
  463. MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0xb0
  464. MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0xb0
  465. MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0xb0
  466. MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0xb0
  467. MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0xb0
  468. MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0xb0
  469. MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0xb0
  470. MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0xb0
  471. MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0xb0
  472. MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0xb0
  473. MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0xb0
  474. MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0xb0
  475. MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0xb0
  476. MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0xb0
  477. MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0xb0
  478. >;
  479. };
  480. pinctrl_leds: ledsgrp {
  481. fsl,pins = <
  482. MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
  483. >;
  484. };
  485. pinctrl_pwm1: pwm1grp {
  486. fsl,pins = <
  487. MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b0
  488. >;
  489. };
  490. pinctrl_reg_bl_12v0: 12blgrp {
  491. fsl,pins = <
  492. MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0
  493. >;
  494. };
  495. pinctrl_tsc: tscgrp {
  496. fsl,pins = <
  497. MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b0
  498. MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
  499. >;
  500. };
  501. };