imx6dl-prtmvt.dts 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852
  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. /*
  3. * Copyright (c) 2016 Protonic Holland
  4. * Copyright (c) 2020 Oleksij Rempel <[email protected]>, Pengutronix
  5. */
  6. /dts-v1/;
  7. #include <dt-bindings/display/sdtv-standards.h>
  8. #include <dt-bindings/gpio/gpio.h>
  9. #include <dt-bindings/input/input.h>
  10. #include <dt-bindings/leds/common.h>
  11. #include <dt-bindings/media/tvp5150.h>
  12. #include <dt-bindings/sound/fsl-imx-audmux.h>
  13. #include "imx6dl.dtsi"
  14. / {
  15. model = "Protonic MVT board";
  16. compatible = "prt,prtmvt", "fsl,imx6dl";
  17. chosen {
  18. stdout-path = &uart4;
  19. };
  20. backlight: backlight {
  21. compatible = "pwm-backlight";
  22. pinctrl-names = "default";
  23. pinctrl-0 = <&pinctrl_backlight>;
  24. pwms = <&pwm1 0 5000000 0>;
  25. brightness-levels = <0 16 64 255>;
  26. num-interpolated-steps = <16>;
  27. default-brightness-level = <1>;
  28. power-supply = <&reg_3v3>;
  29. enable-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
  30. };
  31. connector {
  32. compatible = "composite-video-connector";
  33. label = "Composite0";
  34. sdtv-standards = <SDTV_STD_PAL_B>;
  35. port {
  36. comp0_out: endpoint {
  37. remote-endpoint = <&tvp5150_comp0_in>;
  38. };
  39. };
  40. };
  41. gpio-keys {
  42. compatible = "gpio-keys";
  43. pinctrl-names = "default";
  44. pinctrl-0 = <&pinctrl_gpiokeys>;
  45. autorepeat;
  46. key-power {
  47. label = "Power Button";
  48. gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
  49. linux,code = <KEY_POWER>;
  50. wakeup-source;
  51. };
  52. key-f1 {
  53. label = "GPIO Key F1";
  54. linux,code = <KEY_F1>;
  55. gpios = <&gpio_pca 0 GPIO_ACTIVE_LOW>;
  56. };
  57. key-f2 {
  58. label = "GPIO Key F2";
  59. linux,code = <KEY_F2>;
  60. gpios = <&gpio_pca 1 GPIO_ACTIVE_LOW>;
  61. };
  62. key-f3 {
  63. label = "GPIO Key F3";
  64. linux,code = <KEY_F3>;
  65. gpios = <&gpio_pca 2 GPIO_ACTIVE_LOW>;
  66. };
  67. key-f4 {
  68. label = "GPIO Key F4";
  69. linux,code = <KEY_F4>;
  70. gpios = <&gpio_pca 3 GPIO_ACTIVE_LOW>;
  71. };
  72. key-f5 {
  73. label = "GPIO Key F5";
  74. linux,code = <KEY_F5>;
  75. gpios = <&gpio_pca 4 GPIO_ACTIVE_LOW>;
  76. };
  77. key-cycle {
  78. label = "GPIO Key CYCLE";
  79. linux,code = <KEY_CYCLEWINDOWS>;
  80. gpios = <&gpio_pca 5 GPIO_ACTIVE_LOW>;
  81. };
  82. key-esc {
  83. label = "GPIO Key ESC";
  84. linux,code = <KEY_ESC>;
  85. gpios = <&gpio_pca 6 GPIO_ACTIVE_LOW>;
  86. };
  87. key-up {
  88. label = "GPIO Key UP";
  89. linux,code = <KEY_UP>;
  90. gpios = <&gpio_pca 7 GPIO_ACTIVE_LOW>;
  91. };
  92. key-down {
  93. label = "GPIO Key DOWN";
  94. linux,code = <KEY_DOWN>;
  95. gpios = <&gpio_pca 8 GPIO_ACTIVE_LOW>;
  96. };
  97. key-ok {
  98. label = "GPIO Key OK";
  99. linux,code = <KEY_OK>;
  100. gpios = <&gpio_pca 9 GPIO_ACTIVE_LOW>;
  101. };
  102. key-f6 {
  103. label = "GPIO Key F6";
  104. linux,code = <KEY_F6>;
  105. gpios = <&gpio_pca 10 GPIO_ACTIVE_LOW>;
  106. };
  107. key-f7 {
  108. label = "GPIO Key F7";
  109. linux,code = <KEY_F7>;
  110. gpios = <&gpio_pca 11 GPIO_ACTIVE_LOW>;
  111. };
  112. key-f8 {
  113. label = "GPIO Key F8";
  114. linux,code = <KEY_F8>;
  115. gpios = <&gpio_pca 12 GPIO_ACTIVE_LOW>;
  116. };
  117. key-f9 {
  118. label = "GPIO Key F9";
  119. linux,code = <KEY_F9>;
  120. gpios = <&gpio_pca 13 GPIO_ACTIVE_LOW>;
  121. };
  122. key-f10 {
  123. label = "GPIO Key F10";
  124. linux,code = <KEY_F10>;
  125. gpios = <&gpio_pca 14 GPIO_ACTIVE_LOW>;
  126. };
  127. };
  128. leds {
  129. compatible = "gpio-leds";
  130. pinctrl-names = "default";
  131. pinctrl-0 = <&pinctrl_leds>;
  132. led-0 {
  133. label = "debug0";
  134. function = LED_FUNCTION_HEARTBEAT;
  135. gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
  136. linux,default-trigger = "heartbeat";
  137. };
  138. led-1 {
  139. label = "debug1";
  140. function = LED_FUNCTION_DISK;
  141. gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
  142. linux,default-trigger = "disk-activity";
  143. };
  144. led-2 {
  145. label = "power_led";
  146. function = LED_FUNCTION_POWER;
  147. gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>;
  148. default-state = "on";
  149. };
  150. };
  151. panel {
  152. compatible = "kyo,tcg070wvlq", "lg,lb070wv8";
  153. backlight = <&backlight>;
  154. power-supply = <&reg_3v3>;
  155. port {
  156. panel_in: endpoint {
  157. remote-endpoint = <&lvds0_out>;
  158. };
  159. };
  160. };
  161. clk50m_phy: phy-clock {
  162. compatible = "fixed-clock";
  163. #clock-cells = <0>;
  164. clock-frequency = <50000000>;
  165. };
  166. reg_1v8: regulator-1v8 {
  167. compatible = "regulator-fixed";
  168. regulator-name = "1v8";
  169. regulator-min-microvolt = <1800000>;
  170. regulator-max-microvolt = <1800000>;
  171. };
  172. reg_3v3: regulator-3v3 {
  173. compatible = "regulator-fixed";
  174. regulator-name = "3v3";
  175. regulator-min-microvolt = <3300000>;
  176. regulator-max-microvolt = <3300000>;
  177. };
  178. reg_h1_vbus: regulator-h1-vbus {
  179. compatible = "regulator-fixed";
  180. regulator-name = "h1-vbus";
  181. regulator-min-microvolt = <5000000>;
  182. regulator-max-microvolt = <5000000>;
  183. gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
  184. enable-active-high;
  185. };
  186. reg_otg_vbus: regulator-otg-vbus {
  187. compatible = "regulator-fixed";
  188. regulator-name = "otg-vbus";
  189. regulator-min-microvolt = <5000000>;
  190. regulator-max-microvolt = <5000000>;
  191. gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
  192. enable-active-high;
  193. };
  194. sound {
  195. compatible = "simple-audio-card";
  196. simple-audio-card,name = "prti6q-sgtl5000";
  197. simple-audio-card,format = "i2s";
  198. simple-audio-card,widgets =
  199. "Microphone", "Microphone Jack",
  200. "Line", "Line In Jack",
  201. "Headphone", "Headphone Jack",
  202. "Speaker", "External Speaker";
  203. simple-audio-card,routing =
  204. "MIC_IN", "Microphone Jack",
  205. "LINE_IN", "Line In Jack",
  206. "Headphone Jack", "HP_OUT",
  207. "External Speaker", "LINE_OUT";
  208. simple-audio-card,cpu {
  209. sound-dai = <&ssi1>;
  210. system-clock-frequency = <0>;
  211. };
  212. simple-audio-card,codec {
  213. sound-dai = <&codec>;
  214. bitclock-master;
  215. frame-master;
  216. };
  217. };
  218. };
  219. &audmux {
  220. pinctrl-names = "default";
  221. pinctrl-0 = <&pinctrl_audmux>;
  222. status = "okay";
  223. mux-ssi1 {
  224. fsl,audmux-port = <0>;
  225. fsl,port-config = <
  226. IMX_AUDMUX_V2_PTCR_SYN 0
  227. IMX_AUDMUX_V2_PTCR_TFSEL(2) 0
  228. IMX_AUDMUX_V2_PTCR_TCSEL(2) 0
  229. IMX_AUDMUX_V2_PTCR_TFSDIR 0
  230. IMX_AUDMUX_V2_PTCR_TCLKDIR IMX_AUDMUX_V2_PDCR_RXDSEL(2)
  231. >;
  232. };
  233. mux-pins3 {
  234. fsl,audmux-port = <2>;
  235. fsl,port-config = <
  236. IMX_AUDMUX_V2_PTCR_SYN IMX_AUDMUX_V2_PDCR_RXDSEL(0)
  237. 0 IMX_AUDMUX_V2_PDCR_TXRXEN
  238. >;
  239. };
  240. };
  241. &can1 {
  242. pinctrl-names = "default";
  243. pinctrl-0 = <&pinctrl_can1>;
  244. status = "okay";
  245. };
  246. &can2 {
  247. pinctrl-names = "default";
  248. pinctrl-0 = <&pinctrl_can2>;
  249. status = "okay";
  250. };
  251. &clks {
  252. assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>;
  253. assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
  254. };
  255. &ecspi1 {
  256. cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
  257. pinctrl-names = "default";
  258. pinctrl-0 = <&pinctrl_ecspi1>;
  259. status = "okay";
  260. flash@0 {
  261. compatible = "jedec,spi-nor";
  262. reg = <0>;
  263. spi-max-frequency = <20000000>;
  264. };
  265. };
  266. &fec {
  267. pinctrl-names = "default";
  268. pinctrl-0 = <&pinctrl_enet>;
  269. phy-mode = "rmii";
  270. clocks = <&clks IMX6QDL_CLK_ENET>,
  271. <&clks IMX6QDL_CLK_ENET>,
  272. <&clk50m_phy>;
  273. clock-names = "ipg", "ahb", "ptp";
  274. phy-handle = <&rmii_phy>;
  275. status = "okay";
  276. mdio {
  277. #address-cells = <1>;
  278. #size-cells = <0>;
  279. /* Microchip KSZ8081RNA PHY */
  280. rmii_phy: ethernet-phy@0 {
  281. reg = <0>;
  282. interrupts-extended = <&gpio4 30 IRQ_TYPE_LEVEL_LOW>;
  283. reset-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
  284. reset-assert-us = <10000>;
  285. reset-deassert-us = <3000>;
  286. };
  287. };
  288. };
  289. &gpio1 {
  290. gpio-line-names =
  291. "CAN1_TERM", "SD1_CD", "ITU656_RESET", "CAM1_MIRROR",
  292. "CAM2_MIRROR", "", "", "SMBALERT",
  293. "DEBUG_0", "DEBUG_1", "", "", "", "", "", "",
  294. "SD1_DATA0", "SD1_DATA1", "SD1_CMD", "SD1_DATA2", "SD1_CLK",
  295. "SD1_DATA3", "", "",
  296. "", "", "", "", "", "", "", "";
  297. };
  298. &gpio2 {
  299. gpio-line-names =
  300. "", "", "", "", "", "", "", "",
  301. "REV_ID0", "REV_ID1", "REV_ID2", "REV_ID3", "REV_ID4",
  302. "BOARD_ID0", "BOARD_ID1", "BOARD_ID2",
  303. "", "", "", "", "", "", "", "ON_SWITCH",
  304. "POWER_LED", "", "", "", "", "", "", "";
  305. };
  306. &gpio3 {
  307. gpio-line-names =
  308. "", "", "", "", "", "", "", "",
  309. "", "", "", "", "", "", "", "",
  310. "ECSPI1_SCLK", "ECSPI1_MISO", "ECSPI1_MOSI", "ECSPI1_SS1",
  311. "CPU_ON1_FB", "USB_EXT1_OC", "USB_EXT1_PWR", "YACO_IRQ",
  312. "TSS_TXD", "TSS_RXD", "", "", "", "", "YACO_BOOT0",
  313. "YACO_RESET";
  314. };
  315. &gpio4 {
  316. gpio-line-names =
  317. "", "", "", "", "", "", "", "",
  318. "", "", "", "", "CAN1_SR", "CAN2_SR", "CAN2_TX", "CAN2_RX",
  319. "", "", "DIP1_FB", "", "", "", "", "",
  320. "CPU_LIGHT_ON", "", "ETH_RESET", "", "BL_EN",
  321. "BL_PWM", "ETH_INTRP", "";
  322. };
  323. &gpio5 {
  324. gpio-line-names =
  325. "", "", "", "", "", "", "", "",
  326. "", "", "", "", "", "", "", "",
  327. "", "", "", "", "", "", "", "",
  328. "I2S_LRCLK", "I2S_DIN", "I2C1_SDA", "I2C1_SCL", "YACO_AUX_RX",
  329. "YACO_AUX_TX", "ITU656_D0", "ITU656_D1";
  330. };
  331. &i2c1 {
  332. clock-frequency = <100000>;
  333. pinctrl-names = "default";
  334. pinctrl-0 = <&pinctrl_i2c1>;
  335. status = "okay";
  336. codec: audio-codec@a {
  337. compatible = "fsl,sgtl5000";
  338. reg = <0xa>;
  339. #sound-dai-cells = <0>;
  340. clocks = <&clks 201>;
  341. VDDA-supply = <&reg_3v3>;
  342. VDDIO-supply = <&reg_3v3>;
  343. VDDD-supply = <&reg_1v8>;
  344. };
  345. video@5c {
  346. compatible = "ti,tvp5150";
  347. reg = <0x5c>;
  348. #address-cells = <1>;
  349. #size-cells = <0>;
  350. port@0 {
  351. reg = <0>;
  352. tvp5150_comp0_in: endpoint {
  353. remote-endpoint = <&comp0_out>;
  354. };
  355. };
  356. /* Output port 2 is video output pad */
  357. port@2 {
  358. reg = <2>;
  359. tvp5151_to_ipu1_csi0_mux: endpoint {
  360. remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
  361. };
  362. };
  363. };
  364. gpio_pca: gpio@74 {
  365. compatible = "nxp,pca9539";
  366. reg = <0x74>;
  367. pinctrl-names = "default";
  368. pinctrl-0 = <&pinctrl_pca9539>;
  369. interrupt-parent = <&gpio4>;
  370. interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
  371. gpio-controller;
  372. #gpio-cells = <2>;
  373. };
  374. /* additional i2c devices are added automatically by the boot loader */
  375. };
  376. &i2c3 {
  377. clock-frequency = <100000>;
  378. pinctrl-names = "default";
  379. pinctrl-0 = <&pinctrl_i2c3>;
  380. status = "okay";
  381. adc@49 {
  382. compatible = "ti,ads1015";
  383. reg = <0x49>;
  384. #address-cells = <1>;
  385. #size-cells = <0>;
  386. channel@4 {
  387. reg = <4>;
  388. ti,gain = <3>;
  389. ti,datarate = <3>;
  390. };
  391. channel@5 {
  392. reg = <5>;
  393. ti,gain = <3>;
  394. ti,datarate = <3>;
  395. };
  396. channel@6 {
  397. reg = <6>;
  398. ti,gain = <3>;
  399. ti,datarate = <3>;
  400. };
  401. channel@7 {
  402. reg = <7>;
  403. ti,gain = <3>;
  404. ti,datarate = <3>;
  405. };
  406. };
  407. rtc@51 {
  408. compatible = "nxp,pcf8563";
  409. reg = <0x51>;
  410. };
  411. temperature-sensor@70 {
  412. compatible = "ti,tmp103";
  413. reg = <0x70>;
  414. };
  415. };
  416. &ipu1_csi0 {
  417. pinctrl-names = "default";
  418. pinctrl-0 = <&pinctrl_ipu1_csi0>;
  419. status = "okay";
  420. };
  421. &ipu1_csi0_mux_from_parallel_sensor {
  422. remote-endpoint = <&tvp5151_to_ipu1_csi0_mux>;
  423. };
  424. &ldb {
  425. status = "okay";
  426. lvds-channel@0 {
  427. status = "okay";
  428. port@4 {
  429. reg = <4>;
  430. lvds0_out: endpoint {
  431. remote-endpoint = <&panel_in>;
  432. };
  433. };
  434. };
  435. };
  436. &pcie {
  437. status = "okay";
  438. };
  439. &pwm1 {
  440. pinctrl-names = "default";
  441. pinctrl-0 = <&pinctrl_pwm1>;
  442. status = "okay";
  443. };
  444. &ssi1 {
  445. #sound-dai-cells = <0>;
  446. fsl,mode = "ac97-slave";
  447. status = "okay";
  448. };
  449. &uart1 {
  450. pinctrl-names = "default";
  451. pinctrl-0 = <&pinctrl_uart1>;
  452. status = "okay";
  453. };
  454. &uart2 {
  455. pinctrl-names = "default";
  456. pinctrl-0 = <&pinctrl_uart2>;
  457. status = "okay";
  458. };
  459. &uart3 {
  460. pinctrl-names = "default";
  461. pinctrl-0 = <&pinctrl_uart3>;
  462. status = "okay";
  463. };
  464. &uart4 {
  465. pinctrl-names = "default";
  466. pinctrl-0 = <&pinctrl_uart4>;
  467. status = "okay";
  468. };
  469. &uart5 {
  470. pinctrl-names = "default";
  471. pinctrl-0 = <&pinctrl_uart5>;
  472. status = "okay";
  473. };
  474. &usbh1 {
  475. vbus-supply = <&reg_h1_vbus>;
  476. pinctrl-names = "default";
  477. phy_type = "utmi";
  478. dr_mode = "host";
  479. status = "okay";
  480. };
  481. &usbotg {
  482. vbus-supply = <&reg_otg_vbus>;
  483. pinctrl-names = "default";
  484. pinctrl-0 = <&pinctrl_usbotg>;
  485. phy_type = "utmi";
  486. dr_mode = "host";
  487. disable-over-current;
  488. status = "okay";
  489. };
  490. &usdhc1 {
  491. pinctrl-names = "default";
  492. pinctrl-0 = <&pinctrl_usdhc1>;
  493. cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
  494. no-1-8-v;
  495. disable-wp;
  496. cap-sd-highspeed;
  497. no-mmc;
  498. no-sdio;
  499. status = "okay";
  500. };
  501. &usdhc3 {
  502. pinctrl-names = "default";
  503. pinctrl-0 = <&pinctrl_usdhc3>;
  504. bus-width = <8>;
  505. no-1-8-v;
  506. non-removable;
  507. no-sd;
  508. no-sdio;
  509. status = "okay";
  510. };
  511. &iomuxc {
  512. pinctrl-names = "default";
  513. pinctrl-0 = <&pinctrl_hog>;
  514. pinctrl_audmux: audmuxgrp {
  515. fsl,pins = <
  516. /* SGTL5000 sys_mclk */
  517. MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x030b0
  518. MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
  519. MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
  520. MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
  521. MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
  522. >;
  523. };
  524. pinctrl_backlight: backlightgrp {
  525. fsl,pins = <
  526. MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28 0x1b0b0
  527. >;
  528. };
  529. pinctrl_can1: can1grp {
  530. fsl,pins = <
  531. MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b000
  532. MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x3008
  533. /* CAN1_SR */
  534. MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x13008
  535. /* CAN1_TERM */
  536. MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b088
  537. >;
  538. };
  539. pinctrl_can2: can2grp {
  540. fsl,pins = <
  541. MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b000
  542. MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x3008
  543. /* CAN2_SR */
  544. MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x13008
  545. >;
  546. };
  547. pinctrl_ecspi1: ecspi1grp {
  548. fsl,pins = <
  549. MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
  550. MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
  551. MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
  552. /* CS */
  553. MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1
  554. >;
  555. };
  556. pinctrl_enet: enetgrp {
  557. fsl,pins = <
  558. /* MX6QDL_ENET_PINGRP4 */
  559. MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
  560. MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
  561. MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
  562. MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
  563. MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
  564. MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
  565. MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
  566. MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
  567. MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
  568. MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b0
  569. /* Phy reset */
  570. MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26 0x1b0b0
  571. /* nINTRP */
  572. MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0
  573. >;
  574. };
  575. pinctrl_gpiokeys: gpiokeygrp {
  576. fsl,pins = <
  577. /* nON_SWITCH */
  578. MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x1b0b0
  579. >;
  580. };
  581. pinctrl_hog: hoggrp {
  582. fsl,pins = <
  583. /* ITU656_nRESET */
  584. MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
  585. /* CAM1_MIRROR */
  586. MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x130b0
  587. /* CAM2_MIRROR */
  588. MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x130b0
  589. /* CAM_nDETECT */
  590. MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
  591. /* ISB_IN1 */
  592. MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x130b0
  593. /* ISB_nIN2 */
  594. MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b0b0
  595. /* WARN_LIGHT */
  596. MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x100b0
  597. /* ON2_FB */
  598. MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b0
  599. /* YACO_nIRQ */
  600. MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x1b0b0
  601. /* YACO_BOOT0 */
  602. MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x130b0
  603. /* YACO_nRESET */
  604. MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x1b0b0
  605. /* FORCE_ON1 */
  606. MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
  607. /* AUDIO_nRESET */
  608. MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x1f0b0
  609. /* ITU656_nPDN */
  610. MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b0b0
  611. /* HW revision detect */
  612. /* REV_ID0 */
  613. MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0
  614. /* REV_ID1 */
  615. MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x1b0b0
  616. /* REV_ID2 */
  617. MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0
  618. /* REV_ID3 */
  619. MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b0
  620. /* REV_ID4 */
  621. MX6QDL_PAD_SD4_DAT4__GPIO2_IO12 0x1b0b0
  622. /* New in HW revision 1 */
  623. /* ON1_FB */
  624. MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x100b0
  625. /* DIP1_FB */
  626. MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
  627. >;
  628. };
  629. pinctrl_i2c1: i2c1grp {
  630. fsl,pins = <
  631. MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001f8b1
  632. MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001f8b1
  633. >;
  634. };
  635. pinctrl_i2c3: i2c3grp {
  636. fsl,pins = <
  637. MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
  638. MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
  639. >;
  640. };
  641. pinctrl_ipu1_csi0: ipu1csi0grp {
  642. fsl,pins = <
  643. MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
  644. MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
  645. MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
  646. MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
  647. MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
  648. MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
  649. MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
  650. MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
  651. MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
  652. >;
  653. };
  654. pinctrl_leds: ledsgrp {
  655. fsl,pins = <
  656. /* DEBUG0 */
  657. MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16 0x1b0b0
  658. /* DEBUG1 */
  659. MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x1b0b0
  660. /* POWER_LED */
  661. MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x1b0b0
  662. >;
  663. };
  664. pinctrl_pca9539: pca9539 {
  665. fsl,pins = <
  666. MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
  667. >;
  668. };
  669. pinctrl_pwm1: pwm1grp {
  670. fsl,pins = <
  671. MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0
  672. >;
  673. };
  674. /* YaCO AUX Uart */
  675. pinctrl_uart1: uart1grp {
  676. fsl,pins = <
  677. MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
  678. MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
  679. >;
  680. };
  681. pinctrl_uart2: uart2grp {
  682. fsl,pins = <
  683. MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
  684. MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
  685. >;
  686. };
  687. /* YaCO Touchscreen UART */
  688. pinctrl_uart3: uart3grp {
  689. fsl,pins = <
  690. MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
  691. MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
  692. >;
  693. };
  694. pinctrl_uart4: uart4grp {
  695. fsl,pins = <
  696. MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
  697. MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
  698. >;
  699. };
  700. pinctrl_uart5: uart5grp {
  701. fsl,pins = <
  702. MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
  703. MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
  704. >;
  705. };
  706. pinctrl_usbotg: usbotggrp {
  707. fsl,pins = <
  708. MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
  709. /* power enable, high active */
  710. MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
  711. >;
  712. };
  713. pinctrl_usdhc1: usdhc1grp {
  714. fsl,pins = <
  715. MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9
  716. MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
  717. MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
  718. MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
  719. MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
  720. MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
  721. MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1b0b0
  722. >;
  723. };
  724. pinctrl_usdhc3: usdhc3grp {
  725. fsl,pins = <
  726. MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099
  727. MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10099
  728. MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17099
  729. MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17099
  730. MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17099
  731. MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17099
  732. MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17099
  733. MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17099
  734. MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17099
  735. MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17099
  736. MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1
  737. >;
  738. };
  739. };