imx6dl-plym2m.dts 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. /*
  3. * Copyright (c) 2014 Protonic Holland
  4. * Copyright (c) 2020 Oleksij Rempel <[email protected]>, Pengutronix
  5. */
  6. /dts-v1/;
  7. #include <dt-bindings/gpio/gpio.h>
  8. #include <dt-bindings/leds/common.h>
  9. #include "imx6dl.dtsi"
  10. / {
  11. model = "Plymovent M2M board";
  12. compatible = "ply,plym2m", "fsl,imx6dl";
  13. chosen {
  14. stdout-path = &uart4;
  15. };
  16. backlight: backlight {
  17. compatible = "pwm-backlight";
  18. pwms = <&pwm1 0 5000000 0>;
  19. brightness-levels = <0 1000>;
  20. num-interpolated-steps = <20>;
  21. default-brightness-level = <19>;
  22. power-supply = <&reg_12v0>;
  23. };
  24. display {
  25. compatible = "fsl,imx-parallel-display";
  26. pinctrl-0 = <&pinctrl_ipu1_disp>;
  27. pinctrl-names = "default";
  28. #address-cells = <1>;
  29. #size-cells = <0>;
  30. port@0 {
  31. reg = <0>;
  32. display_in: endpoint {
  33. remote-endpoint = <&ipu1_di0_disp0>;
  34. };
  35. };
  36. port@1 {
  37. reg = <1>;
  38. display_out: endpoint {
  39. remote-endpoint = <&panel_in>;
  40. };
  41. };
  42. };
  43. iio-hwmon {
  44. compatible = "iio-hwmon";
  45. io-channels = <&vdiv_vaccu>;
  46. };
  47. leds {
  48. compatible = "gpio-leds";
  49. pinctrl-names = "default";
  50. pinctrl-0 = <&pinctrl_leds>;
  51. led-0 {
  52. label = "debug0";
  53. function = LED_FUNCTION_STATUS;
  54. gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
  55. linux,default-trigger = "heartbeat";
  56. };
  57. };
  58. panel {
  59. compatible = "edt,etm0700g0bdh6";
  60. backlight = <&backlight>;
  61. power-supply = <&reg_3v3>;
  62. port {
  63. panel_in: endpoint {
  64. remote-endpoint = <&display_out>;
  65. };
  66. };
  67. };
  68. clk50m_phy: phy-clock {
  69. compatible = "fixed-clock";
  70. #clock-cells = <0>;
  71. clock-frequency = <50000000>;
  72. };
  73. reg_3v3: regulator-3v3 {
  74. compatible = "regulator-fixed";
  75. regulator-name = "3v3";
  76. regulator-min-microvolt = <3300000>;
  77. regulator-max-microvolt = <3300000>;
  78. };
  79. reg_5v0: regulator-5v0 {
  80. compatible = "regulator-fixed";
  81. regulator-name = "5v0";
  82. regulator-min-microvolt = <5000000>;
  83. regulator-max-microvolt = <5000000>;
  84. };
  85. reg_12v0: regulator-12v0 {
  86. compatible = "regulator-fixed";
  87. regulator-name = "12v0";
  88. regulator-min-microvolt = <12000000>;
  89. regulator-max-microvolt = <12000000>;
  90. };
  91. thermal-zones {
  92. chassis-thermal {
  93. polling-delay = <20000>;
  94. polling-delay-passive = <0>;
  95. thermal-sensors = <&tsens0>;
  96. };
  97. touch-thermal0 {
  98. polling-delay = <20000>;
  99. polling-delay-passive = <0>;
  100. thermal-sensors = <&touch_temp0>;
  101. };
  102. touch-thermal1 {
  103. polling-delay = <20000>;
  104. polling-delay-passive = <0>;
  105. thermal-sensors = <&touch_temp1>;
  106. };
  107. };
  108. touchscreen {
  109. compatible = "resistive-adc-touch";
  110. io-channels = <&adc_ts 1>, <&adc_ts 3>, <&adc_ts 4>,
  111. <&adc_ts 5>;
  112. io-channel-names = "y", "z1", "z2", "x";
  113. touchscreen-min-pressure = <64687>;
  114. touchscreen-inverted-x;
  115. touchscreen-inverted-y;
  116. touchscreen-x-plate-ohms = <300>;
  117. touchscreen-y-plate-ohms = <800>;
  118. };
  119. touch_temp0: touch-temperature-sensor0 {
  120. compatible = "generic-adc-thermal";
  121. #thermal-sensor-cells = <0>;
  122. io-channels = <&adc_ts 0>;
  123. io-channel-names = "sensor-channel";
  124. temperature-lookup-table = < (-40000) 736
  125. 85000 474>;
  126. };
  127. touch_temp1: touch-temperature-sensor1 {
  128. compatible = "generic-adc-thermal";
  129. #thermal-sensor-cells = <0>;
  130. io-channels = <&adc_ts 7>;
  131. io-channel-names = "sensor-channel";
  132. temperature-lookup-table = < (-40000) 826
  133. 85000 609>;
  134. };
  135. vdiv_vaccu: voltage-divider-vaccu {
  136. compatible = "voltage-divider";
  137. io-channels = <&adc_ts 2>;
  138. output-ohms = <2500>;
  139. full-ohms = <64000>;
  140. #io-channel-cells = <0>;
  141. };
  142. };
  143. &can1 {
  144. pinctrl-names = "default";
  145. pinctrl-0 = <&pinctrl_can1>;
  146. xceiver-supply = <&reg_5v0>;
  147. status = "okay";
  148. };
  149. &ecspi1 {
  150. cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
  151. pinctrl-names = "default";
  152. pinctrl-0 = <&pinctrl_ecspi1>;
  153. status = "okay";
  154. flash@0 {
  155. compatible = "jedec,spi-nor";
  156. reg = <0>;
  157. spi-max-frequency = <20000000>;
  158. };
  159. };
  160. &ecspi2 {
  161. cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
  162. pinctrl-names = "default";
  163. pinctrl-0 = <&pinctrl_ecspi2>;
  164. status = "okay";
  165. adc_ts: adc@0 {
  166. compatible = "ti,tsc2046e-adc";
  167. reg = <0>;
  168. pinctrl-0 = <&pinctrl_tsc2046>;
  169. pinctrl-names = "default";
  170. spi-max-frequency = <1000000>;
  171. interrupts-extended = <&gpio3 20 IRQ_TYPE_LEVEL_LOW>;
  172. #io-channel-cells = <1>;
  173. #address-cells = <1>;
  174. #size-cells = <0>;
  175. channel@0 {
  176. reg = <0>;
  177. settling-time-us = <300>;
  178. oversampling-ratio = <5>;
  179. };
  180. channel@1 {
  181. reg = <1>;
  182. settling-time-us = <700>;
  183. oversampling-ratio = <5>;
  184. };
  185. channel@2 {
  186. reg = <2>;
  187. settling-time-us = <300>;
  188. oversampling-ratio = <5>;
  189. };
  190. channel@3 {
  191. reg = <3>;
  192. settling-time-us = <700>;
  193. oversampling-ratio = <5>;
  194. };
  195. channel@4 {
  196. reg = <4>;
  197. settling-time-us = <700>;
  198. oversampling-ratio = <5>;
  199. };
  200. channel@5 {
  201. reg = <5>;
  202. settling-time-us = <700>;
  203. oversampling-ratio = <5>;
  204. };
  205. /* channel 6 is not connected */
  206. channel@7 {
  207. reg = <7>;
  208. settling-time-us = <300>;
  209. oversampling-ratio = <5>;
  210. };
  211. };
  212. };
  213. &fec {
  214. pinctrl-names = "default";
  215. pinctrl-0 = <&pinctrl_enet>;
  216. phy-mode = "rmii";
  217. clocks = <&clks IMX6QDL_CLK_ENET>,
  218. <&clks IMX6QDL_CLK_ENET>,
  219. <&clk50m_phy>;
  220. clock-names = "ipg", "ahb", "ptp";
  221. phy-handle = <&rgmii_phy>;
  222. status = "okay";
  223. mdio {
  224. #address-cells = <1>;
  225. #size-cells = <0>;
  226. /* Microchip KSZ8081RNA PHY */
  227. rgmii_phy: ethernet-phy@0 {
  228. reg = <0>;
  229. interrupts-extended = <&gpio5 23 IRQ_TYPE_LEVEL_LOW>;
  230. reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
  231. reset-assert-us = <10000>;
  232. reset-deassert-us = <300>;
  233. };
  234. };
  235. };
  236. &gpio1 {
  237. gpio-line-names =
  238. "CAN1_TERM", "SD1_CD", "", "", "", "", "", "",
  239. "DEBUG_0", "", "", "", "", "", "", "",
  240. "", "", "", "", "", "", "", "",
  241. "", "", "", "", "", "", "", "";
  242. };
  243. &gpio2 {
  244. gpio-line-names =
  245. "", "", "", "", "", "", "", "",
  246. "", "", "", "", "", "", "", "",
  247. "", "", "", "", "", "", "", "",
  248. "", "", "ECSPI2_SS0", "", "", "", "TSC_BUSY", "";
  249. };
  250. &gpio3 {
  251. gpio-line-names =
  252. "", "", "", "", "", "", "", "",
  253. "", "", "", "", "", "", "", "",
  254. "", "", "", "ECSPI1_SS1", "TSC_PENIRQ", "", "", "",
  255. "", "", "", "", "", "", "", "";
  256. };
  257. &gpio4 {
  258. gpio-line-names =
  259. "", "", "", "", "", "", "", "",
  260. "", "", "", "", "CAN1_SR", "", "", "",
  261. "", "", "", "", "", "", "", "",
  262. "", "", "", "", "", "", "", "";
  263. };
  264. &gpio5 {
  265. gpio-line-names =
  266. "", "", "", "", "", "", "", "",
  267. "", "", "", "", "", "", "", "",
  268. "", "", "", "", "", "", "ETH_RESET", "ETH_INTRP",
  269. "", "", "", "", "", "", "", "";
  270. };
  271. &i2c1 {
  272. clock-frequency = <100000>;
  273. pinctrl-names = "default";
  274. pinctrl-0 = <&pinctrl_i2c1>;
  275. status = "okay";
  276. /* additional i2c devices are added automatically by the boot loader */
  277. };
  278. &i2c3 {
  279. clock-frequency = <100000>;
  280. pinctrl-names = "default";
  281. pinctrl-0 = <&pinctrl_i2c3>;
  282. status = "okay";
  283. tsens0: temperature-sensor@70 {
  284. compatible = "ti,tmp103";
  285. reg = <0x70>;
  286. #thermal-sensor-cells = <0>;
  287. };
  288. };
  289. &ipu1_di0_disp0 {
  290. remote-endpoint = <&display_in>;
  291. };
  292. &pwm1 {
  293. pinctrl-names = "default";
  294. pinctrl-0 = <&pinctrl_pwm1>;
  295. status = "okay";
  296. };
  297. &uart4 {
  298. pinctrl-names = "default";
  299. pinctrl-0 = <&pinctrl_uart4>;
  300. status = "okay";
  301. };
  302. &usbphynop1 {
  303. status = "disabled";
  304. };
  305. &usbphynop2 {
  306. status = "disabled";
  307. };
  308. &usbotg {
  309. phy_type = "utmi";
  310. dr_mode = "host";
  311. disable-over-current;
  312. status = "okay";
  313. };
  314. &usdhc1 {
  315. pinctrl-names = "default";
  316. pinctrl-0 = <&pinctrl_usdhc1>;
  317. cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
  318. no-1-8-v;
  319. disable-wp;
  320. cap-sd-highspeed;
  321. no-mmc;
  322. no-sdio;
  323. status = "okay";
  324. };
  325. &usdhc3 {
  326. pinctrl-names = "default";
  327. pinctrl-0 = <&pinctrl_usdhc3>;
  328. bus-width = <8>;
  329. no-1-8-v;
  330. non-removable;
  331. no-sd;
  332. no-sdio;
  333. status = "okay";
  334. };
  335. &iomuxc {
  336. pinctrl_can1: can1grp {
  337. fsl,pins = <
  338. MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b000
  339. MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x3008
  340. /* CAN1_SR */
  341. MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x13008
  342. /* CAN1_TERM */
  343. MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b088
  344. >;
  345. };
  346. pinctrl_ecspi1: ecspi1grp {
  347. fsl,pins = <
  348. MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x1b000
  349. MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x3008
  350. MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x3008
  351. /* CS */
  352. MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x3008
  353. >;
  354. };
  355. pinctrl_ecspi2: ecspi2grp {
  356. fsl,pins = <
  357. MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x10000
  358. MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x3008
  359. MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x3008
  360. /* CS */
  361. MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x3008
  362. >;
  363. };
  364. pinctrl_enet: enetgrp {
  365. fsl,pins = <
  366. /* MX6QDL_ENET_PINGRP4 */
  367. MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
  368. MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
  369. MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
  370. MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
  371. MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
  372. MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
  373. MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
  374. MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
  375. MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
  376. MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b0
  377. /* Phy reset */
  378. MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x1b0b0
  379. /* nINTRP */
  380. MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x1b0b0
  381. >;
  382. };
  383. pinctrl_i2c1: i2c1grp {
  384. fsl,pins = <
  385. MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001f8b1
  386. MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001f8b1
  387. >;
  388. };
  389. pinctrl_i2c3: i2c3grp {
  390. fsl,pins = <
  391. MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
  392. MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
  393. >;
  394. };
  395. pinctrl_ipu1_disp: ipudisp1grp {
  396. fsl,pins = <
  397. /* DSE 0x30 => 25 Ohm, 0x20 => 37 Ohm, 0x10 => 75 Ohm */
  398. MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x30
  399. MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x30
  400. MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x30
  401. MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x30
  402. MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x30
  403. MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x30
  404. MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x30
  405. MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x30
  406. MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x30
  407. MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x30
  408. MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x30
  409. MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x30
  410. MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x30
  411. MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x30
  412. MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x30
  413. MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x30
  414. MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x30
  415. MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x30
  416. MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x30
  417. MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x30
  418. MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x30
  419. MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x30
  420. >;
  421. };
  422. pinctrl_leds: ledsgrp {
  423. fsl,pins = <
  424. MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
  425. >;
  426. };
  427. pinctrl_pwm1: pwm1grp {
  428. fsl,pins = <
  429. MX6QDL_PAD_GPIO_9__PWM1_OUT 0x8
  430. >;
  431. };
  432. pinctrl_tsc2046: tsc2046grp {
  433. fsl,pins = <
  434. /* TSC_PENIRQ */
  435. MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b1
  436. /* TSC_BUSY */
  437. MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
  438. >;
  439. };
  440. pinctrl_uart4: uart4grp {
  441. fsl,pins = <
  442. MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
  443. MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
  444. >;
  445. };
  446. pinctrl_usdhc1: usdhc1grp {
  447. fsl,pins = <
  448. MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9
  449. MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
  450. MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
  451. MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
  452. MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
  453. MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
  454. MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1b0b0
  455. >;
  456. };
  457. pinctrl_usdhc3: usdhc3grp {
  458. fsl,pins = <
  459. MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099
  460. MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10099
  461. MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17099
  462. MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17099
  463. MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17099
  464. MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17099
  465. MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17099
  466. MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17099
  467. MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17099
  468. MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17099
  469. MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1
  470. >;
  471. };
  472. };