imx6dl-lanmcu.dts 10 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (c) 2019 Protonic Holland
  4. * Copyright (c) 2020 Oleksij Rempel <[email protected]>, Pengutronix
  5. */
  6. /dts-v1/;
  7. #include <dt-bindings/gpio/gpio.h>
  8. #include <dt-bindings/leds/common.h>
  9. #include "imx6dl.dtsi"
  10. / {
  11. model = "Van der Laan LANMCU";
  12. compatible = "vdl,lanmcu", "fsl,imx6dl";
  13. chosen {
  14. stdout-path = &uart4;
  15. };
  16. clock_ksz8081: clock-ksz8081 {
  17. compatible = "fixed-clock";
  18. #clock-cells = <0>;
  19. clock-frequency = <50000000>;
  20. };
  21. backlight: backlight {
  22. compatible = "pwm-backlight";
  23. pwms = <&pwm1 0 5000000 0>;
  24. brightness-levels = <0 1000>;
  25. num-interpolated-steps = <20>;
  26. default-brightness-level = <19>;
  27. };
  28. display {
  29. compatible = "fsl,imx-parallel-display";
  30. pinctrl-0 = <&pinctrl_ipu1_disp>;
  31. pinctrl-names = "default";
  32. #address-cells = <1>;
  33. #size-cells = <0>;
  34. port@0 {
  35. reg = <0>;
  36. display_in: endpoint {
  37. remote-endpoint = <&ipu1_di0_disp0>;
  38. };
  39. };
  40. port@1 {
  41. reg = <1>;
  42. display_out: endpoint {
  43. remote-endpoint = <&panel_in>;
  44. };
  45. };
  46. };
  47. leds {
  48. compatible = "gpio-leds";
  49. pinctrl-names = "default";
  50. pinctrl-0 = <&pinctrl_leds>;
  51. led-0 {
  52. label = "debug0";
  53. function = LED_FUNCTION_STATUS;
  54. gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
  55. linux,default-trigger = "heartbeat";
  56. };
  57. };
  58. panel {
  59. compatible = "edt,etm0700g0bdh6";
  60. backlight = <&backlight>;
  61. port {
  62. panel_in: endpoint {
  63. remote-endpoint = <&display_out>;
  64. };
  65. };
  66. };
  67. reg_otg_vbus: regulator-otg-vbus {
  68. compatible = "regulator-fixed";
  69. regulator-name = "otg-vbus";
  70. regulator-min-microvolt = <5000000>;
  71. regulator-max-microvolt = <5000000>;
  72. gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
  73. enable-active-high;
  74. };
  75. usdhc2_wifi_pwrseq: usdhc2-wifi-pwrseq {
  76. compatible = "mmc-pwrseq-simple";
  77. pinctrl-names = "default";
  78. pinctrl-0 = <&pinctrl_wifi_npd>;
  79. reset-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>;
  80. };
  81. };
  82. &can1 {
  83. pinctrl-names = "default";
  84. pinctrl-0 = <&pinctrl_can1>;
  85. status = "okay";
  86. };
  87. &can2 {
  88. pinctrl-names = "default";
  89. pinctrl-0 = <&pinctrl_can2>;
  90. status = "okay";
  91. };
  92. &fec {
  93. pinctrl-names = "default";
  94. pinctrl-0 = <&pinctrl_enet>;
  95. phy-mode = "rmii";
  96. clocks = <&clks IMX6QDL_CLK_ENET>,
  97. <&clks IMX6QDL_CLK_ENET>,
  98. <&clock_ksz8081>;
  99. clock-names = "ipg", "ahb", "ptp";
  100. phy-handle = <&rgmii_phy>;
  101. status = "okay";
  102. mdio {
  103. #address-cells = <1>;
  104. #size-cells = <0>;
  105. /* Microchip KSZ8081RNA PHY */
  106. rgmii_phy: ethernet-phy@0 {
  107. reg = <0>;
  108. interrupts-extended = <&gpio5 23 IRQ_TYPE_LEVEL_LOW>;
  109. reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
  110. reset-assert-us = <10000>;
  111. reset-deassert-us = <300>;
  112. };
  113. };
  114. };
  115. &gpio1 {
  116. gpio-line-names =
  117. "", "SD1_CD", "", "", "", "", "", "",
  118. "DEBUG_0", "BL_PWM", "", "", "", "", "", "",
  119. "", "", "", "", "", "", "", "ENET_LED_GREEN",
  120. "", "", "", "", "", "", "", "";
  121. };
  122. &gpio3 {
  123. gpio-line-names =
  124. "", "", "", "", "", "", "", "",
  125. "", "", "", "", "", "", "", "",
  126. "", "", "", "", "TS_INT", "USB_OTG1_OC", "USB_OTG1_PWR", "",
  127. "", "", "", "", "UART2_CTS", "", "UART3_CTS", "";
  128. };
  129. &gpio5 {
  130. gpio-line-names =
  131. "", "", "", "", "", "", "", "",
  132. "", "", "", "", "", "", "", "",
  133. "", "", "", "", "", "", "ENET_RST", "ENET_INT",
  134. "", "", "I2C1_SDA", "I2C1_SCL", "", "", "", "";
  135. };
  136. &gpio6 {
  137. gpio-line-names =
  138. "", "", "", "", "", "", "", "",
  139. "", "", "WLAN_REG_ON", "", "", "", "", "",
  140. "", "", "", "", "", "", "", "",
  141. "", "", "", "", "", "", "", "";
  142. };
  143. &gpio7 {
  144. gpio-line-names =
  145. "", "", "", "", "", "", "", "",
  146. "EMMC_RST", "", "", "", "", "", "", "",
  147. "", "", "", "", "", "", "", "",
  148. "", "", "", "", "", "", "", "";
  149. };
  150. &i2c1 {
  151. clock-frequency = <100000>;
  152. pinctrl-names = "default";
  153. pinctrl-0 = <&pinctrl_i2c1>;
  154. status = "okay";
  155. /* additional i2c devices are added automatically by the boot loader */
  156. };
  157. &i2c3 {
  158. clock-frequency = <100000>;
  159. pinctrl-names = "default";
  160. pinctrl-0 = <&pinctrl_i2c3>;
  161. status = "okay";
  162. touchscreen@38 {
  163. compatible = "edt,edt-ft5406";
  164. reg = <0x38>;
  165. pinctrl-names = "default";
  166. pinctrl-0 = <&pinctrl_ts_edt>;
  167. interrupts-extended = <&gpio3 20 IRQ_TYPE_EDGE_FALLING>;
  168. touchscreen-size-x = <1792>;
  169. touchscreen-size-y = <1024>;
  170. touchscreen-fuzz-x = <0>;
  171. touchscreen-fuzz-y = <0>;
  172. /* Touch screen calibration */
  173. threshold = <50>;
  174. gain = <5>;
  175. offset = <10>;
  176. };
  177. rtc@51 {
  178. compatible = "nxp,pcf8563";
  179. reg = <0x51>;
  180. };
  181. };
  182. &ipu1_di0_disp0 {
  183. remote-endpoint = <&display_in>;
  184. };
  185. &pwm1 {
  186. pinctrl-names = "default";
  187. pinctrl-0 = <&pinctrl_pwm1>;
  188. status = "okay";
  189. };
  190. &uart2 {
  191. pinctrl-names = "default";
  192. pinctrl-0 = <&pinctrl_uart2>;
  193. linux,rs485-enabled-at-boot-time;
  194. uart-has-rtscts;
  195. status = "okay";
  196. };
  197. &uart3 {
  198. pinctrl-names = "default";
  199. pinctrl-0 = <&pinctrl_uart3>;
  200. linux,rs485-enabled-at-boot-time;
  201. uart-has-rtscts;
  202. status = "okay";
  203. };
  204. &uart4 {
  205. pinctrl-names = "default";
  206. pinctrl-0 = <&pinctrl_uart4>;
  207. status = "okay";
  208. };
  209. &usbotg {
  210. vbus-supply = <&reg_otg_vbus>;
  211. pinctrl-names = "default";
  212. pinctrl-0 = <&pinctrl_usbotg>;
  213. phy_type = "utmi";
  214. dr_mode = "host";
  215. status = "okay";
  216. };
  217. &usdhc1 {
  218. pinctrl-names = "default";
  219. pinctrl-0 = <&pinctrl_usdhc1>;
  220. cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
  221. no-1-8-v;
  222. disable-wp;
  223. cap-sd-highspeed;
  224. no-mmc;
  225. no-sdio;
  226. status = "okay";
  227. };
  228. &usdhc2 {
  229. pinctrl-names = "default";
  230. pinctrl-0 = <&pinctrl_usdhc2>;
  231. no-1-8-v;
  232. non-removable;
  233. mmc-pwrseq = <&usdhc2_wifi_pwrseq>;
  234. #address-cells = <1>;
  235. #size-cells = <0>;
  236. status = "okay";
  237. wifi@1 {
  238. reg = <1>;
  239. compatible = "brcm,bcm4329-fmac";
  240. };
  241. };
  242. &usdhc3 {
  243. pinctrl-names = "default";
  244. pinctrl-0 = <&pinctrl_usdhc3>;
  245. bus-width = <8>;
  246. no-1-8-v;
  247. non-removable;
  248. no-sd;
  249. no-sdio;
  250. status = "okay";
  251. };
  252. &iomuxc {
  253. pinctrl_can1: can1grp {
  254. fsl,pins = <
  255. MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b000
  256. MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x3008
  257. >;
  258. };
  259. pinctrl_can2: can2grp {
  260. fsl,pins = <
  261. MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b000
  262. MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x3008
  263. >;
  264. };
  265. pinctrl_enet: enetgrp {
  266. fsl,pins = <
  267. /* MX6QDL_ENET_PINGRP4 */
  268. MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
  269. MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
  270. MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
  271. MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
  272. MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
  273. MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
  274. MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
  275. MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
  276. MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
  277. MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b0
  278. /* Phy reset */
  279. MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x1b0b0
  280. /* nINTRP */
  281. MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x1b0b0
  282. >;
  283. };
  284. pinctrl_i2c1: i2c1grp {
  285. fsl,pins = <
  286. MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001f8b1
  287. MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001f8b1
  288. >;
  289. };
  290. pinctrl_i2c3: i2c3grp {
  291. fsl,pins = <
  292. MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
  293. MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
  294. >;
  295. };
  296. pinctrl_ipu1_disp: ipudisp1grp {
  297. fsl,pins = <
  298. /* DSE 0x30 => 25 Ohm, 0x20 => 37 Ohm, 0x10 => 75 Ohm */
  299. MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x30
  300. MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x30
  301. MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x30
  302. MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x30
  303. MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x30
  304. MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x30
  305. MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x30
  306. MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x30
  307. MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x30
  308. MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x30
  309. MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x30
  310. MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x30
  311. MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x30
  312. MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x30
  313. MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x30
  314. MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x30
  315. MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x30
  316. MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x30
  317. MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x30
  318. MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x30
  319. MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x30
  320. MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x30
  321. >;
  322. };
  323. pinctrl_leds: ledsgrp {
  324. fsl,pins = <
  325. MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
  326. >;
  327. };
  328. pinctrl_pwm1: pwm1grp {
  329. fsl,pins = <
  330. MX6QDL_PAD_GPIO_9__PWM1_OUT 0x8
  331. >;
  332. };
  333. pinctrl_ts_edt: ts1grp {
  334. fsl,pins = <
  335. MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b0
  336. >;
  337. };
  338. pinctrl_uart2: uart2grp {
  339. fsl,pins = <
  340. MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1
  341. MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1
  342. MX6QDL_PAD_EIM_D28__UART2_CTS_B 0x130b1
  343. >;
  344. };
  345. pinctrl_uart3: uart3grp {
  346. fsl,pins = <
  347. MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
  348. MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
  349. MX6QDL_PAD_EIM_D30__UART3_CTS_B 0x130b1
  350. >;
  351. };
  352. pinctrl_uart4: uart4grp {
  353. fsl,pins = <
  354. MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
  355. MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
  356. >;
  357. };
  358. pinctrl_usbotg: usbotggrp {
  359. fsl,pins = <
  360. MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
  361. /* power enable, high active */
  362. MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
  363. >;
  364. };
  365. pinctrl_usdhc1: usdhc1grp {
  366. fsl,pins = <
  367. MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9
  368. MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
  369. MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
  370. MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
  371. MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
  372. MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
  373. MX6QDL_PAD_GPIO_1__SD1_CD_B 0x1b0b0
  374. >;
  375. };
  376. pinctrl_usdhc2: usdhc2grp {
  377. fsl,pins = <
  378. MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9
  379. MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9
  380. MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
  381. MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
  382. MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
  383. MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
  384. >;
  385. };
  386. pinctrl_usdhc3: usdhc3grp {
  387. fsl,pins = <
  388. MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099
  389. MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10099
  390. MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17099
  391. MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17099
  392. MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17099
  393. MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17099
  394. MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17099
  395. MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17099
  396. MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17099
  397. MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17099
  398. MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1
  399. >;
  400. };
  401. pinctrl_wifi_npd: wifigrp {
  402. fsl,pins = <
  403. /* WL_REG_ON */
  404. MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x13069
  405. >;
  406. };
  407. };