imx53-qsb-common.dtsi 8.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. //
  3. // Copyright 2011 Freescale Semiconductor, Inc.
  4. // Copyright 2011 Linaro Ltd.
  5. #include "imx53.dtsi"
  6. / {
  7. chosen {
  8. stdout-path = &uart1;
  9. };
  10. memory@70000000 {
  11. device_type = "memory";
  12. reg = <0x70000000 0x20000000>,
  13. <0xb0000000 0x20000000>;
  14. };
  15. display0: disp0 {
  16. compatible = "fsl,imx-parallel-display";
  17. pinctrl-names = "default";
  18. pinctrl-0 = <&pinctrl_ipu_disp0>;
  19. #address-cells = <1>;
  20. #size-cells = <0>;
  21. status = "disabled";
  22. port@0 {
  23. reg = <0>;
  24. display0_in: endpoint {
  25. remote-endpoint = <&ipu_di0_disp0>;
  26. };
  27. };
  28. port@1 {
  29. reg = <1>;
  30. display_out: endpoint {
  31. remote-endpoint = <&panel_in>;
  32. };
  33. };
  34. };
  35. gpio-keys {
  36. compatible = "gpio-keys";
  37. key-power {
  38. label = "Power Button";
  39. gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
  40. linux,code = <KEY_POWER>;
  41. };
  42. key-volume-up {
  43. label = "Volume Up";
  44. gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
  45. linux,code = <KEY_VOLUMEUP>;
  46. wakeup-source;
  47. };
  48. key-volume-down {
  49. label = "Volume Down";
  50. gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
  51. linux,code = <KEY_VOLUMEDOWN>;
  52. wakeup-source;
  53. };
  54. };
  55. leds {
  56. compatible = "gpio-leds";
  57. pinctrl-names = "default";
  58. pinctrl-0 = <&led_pin_gpio7_7>;
  59. led-user {
  60. label = "Heartbeat";
  61. gpios = <&gpio7 7 0>;
  62. linux,default-trigger = "heartbeat";
  63. };
  64. };
  65. panel {
  66. compatible = "sii,43wvf1g";
  67. port {
  68. panel_in: endpoint {
  69. remote-endpoint = <&display_out>;
  70. };
  71. };
  72. };
  73. regulators {
  74. compatible = "simple-bus";
  75. #address-cells = <1>;
  76. #size-cells = <0>;
  77. reg_3p2v: regulator@0 {
  78. compatible = "regulator-fixed";
  79. reg = <0>;
  80. regulator-name = "3P2V";
  81. regulator-min-microvolt = <3200000>;
  82. regulator-max-microvolt = <3200000>;
  83. regulator-always-on;
  84. };
  85. reg_usb_vbus: regulator@1 {
  86. compatible = "regulator-fixed";
  87. reg = <1>;
  88. regulator-name = "usb_vbus";
  89. regulator-min-microvolt = <5000000>;
  90. regulator-max-microvolt = <5000000>;
  91. gpio = <&gpio7 8 0>;
  92. enable-active-high;
  93. };
  94. };
  95. sound {
  96. compatible = "fsl,imx53-qsb-sgtl5000",
  97. "fsl,imx-audio-sgtl5000";
  98. model = "imx53-qsb-sgtl5000";
  99. ssi-controller = <&ssi2>;
  100. audio-codec = <&sgtl5000>;
  101. audio-routing =
  102. "MIC_IN", "Mic Jack",
  103. "Mic Jack", "Mic Bias",
  104. "Headphone Jack", "HP_OUT";
  105. mux-int-port = <2>;
  106. mux-ext-port = <5>;
  107. };
  108. };
  109. &cpu0 {
  110. /* CPU rated to 1GHz, not 1.2GHz as per the default settings */
  111. operating-points = <
  112. /* kHz uV */
  113. 166666 850000
  114. 400000 900000
  115. 800000 1050000
  116. 1000000 1200000
  117. >;
  118. };
  119. &esdhc1 {
  120. pinctrl-names = "default";
  121. pinctrl-0 = <&pinctrl_esdhc1>;
  122. cd-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
  123. status = "okay";
  124. };
  125. &ipu_di0_disp0 {
  126. remote-endpoint = <&display0_in>;
  127. };
  128. &ssi2 {
  129. status = "okay";
  130. };
  131. &esdhc3 {
  132. pinctrl-names = "default";
  133. pinctrl-0 = <&pinctrl_esdhc3>;
  134. cd-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
  135. wp-gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
  136. bus-width = <8>;
  137. status = "okay";
  138. };
  139. &iomuxc {
  140. pinctrl-names = "default";
  141. pinctrl-0 = <&pinctrl_hog>;
  142. imx53-qsb {
  143. pinctrl_hog: hoggrp {
  144. fsl,pins = <
  145. MX53_PAD_GPIO_8__GPIO1_8 0x80000000
  146. MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000
  147. MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000
  148. MX53_PAD_EIM_DA11__GPIO3_11 0x80000000
  149. MX53_PAD_EIM_DA12__GPIO3_12 0x80000000
  150. MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000
  151. MX53_PAD_PATA_DA_2__GPIO7_8 0x80000000
  152. MX53_PAD_GPIO_16__GPIO7_11 0x80000000
  153. >;
  154. };
  155. led_pin_gpio7_7: led_gpio7_7 {
  156. fsl,pins = <
  157. MX53_PAD_PATA_DA_1__GPIO7_7 0x80000000
  158. >;
  159. };
  160. pinctrl_audmux: audmuxgrp {
  161. fsl,pins = <
  162. MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC 0x80000000
  163. MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 0x80000000
  164. MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS 0x80000000
  165. MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD 0x80000000
  166. >;
  167. };
  168. pinctrl_codec: codecgrp {
  169. fsl,pins = <
  170. MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x1c4
  171. >;
  172. };
  173. pinctrl_esdhc1: esdhc1grp {
  174. fsl,pins = <
  175. MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
  176. MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
  177. MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
  178. MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
  179. MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
  180. MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
  181. MX53_PAD_EIM_DA13__GPIO3_13 0xe4
  182. >;
  183. };
  184. pinctrl_esdhc3: esdhc3grp {
  185. fsl,pins = <
  186. MX53_PAD_PATA_DATA8__ESDHC3_DAT0 0x1d5
  187. MX53_PAD_PATA_DATA9__ESDHC3_DAT1 0x1d5
  188. MX53_PAD_PATA_DATA10__ESDHC3_DAT2 0x1d5
  189. MX53_PAD_PATA_DATA11__ESDHC3_DAT3 0x1d5
  190. MX53_PAD_PATA_DATA0__ESDHC3_DAT4 0x1d5
  191. MX53_PAD_PATA_DATA1__ESDHC3_DAT5 0x1d5
  192. MX53_PAD_PATA_DATA2__ESDHC3_DAT6 0x1d5
  193. MX53_PAD_PATA_DATA3__ESDHC3_DAT7 0x1d5
  194. MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x1d5
  195. MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5
  196. >;
  197. };
  198. pinctrl_fec: fecgrp {
  199. fsl,pins = <
  200. MX53_PAD_FEC_MDC__FEC_MDC 0x4
  201. MX53_PAD_FEC_MDIO__FEC_MDIO 0x1fc
  202. MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x180
  203. MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x180
  204. MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x180
  205. MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x180
  206. MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x180
  207. MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x4
  208. MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x4
  209. MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x4
  210. >;
  211. };
  212. /* open drain */
  213. pinctrl_i2c1: i2c1grp {
  214. fsl,pins = <
  215. MX53_PAD_CSI0_DAT8__I2C1_SDA 0x400001ec
  216. MX53_PAD_CSI0_DAT9__I2C1_SCL 0x400001ec
  217. >;
  218. };
  219. pinctrl_i2c2: i2c2grp {
  220. fsl,pins = <
  221. MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000
  222. MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000
  223. >;
  224. };
  225. pinctrl_ipu_disp0: ipudisp0grp {
  226. fsl,pins = <
  227. MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK 0x5
  228. MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5
  229. MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5
  230. MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5
  231. MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5
  232. MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5
  233. MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5
  234. MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5
  235. MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5
  236. MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5
  237. MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 0x5
  238. MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7 0x5
  239. MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8 0x5
  240. MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9 0x5
  241. MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10 0x5
  242. MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11 0x5
  243. MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12 0x5
  244. MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13 0x5
  245. MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14 0x5
  246. MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15 0x5
  247. MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16 0x5
  248. MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17 0x5
  249. MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18 0x5
  250. MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19 0x5
  251. MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20 0x5
  252. MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21 0x5
  253. MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22 0x5
  254. MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23 0x5
  255. >;
  256. };
  257. pinctrl_vga_sync: vgasync-grp {
  258. fsl,pins = <
  259. /* VGA_HSYNC, VSYNC with max drive strength */
  260. MX53_PAD_EIM_OE__IPU_DI1_PIN7 0xe6
  261. MX53_PAD_EIM_RW__IPU_DI1_PIN8 0xe6
  262. >;
  263. };
  264. pinctrl_uart1: uart1grp {
  265. fsl,pins = <
  266. MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1e4
  267. MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1e4
  268. >;
  269. };
  270. };
  271. };
  272. &tve {
  273. pinctrl-names = "default";
  274. pinctrl-0 = <&pinctrl_vga_sync>;
  275. ddc-i2c-bus = <&i2c2>;
  276. fsl,tve-mode = "vga";
  277. fsl,hsync-pin = <7>; /* IPU DI1 PIN7 via EIM_OE */
  278. fsl,vsync-pin = <8>; /* IPU DI1 PIN8 via EIM_RW */
  279. status = "okay";
  280. };
  281. &uart1 {
  282. pinctrl-names = "default";
  283. pinctrl-0 = <&pinctrl_uart1>;
  284. status = "okay";
  285. };
  286. &i2c2 {
  287. pinctrl-names = "default";
  288. pinctrl-0 = <&pinctrl_i2c2>;
  289. status = "okay";
  290. sgtl5000: codec@a {
  291. compatible = "fsl,sgtl5000";
  292. reg = <0x0a>;
  293. pinctrl-names = "default";
  294. pinctrl-0 = <&pinctrl_codec>;
  295. #sound-dai-cells = <0>;
  296. VDDA-supply = <&reg_3p2v>;
  297. VDDIO-supply = <&reg_3p2v>;
  298. clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>;
  299. };
  300. };
  301. &i2c1 {
  302. pinctrl-names = "default";
  303. pinctrl-0 = <&pinctrl_i2c1>;
  304. status = "okay";
  305. accelerometer: mma8450@1c {
  306. compatible = "fsl,mma8450";
  307. reg = <0x1c>;
  308. };
  309. };
  310. &audmux {
  311. pinctrl-names = "default";
  312. pinctrl-0 = <&pinctrl_audmux>;
  313. status = "okay";
  314. };
  315. &fec {
  316. pinctrl-names = "default";
  317. pinctrl-0 = <&pinctrl_fec>;
  318. phy-mode = "rmii";
  319. phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
  320. status = "okay";
  321. };
  322. &sata {
  323. status = "okay";
  324. };
  325. &vpu {
  326. status = "okay";
  327. };
  328. &usbh1 {
  329. vbus-supply = <&reg_usb_vbus>;
  330. phy_type = "utmi";
  331. status = "okay";
  332. };
  333. &usbotg {
  334. dr_mode = "peripheral";
  335. status = "okay";
  336. };