imx53-m53menlo.dts 10 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright (C) 2019 Marek Vasut <[email protected]>
  4. */
  5. /dts-v1/;
  6. #include "imx53-m53.dtsi"
  7. / {
  8. model = "MENLO M53 EMBEDDED DEVICE";
  9. compatible = "menlo,m53menlo", "fsl,imx53";
  10. gpio-keys {
  11. compatible = "gpio-keys";
  12. pinctrl-0 = <&pinctrl_power_button>;
  13. pinctrl-names = "default";
  14. power-button {
  15. label = "Power button";
  16. gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  17. linux,code = <KEY_POWER>;
  18. };
  19. };
  20. gpio-poweroff {
  21. compatible = "gpio-poweroff";
  22. pinctrl-0 = <&pinctrl_power_out>;
  23. pinctrl-names = "default";
  24. gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
  25. };
  26. leds {
  27. compatible = "gpio-leds";
  28. pinctrl-names = "default";
  29. pinctrl-0 = <&pinctrl_led>;
  30. led-user1 {
  31. label = "TestLed601";
  32. gpios = <&gpio6 1 GPIO_ACTIVE_HIGH>;
  33. linux,default-trigger = "mmc0";
  34. };
  35. led-user2 {
  36. label = "TestLed602";
  37. gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>;
  38. linux,default-trigger = "heartbeat";
  39. };
  40. led-eth {
  41. label = "EthLedYe";
  42. gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
  43. linux,default-trigger = "netdev";
  44. };
  45. };
  46. lvds-decoder {
  47. compatible = "ti,ds90cf364a", "lvds-decoder";
  48. ports {
  49. #address-cells = <1>;
  50. #size-cells = <0>;
  51. port@0 {
  52. reg = <0>;
  53. lvds_decoder_in: endpoint {
  54. remote-endpoint = <&lvds0_out>;
  55. };
  56. };
  57. port@1 {
  58. reg = <1>;
  59. lvds_decoder_out: endpoint {
  60. remote-endpoint = <&panel_in>;
  61. };
  62. };
  63. };
  64. };
  65. panel {
  66. compatible = "edt,etm0700g0dh6";
  67. pinctrl-0 = <&pinctrl_display_gpio>;
  68. pinctrl-names = "default";
  69. enable-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
  70. port {
  71. panel_in: endpoint {
  72. remote-endpoint = <&lvds_decoder_out>;
  73. };
  74. };
  75. };
  76. beeper {
  77. compatible = "gpio-beeper";
  78. pinctrl-0 = <&pinctrl_beeper>;
  79. gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>;
  80. };
  81. reg_usbh1_vbus: regulator-usbh1-vbus {
  82. compatible = "regulator-fixed";
  83. regulator-name = "vbus";
  84. regulator-min-microvolt = <5000000>;
  85. regulator-max-microvolt = <5000000>;
  86. gpio = <&gpio1 2 0>;
  87. };
  88. };
  89. &can1 {
  90. pinctrl-names = "default";
  91. pinctrl-0 = <&pinctrl_can1>;
  92. status = "okay";
  93. };
  94. &can2 {
  95. pinctrl-names = "default";
  96. pinctrl-0 = <&pinctrl_can2>;
  97. status = "okay";
  98. };
  99. &clks {
  100. assigned-clocks = <&clks IMX5_CLK_CKO1_SEL>,
  101. <&clks IMX5_CLK_CKO1_PODF>,
  102. <&clks IMX5_CLK_CKO1>;
  103. assigned-clock-parents = <&clks IMX5_CLK_AHB>;
  104. assigned-clock-rates = <133333334>, <33333334>, <33333334>;
  105. };
  106. &ecspi2 {
  107. pinctrl-names = "default";
  108. pinctrl-0 = <&pinctrl_ecspi2>;
  109. cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>, <&gpio2 27 GPIO_ACTIVE_LOW>;
  110. status = "okay";
  111. spidev@0 {
  112. compatible = "menlo,m53cpld";
  113. spi-max-frequency = <25000000>;
  114. reg = <0>;
  115. };
  116. spidev@1 {
  117. compatible = "menlo,m53cpld";
  118. spi-max-frequency = <25000000>;
  119. reg = <1>;
  120. };
  121. };
  122. &esdhc1 {
  123. pinctrl-names = "default";
  124. pinctrl-0 = <&pinctrl_esdhc1>;
  125. cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
  126. wp-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
  127. status = "okay";
  128. };
  129. &fec {
  130. pinctrl-names = "default";
  131. pinctrl-0 = <&pinctrl_fec>;
  132. phy-mode = "rmii";
  133. phy-reset-gpios = <&gpio7 7 GPIO_ACTIVE_LOW>;
  134. status = "okay";
  135. };
  136. &gpio1 {
  137. gpio-line-names =
  138. "", "", "", "",
  139. "", "", "", "",
  140. "", "", "", "",
  141. "", "", "", "",
  142. "", "", "", "",
  143. "", "", "", "",
  144. "", "", "", "",
  145. "", "", "", "";
  146. };
  147. &gpio2 {
  148. gpio-line-names =
  149. "", "", "", "",
  150. "", "", "", "",
  151. "TestPin_SV2_3", "", "", "",
  152. "", "", "", "",
  153. "", "", "", "",
  154. "", "", "", "",
  155. "", "", "", "",
  156. "", "", "", "";
  157. };
  158. &gpio3 {
  159. gpio-line-names =
  160. "", "", "", "",
  161. "", "", "", "",
  162. "", "", "", "",
  163. "", "", "", "",
  164. "", "", "", "",
  165. "", "", "", "",
  166. "CPLD_JTAG_TDI", "CPLD_JTAG_TMS", "", "",
  167. "", "CPLD_JTAG_TDO", "", "";
  168. };
  169. &gpio5 {
  170. gpio-line-names =
  171. "", "", "", "",
  172. "", "", "", "",
  173. "", "", "", "",
  174. "", "", "", "",
  175. "", "", "CPLD_JTAG_TCK", "KBD_intK",
  176. "CPLD_int", "CPLD_JTAG_internal", "CPLD_D[0]", "CPLD_D[1]",
  177. "CPLD_D[2]", "CPLD_D[3]", "CPLD_D[4]", "CPLD_D[5]",
  178. "CPLD_D[6]", "CPLD_D[7]", "DISP_reset", "KBD_intI";
  179. };
  180. &gpio6 {
  181. gpio-line-names =
  182. "", "", "", "",
  183. "CPLD_reset", "", "", "",
  184. "", "", "", "",
  185. "", "", "", "",
  186. "", "", "", "",
  187. "", "", "", "",
  188. "", "", "", "",
  189. "", "", "", "";
  190. };
  191. &gpio7 {
  192. gpio-line-names =
  193. "", "", "", "",
  194. "", "", "", "",
  195. "", "", "", "",
  196. "", "USB-OTG_OverCurrent", "", "",
  197. "", "", "", "",
  198. "", "", "", "",
  199. "", "", "", "",
  200. "", "", "", "";
  201. };
  202. &i2c1 {
  203. pinctrl-names = "default";
  204. pinctrl-0 = <&pinctrl_i2c1>;
  205. status = "okay";
  206. touchscreen@38 {
  207. compatible = "edt,edt-ft5x06";
  208. reg = <0x38>;
  209. pinctrl-names = "default";
  210. pinctrl-0 = <&pinctrl_edt_ft5x06>;
  211. interrupt-parent = <&gpio6>;
  212. interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
  213. reset-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
  214. wake-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
  215. };
  216. eeprom@50 {
  217. compatible = "atmel,24c64";
  218. reg = <0x50>;
  219. pagesize = <32>;
  220. };
  221. dac@60 {
  222. compatible = "microchip,mcp4725";
  223. reg = <0x60>;
  224. };
  225. };
  226. &i2c2 {
  227. touchscreen@41 {
  228. status = "disabled";
  229. };
  230. };
  231. &i2c3 {
  232. pinctrl-names = "default";
  233. pinctrl-0 = <&pinctrl_i2c3>;
  234. status = "okay";
  235. };
  236. &iomuxc {
  237. pinctrl-names = "default";
  238. pinctrl-0 = <&pinctrl_hog>;
  239. imx53-m53evk {
  240. hoggrp {
  241. fsl,pins = <
  242. MX53_PAD_GPIO_19__CCM_CLKO 0x1e4
  243. MX53_PAD_CSI0_DATA_EN__GPIO5_20 0x1e4
  244. MX53_PAD_CSI0_DAT4__GPIO5_22 0x1e4
  245. MX53_PAD_CSI0_DAT5__GPIO5_23 0x1c4
  246. MX53_PAD_CSI0_DAT6__GPIO5_24 0x1e4
  247. MX53_PAD_CSI0_DAT7__GPIO5_25 0x1e4
  248. MX53_PAD_CSI0_DAT8__GPIO5_26 0x1e4
  249. MX53_PAD_CSI0_DAT9__GPIO5_27 0x1c4
  250. MX53_PAD_CSI0_DAT10__GPIO5_28 0x1e4
  251. MX53_PAD_CSI0_DAT11__GPIO5_29 0x1e4
  252. MX53_PAD_PATA_DATA11__GPIO2_11 0x1e4
  253. MX53_PAD_EIM_D24__GPIO3_24 0x1e4
  254. MX53_PAD_EIM_D25__GPIO3_25 0x1e4
  255. MX53_PAD_EIM_D29__GPIO3_29 0x1e4
  256. MX53_PAD_CSI0_PIXCLK__GPIO5_18 0x1e4
  257. MX53_PAD_CSI0_VSYNC__GPIO5_21 0x1e4
  258. MX53_PAD_CSI0_DAT18__GPIO6_4 0x1c4
  259. MX53_PAD_PATA_DATA8__GPIO2_8 0x1e4
  260. >;
  261. };
  262. pinctrl_led: ledgrp {
  263. fsl,pins = <
  264. MX53_PAD_CSI0_DAT15__GPIO6_1 0x1c4
  265. MX53_PAD_CSI0_DAT16__GPIO6_2 0x1c4
  266. >;
  267. };
  268. pinctrl_beeper: beepergrp {
  269. fsl,pins = <
  270. MX53_PAD_CSI0_DAT17__GPIO6_3 0x1c4
  271. >;
  272. };
  273. pinctrl_can1: can1grp {
  274. fsl,pins = <
  275. MX53_PAD_GPIO_7__CAN1_TXCAN 0x1c4
  276. MX53_PAD_GPIO_8__CAN1_RXCAN 0x1c4
  277. >;
  278. };
  279. pinctrl_can2: can2grp {
  280. fsl,pins = <
  281. MX53_PAD_KEY_COL4__CAN2_TXCAN 0x1e4
  282. MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x1c4
  283. >;
  284. };
  285. pinctrl_display_gpio: display-gpiogrp {
  286. fsl,pins = <
  287. MX53_PAD_CSI0_DAT12__GPIO5_30 0x1c4 /* Reset */
  288. MX53_PAD_CSI0_MCLK__GPIO5_19 0x1e4 /* Int-K */
  289. MX53_PAD_CSI0_DAT13__GPIO5_31 0x1c4 /* Int-I */
  290. MX53_PAD_CSI0_DAT14__GPIO6_0 0x1c4 /* Power down */
  291. >;
  292. };
  293. pinctrl_edt_ft5x06: edt-ft5x06grp {
  294. fsl,pins = <
  295. MX53_PAD_PATA_DATA9__GPIO2_9 0x1e4 /* Reset */
  296. MX53_PAD_CSI0_DAT19__GPIO6_5 0x1c4 /* Interrupt */
  297. MX53_PAD_PATA_DATA10__GPIO2_10 0x1e4 /* Wake */
  298. >;
  299. };
  300. pinctrl_ecspi2: ecspi2grp {
  301. fsl,pins = <
  302. MX53_PAD_EIM_CS0__ECSPI2_SCLK 0xe4
  303. MX53_PAD_EIM_OE__ECSPI2_MISO 0xe4
  304. MX53_PAD_EIM_CS1__ECSPI2_MOSI 0xe4
  305. MX53_PAD_EIM_RW__GPIO2_26 0xe4
  306. MX53_PAD_EIM_LBA__GPIO2_27 0xe4
  307. >;
  308. };
  309. pinctrl_esdhc1: esdhc1grp {
  310. fsl,pins = <
  311. MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1e4
  312. MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1e4
  313. MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1e4
  314. MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1e4
  315. MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1e4
  316. MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1e4
  317. MX53_PAD_GPIO_1__GPIO1_1 0x1c4
  318. MX53_PAD_GPIO_9__GPIO1_9 0x1e4
  319. >;
  320. };
  321. pinctrl_fec: fecgrp {
  322. fsl,pins = <
  323. MX53_PAD_FEC_MDC__FEC_MDC 0x1e4
  324. MX53_PAD_FEC_MDIO__FEC_MDIO 0x1e4
  325. MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x1e4
  326. MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x1e4
  327. MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x1e4
  328. MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x1e4
  329. MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x1e4
  330. MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x1c4
  331. MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x1e4
  332. MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x1e4
  333. MX53_PAD_PATA_DA_1__GPIO7_7 0x1e4
  334. MX53_PAD_EIM_EB3__GPIO2_31 0x1e4
  335. >;
  336. };
  337. pinctrl_i2c1: i2c1grp {
  338. fsl,pins = <
  339. MX53_PAD_EIM_D21__I2C1_SCL 0x400001e4
  340. MX53_PAD_EIM_D28__I2C1_SDA 0x400001e4
  341. >;
  342. };
  343. pinctrl_i2c3: i2c3grp {
  344. fsl,pins = <
  345. MX53_PAD_GPIO_6__I2C3_SDA 0x400001e4
  346. MX53_PAD_GPIO_5__I2C3_SCL 0x400001e4
  347. >;
  348. };
  349. pinctrl_lvds0: lvds0grp {
  350. /* LVDS pins only have pin mux configuration */
  351. fsl,pins = <
  352. MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x80000000
  353. MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x80000000
  354. MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x80000000
  355. MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x80000000
  356. MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000
  357. >;
  358. };
  359. pinctrl_power_button: powerbutgrp {
  360. fsl,pins = <
  361. MX53_PAD_SD2_DATA0__GPIO1_15 0x1e4
  362. >;
  363. };
  364. pinctrl_power_out: poweroutgrp {
  365. fsl,pins = <
  366. MX53_PAD_SD2_DATA2__GPIO1_13 0x1e4
  367. >;
  368. };
  369. pinctrl_uart1: uart1grp {
  370. fsl,pins = <
  371. MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
  372. MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
  373. MX53_PAD_PATA_IORDY__UART1_RTS 0x1e4
  374. MX53_PAD_PATA_RESET_B__UART1_CTS 0x1e4
  375. >;
  376. };
  377. pinctrl_uart2: uart2grp {
  378. fsl,pins = <
  379. MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
  380. MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4
  381. MX53_PAD_PATA_DIOR__UART2_RTS 0x1e4
  382. MX53_PAD_PATA_INTRQ__UART2_CTS 0x1e4
  383. >;
  384. };
  385. pinctrl_uart3: uart3grp {
  386. fsl,pins = <
  387. MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
  388. MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
  389. MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4
  390. >;
  391. };
  392. pinctrl_usb: usbgrp {
  393. fsl,pins = <
  394. MX53_PAD_GPIO_2__GPIO1_2 0x1c4
  395. MX53_PAD_GPIO_3__USBOH3_USBH1_OC 0x1c4
  396. MX53_PAD_GPIO_4__GPIO1_4 0x1c4
  397. MX53_PAD_GPIO_18__GPIO7_13 0x1c4
  398. >;
  399. };
  400. };
  401. };
  402. &ldb {
  403. pinctrl-names = "default";
  404. pinctrl-0 = <&pinctrl_lvds0>;
  405. status = "okay";
  406. lvds0: lvds-channel@0 {
  407. reg = <0>;
  408. fsl,data-mapping = "spwg";
  409. fsl,data-width = <18>;
  410. status = "okay";
  411. port@2 {
  412. reg = <2>;
  413. lvds0_out: endpoint {
  414. remote-endpoint = <&lvds_decoder_in>;
  415. };
  416. };
  417. };
  418. };
  419. &uart1 {
  420. pinctrl-names = "default";
  421. pinctrl-0 = <&pinctrl_uart1>;
  422. uart-has-rtscts;
  423. status = "okay";
  424. };
  425. &uart2 {
  426. pinctrl-names = "default";
  427. pinctrl-0 = <&pinctrl_uart2>;
  428. uart-has-rtscts;
  429. status = "okay";
  430. };
  431. &uart3 {
  432. pinctrl-names = "default";
  433. pinctrl-0 = <&pinctrl_uart3>;
  434. linux,rs485-enabled-at-boot-time;
  435. status = "okay";
  436. };
  437. &usbh1 {
  438. pinctrl-names = "default";
  439. pinctrl-0 = <&pinctrl_usb>;
  440. vbus-supply = <&reg_usbh1_vbus>;
  441. phy_type = "utmi";
  442. dr_mode = "host";
  443. status = "okay";
  444. };
  445. &usbotg {
  446. dr_mode = "peripheral";
  447. status = "okay";
  448. };