imx51-zii-scu3-esb.dts 8.9 KB

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  1. // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2. /*
  3. * Copyright (C) 2018 Zodiac Inflight Innovations
  4. */
  5. /dts-v1/;
  6. #include "imx51.dtsi"
  7. / {
  8. model = "ZII SCU3 ESB board";
  9. compatible = "zii,imx51-scu3-esb", "fsl,imx51";
  10. chosen {
  11. stdout-path = &uart1;
  12. };
  13. /* Will be filled by the bootloader */
  14. memory@90000000 {
  15. device_type = "memory";
  16. reg = <0x90000000 0>;
  17. };
  18. usb_vbus: regulator-usb-vbus {
  19. compatible = "regulator-fixed";
  20. regulator-name = "usb_vbus";
  21. regulator-min-microvolt = <5000000>;
  22. regulator-max-microvolt = <5000000>;
  23. pinctrl-names = "default";
  24. pinctrl-0 = <&pinctrl_usb_mmc_reset>;
  25. gpio = <&gpio4 19 GPIO_ACTIVE_LOW>;
  26. startup-delay-us = <150000>;
  27. };
  28. };
  29. &cpu {
  30. cpu-supply = <&sw1_reg>;
  31. };
  32. &ecspi1 {
  33. pinctrl-names = "default";
  34. pinctrl-0 = <&pinctrl_ecspi1>;
  35. cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>,
  36. <&gpio4 25 GPIO_ACTIVE_LOW>;
  37. status = "okay";
  38. pmic@0 {
  39. compatible = "fsl,mc13892";
  40. pinctrl-names = "default";
  41. pinctrl-0 = <&pinctrl_pmic>;
  42. spi-max-frequency = <6000000>;
  43. spi-cs-high;
  44. reg = <0>;
  45. interrupt-parent = <&gpio1>;
  46. interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
  47. fsl,mc13xxx-uses-adc;
  48. regulators {
  49. sw1_reg: sw1 {
  50. regulator-min-microvolt = <600000>;
  51. regulator-max-microvolt = <1375000>;
  52. regulator-boot-on;
  53. regulator-always-on;
  54. };
  55. sw2_reg: sw2 {
  56. regulator-min-microvolt = <900000>;
  57. regulator-max-microvolt = <1850000>;
  58. regulator-boot-on;
  59. regulator-always-on;
  60. };
  61. sw3_reg: sw3 {
  62. regulator-min-microvolt = <1100000>;
  63. regulator-max-microvolt = <1850000>;
  64. regulator-boot-on;
  65. regulator-always-on;
  66. };
  67. sw4_reg: sw4 {
  68. regulator-min-microvolt = <1100000>;
  69. regulator-max-microvolt = <1850000>;
  70. regulator-boot-on;
  71. regulator-always-on;
  72. };
  73. vpll_reg: vpll {
  74. regulator-min-microvolt = <1050000>;
  75. regulator-max-microvolt = <1800000>;
  76. regulator-boot-on;
  77. regulator-always-on;
  78. };
  79. vdig_reg: vdig {
  80. regulator-min-microvolt = <1650000>;
  81. regulator-max-microvolt = <1650000>;
  82. regulator-boot-on;
  83. };
  84. vsd_reg: vsd {
  85. regulator-min-microvolt = <1800000>;
  86. regulator-max-microvolt = <3150000>;
  87. };
  88. vusb_reg: vusb {
  89. regulator-always-on;
  90. };
  91. vusb2_reg: vusb2 {
  92. regulator-min-microvolt = <2400000>;
  93. regulator-max-microvolt = <2775000>;
  94. regulator-boot-on;
  95. regulator-always-on;
  96. };
  97. vvideo_reg: vvideo {
  98. regulator-min-microvolt = <2775000>;
  99. regulator-max-microvolt = <2775000>;
  100. };
  101. vaudio_reg: vaudio {
  102. regulator-min-microvolt = <2300000>;
  103. regulator-max-microvolt = <3000000>;
  104. };
  105. vcam_reg: vcam {
  106. regulator-min-microvolt = <2500000>;
  107. regulator-max-microvolt = <3000000>;
  108. };
  109. vgen1_reg: vgen1 {
  110. regulator-min-microvolt = <1200000>;
  111. regulator-max-microvolt = <1200000>;
  112. };
  113. vgen2_reg: vgen2 {
  114. regulator-min-microvolt = <1200000>;
  115. regulator-max-microvolt = <3150000>;
  116. regulator-always-on;
  117. };
  118. vgen3_reg: vgen3 {
  119. regulator-min-microvolt = <1800000>;
  120. regulator-max-microvolt = <2900000>;
  121. regulator-always-on;
  122. };
  123. };
  124. leds {
  125. #address-cells = <1>;
  126. #size-cells = <0>;
  127. led-control = <0x0 0x0 0x3f83f8 0x0>;
  128. sysled3: led3@3 {
  129. reg = <3>;
  130. label = "system:red:power";
  131. linux,default-trigger = "default-on";
  132. };
  133. sysled4: led4@4 {
  134. reg = <4>;
  135. label = "system:green:act";
  136. linux,default-trigger = "heartbeat";
  137. };
  138. };
  139. };
  140. flash@1 {
  141. #address-cells = <1>;
  142. #size-cells = <1>;
  143. compatible = "atmel,at45", "atmel,dataflash";
  144. spi-max-frequency = <25000000>;
  145. reg = <1>;
  146. };
  147. };
  148. &esdhc1 {
  149. pinctrl-names = "default";
  150. pinctrl-0 = <&pinctrl_esdhc1>;
  151. bus-width = <8>;
  152. non-removable;
  153. no-1-8-v;
  154. no-sdio;
  155. no-sd;
  156. status = "okay";
  157. };
  158. &esdhc4 {
  159. pinctrl-names = "default";
  160. pinctrl-0 = <&pinctrl_esdhc4>;
  161. bus-width = <4>;
  162. no-1-8-v;
  163. no-sdio;
  164. cd-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
  165. status = "okay";
  166. };
  167. &fec {
  168. pinctrl-names = "default";
  169. pinctrl-0 = <&pinctrl_fec>;
  170. phy-mode = "mii";
  171. status = "okay";
  172. fixed-link {
  173. speed = <100>;
  174. full-duplex;
  175. };
  176. fec_mdio: mdio {
  177. #address-cells = <1>;
  178. #size-cells = <0>;
  179. status = "okay";
  180. switch@0 {
  181. compatible = "marvell,mv88e6085";
  182. reg = <0>;
  183. dsa,member = <0 0>;
  184. eeprom-length = <512>;
  185. interrupt-parent = <&gpio4>;
  186. interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
  187. interrupt-controller;
  188. #interrupt-cells = <2>;
  189. pinctrl-names = "default";
  190. pinctrl-0 = <&pinctrl_switch>;
  191. ports {
  192. #address-cells = <1>;
  193. #size-cells = <0>;
  194. port@0 {
  195. reg = <0>;
  196. label = "port1";
  197. };
  198. port@1 {
  199. reg = <1>;
  200. label = "port2";
  201. };
  202. port@2 {
  203. reg = <2>;
  204. label = "port3";
  205. };
  206. port@3 {
  207. reg = <3>;
  208. label = "scu2scu";
  209. };
  210. port@4 {
  211. reg = <4>;
  212. label = "esb2host";
  213. };
  214. port@5 {
  215. reg = <5>;
  216. label = "esb2mezz";
  217. phy-mode = "sgmii";
  218. fixed-link {
  219. speed = <1000>;
  220. full-duplex;
  221. };
  222. };
  223. port@6 {
  224. reg = <6>;
  225. label = "cpu";
  226. phy-mode = "mii";
  227. ethernet = <&fec>;
  228. fixed-link {
  229. speed = <100>;
  230. full-duplex;
  231. };
  232. };
  233. };
  234. };
  235. };
  236. };
  237. &ipu {
  238. status = "disabled";
  239. };
  240. &i2c2 {
  241. pinctrl-names = "default";
  242. pinctrl-0 = <&pinctrl_i2c2>;
  243. status = "okay";
  244. eeprom@50 {
  245. compatible = "atmel,24c04";
  246. pagesize = <16>;
  247. reg = <0x50>;
  248. };
  249. lm75@48 {
  250. compatible = "national,lm75";
  251. reg = <0x48>;
  252. };
  253. };
  254. &uart1 {
  255. pinctrl-names = "default";
  256. pinctrl-0 = <&pinctrl_uart1>;
  257. status = "okay";
  258. };
  259. &uart2 {
  260. pinctrl-names = "default";
  261. pinctrl-0 = <&pinctrl_uart2>;
  262. status = "okay";
  263. };
  264. &uart3 {
  265. pinctrl-names = "default";
  266. pinctrl-0 = <&pinctrl_uart3>;
  267. status = "okay";
  268. rave-sp {
  269. compatible = "zii,rave-sp-esb";
  270. current-speed = <57600>;
  271. #address-cells = <1>;
  272. #size-cells = <1>;
  273. watchdog {
  274. compatible = "zii,rave-sp-watchdog-legacy";
  275. };
  276. eeprom@a4 {
  277. compatible = "zii,rave-sp-eeprom";
  278. reg = <0xa4 0x4000>;
  279. #address-cells = <1>;
  280. #size-cells = <1>;
  281. zii,eeprom-name = "main-eeprom";
  282. };
  283. };
  284. };
  285. &usbotg {
  286. dr_mode = "host";
  287. disable-over-current;
  288. phy_type = "utmi_wide";
  289. vbus-supply = <&usb_vbus>;
  290. status = "okay";
  291. };
  292. &usbphy0 {
  293. vcc-supply = <&vusb2_reg>;
  294. };
  295. &vpu {
  296. status = "disabled";
  297. };
  298. &wdog1 {
  299. status = "disabled";
  300. };
  301. &iomuxc {
  302. pinctrl_ecspi1: ecspi1grp {
  303. fsl,pins = <
  304. MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185
  305. MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185
  306. MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185
  307. MX51_PAD_CSPI1_SS0__GPIO4_24 0x85
  308. MX51_PAD_CSPI1_SS1__GPIO4_25 0x85
  309. >;
  310. };
  311. pinctrl_esdhc1: esdhc1grp {
  312. fsl,pins = <
  313. MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5
  314. MX51_PAD_SD1_CLK__SD1_CLK 0x20d5
  315. MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5
  316. MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
  317. MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
  318. MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
  319. MX51_PAD_SD2_DATA0__SD1_DAT4 0x20d5
  320. MX51_PAD_SD2_DATA1__SD1_DAT5 0x20d5
  321. MX51_PAD_SD2_DATA2__SD1_DAT6 0x20d5
  322. MX51_PAD_SD2_DATA3__SD1_DAT7 0x20d5
  323. >;
  324. };
  325. pinctrl_esdhc4: esdhc4grp {
  326. fsl,pins = <
  327. MX51_PAD_NANDF_RB1__SD4_CMD 0x400020d5
  328. MX51_PAD_NANDF_CS2__SD4_CLK 0x20d5
  329. MX51_PAD_NANDF_CS3__SD4_DAT0 0x20d5
  330. MX51_PAD_NANDF_CS4__SD4_DAT1 0x20d5
  331. MX51_PAD_NANDF_CS5__SD4_DAT2 0x20d5
  332. MX51_PAD_NANDF_CS6__SD4_DAT3 0x20d5
  333. MX51_PAD_NANDF_D0__GPIO4_8 0x100
  334. >;
  335. };
  336. pinctrl_fec: fecgrp {
  337. fsl,pins = <
  338. MX51_PAD_DISP2_DAT15__FEC_TDATA0 0x2004
  339. MX51_PAD_DISP2_DAT6__FEC_TDATA1 0x2004
  340. MX51_PAD_DISP2_DAT7__FEC_TDATA2 0x2004
  341. MX51_PAD_DISP2_DAT8__FEC_TDATA3 0x2004
  342. MX51_PAD_DISP2_DAT9__FEC_TX_EN 0x2004
  343. MX51_PAD_DISP2_DAT10__FEC_COL 0x0180
  344. MX51_PAD_DISP2_DAT11__FEC_RX_CLK 0x0180
  345. MX51_PAD_DISP2_DAT12__FEC_RX_DV 0x20a4
  346. MX51_PAD_DISP2_DAT13__FEC_TX_CLK 0x2180
  347. MX51_PAD_DISP2_DAT14__FEC_RDATA0 0x2180
  348. MX51_PAD_DI2_DISP_CLK__FEC_RDATA1 0x0085
  349. MX51_PAD_DI_GP4__FEC_RDATA2 0x0085
  350. MX51_PAD_DISP2_DAT0__FEC_RDATA3 0x0085
  351. MX51_PAD_DI2_PIN2__FEC_MDC 0x2004
  352. MX51_PAD_DI2_PIN3__FEC_MDIO 0x01f5
  353. MX51_PAD_DI2_PIN4__FEC_CRS 0x0180
  354. >;
  355. };
  356. pinctrl_i2c2: i2c2grp {
  357. fsl,pins = <
  358. MX51_PAD_KEY_COL4__I2C2_SCL 0x400001ed
  359. MX51_PAD_KEY_COL5__I2C2_SDA 0x400001ed
  360. >;
  361. };
  362. pinctrl_pmic: pmicgrp {
  363. fsl,pins = <
  364. MX51_PAD_GPIO1_4__GPIO1_4 0x85
  365. MX51_PAD_GPIO1_8__GPIO1_8 0xe5
  366. >;
  367. };
  368. pinctrl_switch: switchgrp {
  369. fsl,pins = <
  370. MX51_PAD_AUD3_BB_CK__GPIO4_20 0xc5
  371. >;
  372. };
  373. pinctrl_uart1: uart1grp {
  374. fsl,pins = <
  375. MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
  376. MX51_PAD_UART1_TXD__UART1_TXD 0x1c5
  377. MX51_PAD_UART1_RTS__UART1_RTS 0x1c5
  378. MX51_PAD_UART1_CTS__UART1_CTS 0x1c5
  379. >;
  380. };
  381. pinctrl_uart2: uart2grp {
  382. fsl,pins = <
  383. MX51_PAD_UART2_RXD__UART2_RXD 0x1c5
  384. MX51_PAD_UART2_TXD__UART2_TXD 0x1c5
  385. MX51_PAD_USBH1_DATA0__UART2_CTS 0x1c5
  386. MX51_PAD_USBH1_DATA3__UART2_RTS 0x1c5
  387. >;
  388. };
  389. pinctrl_uart3: uart3grp {
  390. fsl,pins = <
  391. MX51_PAD_UART3_RXD__UART3_RXD 0x1c5
  392. MX51_PAD_UART3_TXD__UART3_TXD 0x1c5
  393. >;
  394. };
  395. pinctrl_usb_mmc_reset: usbmmcgrp {
  396. fsl,pins = <
  397. MX51_PAD_AUD3_BB_RXD__GPIO4_19 0x100
  398. >;
  399. };
  400. };