imx51-eukrea-cpuimx51.dtsi 2.0 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192
  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright 2013 Eukréa Electromatique <[email protected]>
  4. */
  5. #include "imx51.dtsi"
  6. / {
  7. model = "Eukrea CPUIMX51";
  8. compatible = "eukrea,cpuimx51", "fsl,imx51";
  9. memory@90000000 {
  10. device_type = "memory";
  11. reg = <0x90000000 0x10000000>; /* 256M */
  12. };
  13. };
  14. &fec {
  15. pinctrl-names = "default";
  16. pinctrl-0 = <&pinctrl_fec>;
  17. status = "okay";
  18. };
  19. &i2c1 {
  20. pinctrl-names = "default";
  21. pinctrl-0 = <&pinctrl_i2c1>;
  22. status = "okay";
  23. pcf8563@51 {
  24. compatible = "nxp,pcf8563";
  25. reg = <0x51>;
  26. };
  27. tsc2007: tsc2007@49 {
  28. compatible = "ti,tsc2007";
  29. gpios = <&gpio4 0 1>;
  30. interrupt-parent = <&gpio4>;
  31. interrupts = <0x0 0x8>;
  32. pinctrl-names = "default";
  33. pinctrl-0 = <&pinctrl_tsc2007_1>;
  34. reg = <0x49>;
  35. ti,x-plate-ohms = <180>;
  36. };
  37. };
  38. &iomuxc {
  39. imx51-eukrea {
  40. pinctrl_tsc2007_1: tsc2007grp-1 {
  41. fsl,pins = <
  42. MX51_PAD_GPIO_NAND__GPIO_NAND 0x1f5
  43. MX51_PAD_NANDF_D8__GPIO4_0 0x1f5
  44. >;
  45. };
  46. pinctrl_fec: fecgrp {
  47. fsl,pins = <
  48. MX51_PAD_DI_GP3__FEC_TX_ER 0x80000000
  49. MX51_PAD_DI2_PIN4__FEC_CRS 0x80000000
  50. MX51_PAD_DI2_PIN2__FEC_MDC 0x80000000
  51. MX51_PAD_DI2_PIN3__FEC_MDIO 0x80000000
  52. MX51_PAD_DI2_DISP_CLK__FEC_RDATA1 0x80000000
  53. MX51_PAD_DI_GP4__FEC_RDATA2 0x80000000
  54. MX51_PAD_DISP2_DAT0__FEC_RDATA3 0x80000000
  55. MX51_PAD_DISP2_DAT1__FEC_RX_ER 0x80000000
  56. MX51_PAD_DISP2_DAT6__FEC_TDATA1 0x80000000
  57. MX51_PAD_DISP2_DAT7__FEC_TDATA2 0x80000000
  58. MX51_PAD_DISP2_DAT8__FEC_TDATA3 0x80000000
  59. MX51_PAD_DISP2_DAT9__FEC_TX_EN 0x80000000
  60. MX51_PAD_DISP2_DAT10__FEC_COL 0x80000000
  61. MX51_PAD_DISP2_DAT11__FEC_RX_CLK 0x80000000
  62. MX51_PAD_DISP2_DAT12__FEC_RX_DV 0x80000000
  63. MX51_PAD_DISP2_DAT13__FEC_TX_CLK 0x80000000
  64. MX51_PAD_DISP2_DAT14__FEC_RDATA0 0x80000000
  65. MX51_PAD_DISP2_DAT15__FEC_TDATA0 0x80000000
  66. >;
  67. };
  68. pinctrl_i2c1: i2c1grp {
  69. fsl,pins = <
  70. MX51_PAD_SD2_CMD__I2C1_SCL 0x400001ed
  71. MX51_PAD_SD2_CLK__I2C1_SDA 0x400001ed
  72. >;
  73. };
  74. };
  75. };
  76. &nfc {
  77. nand-bus-width = <8>;
  78. nand-ecc-mode = "hw";
  79. nand-on-flash-bbt;
  80. status = "okay";
  81. };