imx51-apf51dev.dts 4.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright 2013 Armadeus Systems - <[email protected]>
  4. */
  5. /* APF51Dev is a docking board for the APF51 SOM */
  6. #include "imx51-apf51.dts"
  7. / {
  8. model = "Armadeus Systems APF51Dev docking/development board";
  9. compatible = "armadeus,imx51-apf51dev", "armadeus,imx51-apf51", "fsl,imx51";
  10. backlight {
  11. pinctrl-names = "default";
  12. pinctrl-0 = <&pinctrl_backlight>;
  13. compatible = "gpio-backlight";
  14. gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
  15. default-on;
  16. };
  17. disp1 {
  18. compatible = "fsl,imx-parallel-display";
  19. interface-pix-fmt = "bgr666";
  20. pinctrl-names = "default";
  21. pinctrl-0 = <&pinctrl_ipu_disp1>;
  22. display-timings {
  23. lw700 {
  24. native-mode;
  25. clock-frequency = <33000033>;
  26. hactive = <800>;
  27. vactive = <480>;
  28. hback-porch = <96>;
  29. hfront-porch = <96>;
  30. vback-porch = <20>;
  31. vfront-porch = <21>;
  32. hsync-len = <64>;
  33. vsync-len = <4>;
  34. hsync-active = <1>;
  35. vsync-active = <1>;
  36. de-active = <1>;
  37. pixelclk-active = <0>;
  38. };
  39. };
  40. port {
  41. display_in: endpoint {
  42. remote-endpoint = <&ipu_di0_disp1>;
  43. };
  44. };
  45. };
  46. gpio-keys {
  47. compatible = "gpio-keys";
  48. user-key {
  49. label = "user";
  50. gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
  51. linux,code = <256>; /* BTN_0 */
  52. };
  53. };
  54. leds {
  55. compatible = "gpio-leds";
  56. led-user {
  57. label = "Heartbeat";
  58. gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
  59. linux,default-trigger = "heartbeat";
  60. };
  61. };
  62. };
  63. &ecspi1 {
  64. pinctrl-names = "default";
  65. pinctrl-0 = <&pinctrl_ecspi1>;
  66. cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>,
  67. <&gpio4 25 GPIO_ACTIVE_LOW>;
  68. status = "okay";
  69. };
  70. &ecspi2 {
  71. pinctrl-names = "default";
  72. pinctrl-0 = <&pinctrl_ecspi2>;
  73. cs-gpios = <&gpio3 28 GPIO_ACTIVE_LOW>,
  74. <&gpio3 27 GPIO_ACTIVE_LOW>;
  75. status = "okay";
  76. };
  77. &esdhc1 {
  78. pinctrl-names = "default";
  79. pinctrl-0 = <&pinctrl_esdhc1>;
  80. cd-gpios = <&gpio2 29 GPIO_ACTIVE_LOW>;
  81. bus-width = <4>;
  82. status = "okay";
  83. };
  84. &esdhc2 {
  85. pinctrl-names = "default";
  86. pinctrl-0 = <&pinctrl_esdhc2>;
  87. bus-width = <4>;
  88. non-removable;
  89. status = "okay";
  90. };
  91. &i2c2 {
  92. pinctrl-names = "default";
  93. pinctrl-0 = <&pinctrl_i2c2>;
  94. status = "okay";
  95. };
  96. &iomuxc {
  97. pinctrl-names = "default";
  98. pinctrl-0 = <&pinctrl_hog>;
  99. imx51-apf51dev {
  100. pinctrl_backlight: backlightgrp {
  101. fsl,pins = <
  102. MX51_PAD_DI1_D1_CS__GPIO3_4 0x1F5
  103. >;
  104. };
  105. pinctrl_hog: hoggrp {
  106. fsl,pins = <
  107. MX51_PAD_EIM_EB2__GPIO2_22 0x0C5
  108. MX51_PAD_EIM_EB3__GPIO2_23 0x0C5
  109. MX51_PAD_EIM_CS4__GPIO2_29 0x100
  110. MX51_PAD_NANDF_D13__GPIO3_27 0x0C5
  111. MX51_PAD_NANDF_D12__GPIO3_28 0x0C5
  112. MX51_PAD_CSPI1_SS0__GPIO4_24 0x0C5
  113. MX51_PAD_CSPI1_SS1__GPIO4_25 0x0C5
  114. MX51_PAD_GPIO1_2__GPIO1_2 0x0C5
  115. MX51_PAD_GPIO1_3__GPIO1_3 0x0C5
  116. >;
  117. };
  118. pinctrl_ecspi1: ecspi1grp {
  119. fsl,pins = <
  120. MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185
  121. MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185
  122. MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185
  123. >;
  124. };
  125. pinctrl_ecspi2: ecspi2grp {
  126. fsl,pins = <
  127. MX51_PAD_NANDF_RB3__ECSPI2_MISO 0x185
  128. MX51_PAD_NANDF_D15__ECSPI2_MOSI 0x185
  129. MX51_PAD_NANDF_RB2__ECSPI2_SCLK 0x185
  130. >;
  131. };
  132. pinctrl_esdhc1: esdhc1grp {
  133. fsl,pins = <
  134. MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5
  135. MX51_PAD_SD1_CLK__SD1_CLK 0x20d5
  136. MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5
  137. MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
  138. MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
  139. MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
  140. >;
  141. };
  142. pinctrl_esdhc2: esdhc2grp {
  143. fsl,pins = <
  144. MX51_PAD_SD2_CMD__SD2_CMD 0x400020d5
  145. MX51_PAD_SD2_CLK__SD2_CLK 0x20d5
  146. MX51_PAD_SD2_DATA0__SD2_DATA0 0x20d5
  147. MX51_PAD_SD2_DATA1__SD2_DATA1 0x20d5
  148. MX51_PAD_SD2_DATA2__SD2_DATA2 0x20d5
  149. MX51_PAD_SD2_DATA3__SD2_DATA3 0x20d5
  150. >;
  151. };
  152. pinctrl_i2c2: i2c2grp {
  153. fsl,pins = <
  154. MX51_PAD_EIM_D27__I2C2_SCL 0x400001ed
  155. MX51_PAD_EIM_D24__I2C2_SDA 0x400001ed
  156. >;
  157. };
  158. pinctrl_ipu_disp1: ipudisp1grp {
  159. fsl,pins = <
  160. MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5
  161. MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5
  162. MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5
  163. MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5
  164. MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5
  165. MX51_PAD_DISP1_DAT5__DISP1_DAT5 0x5
  166. MX51_PAD_DISP1_DAT6__DISP1_DAT6 0x5
  167. MX51_PAD_DISP1_DAT7__DISP1_DAT7 0x5
  168. MX51_PAD_DISP1_DAT8__DISP1_DAT8 0x5
  169. MX51_PAD_DISP1_DAT9__DISP1_DAT9 0x5
  170. MX51_PAD_DISP1_DAT10__DISP1_DAT10 0x5
  171. MX51_PAD_DISP1_DAT11__DISP1_DAT11 0x5
  172. MX51_PAD_DISP1_DAT12__DISP1_DAT12 0x5
  173. MX51_PAD_DISP1_DAT13__DISP1_DAT13 0x5
  174. MX51_PAD_DISP1_DAT14__DISP1_DAT14 0x5
  175. MX51_PAD_DISP1_DAT15__DISP1_DAT15 0x5
  176. MX51_PAD_DISP1_DAT16__DISP1_DAT16 0x5
  177. MX51_PAD_DISP1_DAT17__DISP1_DAT17 0x5
  178. MX51_PAD_DISP1_DAT18__DISP1_DAT18 0x5
  179. MX51_PAD_DISP1_DAT19__DISP1_DAT19 0x5
  180. MX51_PAD_DISP1_DAT20__DISP1_DAT20 0x5
  181. MX51_PAD_DISP1_DAT21__DISP1_DAT21 0x5
  182. MX51_PAD_DISP1_DAT22__DISP1_DAT22 0x5
  183. MX51_PAD_DISP1_DAT23__DISP1_DAT23 0x5
  184. MX51_PAD_DI1_PIN2__DI1_PIN2 0x5
  185. MX51_PAD_DI1_PIN3__DI1_PIN3 0x5
  186. >;
  187. };
  188. };
  189. };
  190. &ipu_di0_disp1 {
  191. remote-endpoint = <&display_in>;
  192. };