imx27-phytec-phycard-s-som.dtsi 2.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright 2012 Sascha Hauer, Uwe Kleine-König, Steffen Trumtrar
  4. * and Markus Pargmann, Pengutronix
  5. */
  6. /dts-v1/;
  7. #include "imx27.dtsi"
  8. / {
  9. model = "Phytec pca100";
  10. compatible = "phytec,imx27-pca100", "fsl,imx27";
  11. memory@a0000000 {
  12. device_type = "memory";
  13. reg = <0xa0000000 0x08000000>; /* 128MB */
  14. };
  15. };
  16. &cspi1 {
  17. cs-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>,
  18. <&gpio4 27 GPIO_ACTIVE_LOW>;
  19. status = "okay";
  20. };
  21. &fec {
  22. pinctrl-names = "default";
  23. pinctrl-0 = <&pinctrl_fec1>;
  24. status = "okay";
  25. };
  26. &i2c2 {
  27. pinctrl-names = "default";
  28. pinctrl-0 = <&pinctrl_i2c2>;
  29. status = "okay";
  30. at24@52 {
  31. compatible = "atmel,24c32";
  32. pagesize = <32>;
  33. reg = <0x52>;
  34. };
  35. };
  36. &iomuxc {
  37. imx27-phycard-s-som {
  38. pinctrl_fec1: fec1grp {
  39. fsl,pins = <
  40. MX27_PAD_SD3_CMD__FEC_TXD0 0x0
  41. MX27_PAD_SD3_CLK__FEC_TXD1 0x0
  42. MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
  43. MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
  44. MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
  45. MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
  46. MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
  47. MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
  48. MX27_PAD_ATA_DATA6__FEC_MDIO 0x0
  49. MX27_PAD_ATA_DATA7__FEC_MDC 0x0
  50. MX27_PAD_ATA_DATA8__FEC_CRS 0x0
  51. MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0
  52. MX27_PAD_ATA_DATA10__FEC_RXD0 0x0
  53. MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0
  54. MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0
  55. MX27_PAD_ATA_DATA13__FEC_COL 0x0
  56. MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0
  57. MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0
  58. >;
  59. };
  60. pinctrl_i2c2: i2c2grp {
  61. fsl,pins = <
  62. MX27_PAD_I2C2_SDA__I2C2_SDA 0x0
  63. MX27_PAD_I2C2_SCL__I2C2_SCL 0x0
  64. >;
  65. };
  66. pinctrl_nfc: nfcgrp {
  67. fsl,pins = <
  68. MX27_PAD_NFRB__NFRB 0x0
  69. MX27_PAD_NFCLE__NFCLE 0x0
  70. MX27_PAD_NFWP_B__NFWP_B 0x0
  71. MX27_PAD_NFCE_B__NFCE_B 0x0
  72. MX27_PAD_NFALE__NFALE 0x0
  73. MX27_PAD_NFRE_B__NFRE_B 0x0
  74. MX27_PAD_NFWE_B__NFWE_B 0x0
  75. >;
  76. };
  77. };
  78. };
  79. &nfc {
  80. pinctrl-names = "default";
  81. pinctrl-0 = <&pinctrl_nfc>;
  82. nand-bus-width = <8>;
  83. nand-ecc-mode = "hw";
  84. nand-on-flash-bbt;
  85. status = "okay";
  86. };