hi3620-hi4511.dts 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2012-2013 Linaro Ltd.
  4. * Author: Haojian Zhuang <[email protected]>
  5. */
  6. /dts-v1/;
  7. #include "hi3620.dtsi"
  8. / {
  9. model = "Hisilicon Hi4511 Development Board";
  10. compatible = "hisilicon,hi3620-hi4511";
  11. chosen {
  12. bootargs = "root=/dev/ram0";
  13. stdout-path = "serial0:115200n8";
  14. };
  15. memory@40000000 {
  16. device_type = "memory";
  17. reg = <0x40000000 0x20000000>;
  18. };
  19. amba-bus {
  20. dual_timer0: dual_timer@800000 {
  21. status = "ok";
  22. };
  23. uart0: serial@b00000 { /* console */
  24. pinctrl-names = "default", "sleep";
  25. pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>;
  26. pinctrl-1 = <&uart0_pmx_idle &uart0_cfg_idle>;
  27. status = "ok";
  28. };
  29. uart1: serial@b01000 { /* modem */
  30. pinctrl-names = "default", "sleep";
  31. pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func>;
  32. pinctrl-1 = <&uart1_pmx_idle &uart1_cfg_idle>;
  33. status = "ok";
  34. };
  35. uart2: serial@b02000 { /* audience */
  36. pinctrl-names = "default", "sleep";
  37. pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>;
  38. pinctrl-1 = <&uart2_pmx_idle &uart2_cfg_idle>;
  39. status = "ok";
  40. };
  41. uart3: serial@b03000 {
  42. pinctrl-names = "default", "sleep";
  43. pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>;
  44. pinctrl-1 = <&uart3_pmx_idle &uart3_cfg_idle>;
  45. status = "ok";
  46. };
  47. uart4: serial@b04000 {
  48. pinctrl-names = "default", "sleep";
  49. pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>;
  50. pinctrl-1 = <&uart4_pmx_idle &uart4_cfg_func>;
  51. status = "ok";
  52. };
  53. pmx0: pinmux@803000 {
  54. pinctrl-names = "default";
  55. pinctrl-0 = <&board_pmx_pins>;
  56. board_pmx_pins: board_pmx_pins {
  57. pinctrl-single,pins = <
  58. 0x008 0x0 /* GPIO -- eFUSE_DOUT */
  59. 0x100 0x0 /* USIM_CLK & USIM_DATA (IOMG63) */
  60. >;
  61. };
  62. uart0_pmx_func: uart0_pmx_func {
  63. pinctrl-single,pins = <
  64. 0x0f0 0x0
  65. 0x0f4 0x0 /* UART0_RX & UART0_TX */
  66. >;
  67. };
  68. uart0_pmx_idle: uart0_pmx_idle {
  69. pinctrl-single,pins = <
  70. /*0x0f0 0x1*/ /* UART0_CTS & UART0_RTS */
  71. 0x0f4 0x1 /* UART0_RX & UART0_TX */
  72. >;
  73. };
  74. uart1_pmx_func: uart1_pmx_func {
  75. pinctrl-single,pins = <
  76. 0x0f8 0x0 /* UART1_CTS & UART1_RTS (IOMG61) */
  77. 0x0fc 0x0 /* UART1_RX & UART1_TX (IOMG62) */
  78. >;
  79. };
  80. uart1_pmx_idle: uart1_pmx_idle {
  81. pinctrl-single,pins = <
  82. 0x0f8 0x1 /* GPIO (IOMG61) */
  83. 0x0fc 0x1 /* GPIO (IOMG62) */
  84. >;
  85. };
  86. uart2_pmx_func: uart2_pmx_func {
  87. pinctrl-single,pins = <
  88. 0x104 0x2 /* UART2_RXD (IOMG96) */
  89. 0x108 0x2 /* UART2_TXD (IOMG64) */
  90. >;
  91. };
  92. uart2_pmx_idle: uart2_pmx_idle {
  93. pinctrl-single,pins = <
  94. 0x104 0x1 /* GPIO (IOMG96) */
  95. 0x108 0x1 /* GPIO (IOMG64) */
  96. >;
  97. };
  98. uart3_pmx_func: uart3_pmx_func {
  99. pinctrl-single,pins = <
  100. 0x160 0x2 /* UART3_CTS & UART3_RTS (IOMG85) */
  101. 0x164 0x2 /* UART3_RXD & UART3_TXD (IOMG86) */
  102. >;
  103. };
  104. uart3_pmx_idle: uart3_pmx_idle {
  105. pinctrl-single,pins = <
  106. 0x160 0x1 /* GPIO (IOMG85) */
  107. 0x164 0x1 /* GPIO (IOMG86) */
  108. >;
  109. };
  110. uart4_pmx_func: uart4_pmx_func {
  111. pinctrl-single,pins = <
  112. 0x168 0x0 /* UART4_CTS & UART4_RTS (IOMG87) */
  113. 0x16c 0x0 /* UART4_RXD (IOMG88) */
  114. 0x170 0x0 /* UART4_TXD (IOMG93) */
  115. >;
  116. };
  117. uart4_pmx_idle: uart4_pmx_idle {
  118. pinctrl-single,pins = <
  119. 0x168 0x1 /* GPIO (IOMG87) */
  120. 0x16c 0x1 /* GPIO (IOMG88) */
  121. 0x170 0x1 /* GPIO (IOMG93) */
  122. >;
  123. };
  124. i2c0_pmx_func: i2c0_pmx_func {
  125. pinctrl-single,pins = <
  126. 0x0b4 0x0 /* I2C0_SCL & I2C0_SDA (IOMG45) */
  127. >;
  128. };
  129. i2c0_pmx_idle: i2c0_pmx_idle {
  130. pinctrl-single,pins = <
  131. 0x0b4 0x1 /* GPIO (IOMG45) */
  132. >;
  133. };
  134. i2c1_pmx_func: i2c1_pmx_func {
  135. pinctrl-single,pins = <
  136. 0x0b8 0x0 /* I2C1_SCL & I2C1_SDA (IOMG46) */
  137. >;
  138. };
  139. i2c1_pmx_idle: i2c1_pmx_idle {
  140. pinctrl-single,pins = <
  141. 0x0b8 0x1 /* GPIO (IOMG46) */
  142. >;
  143. };
  144. i2c2_pmx_func: i2c2_pmx_func {
  145. pinctrl-single,pins = <
  146. 0x068 0x0 /* I2C2_SCL (IOMG26) */
  147. 0x06c 0x0 /* I2C2_SDA (IOMG27) */
  148. >;
  149. };
  150. i2c2_pmx_idle: i2c2_pmx_idle {
  151. pinctrl-single,pins = <
  152. 0x068 0x1 /* GPIO (IOMG26) */
  153. 0x06c 0x1 /* GPIO (IOMG27) */
  154. >;
  155. };
  156. i2c3_pmx_func: i2c3_pmx_func {
  157. pinctrl-single,pins = <
  158. 0x050 0x2 /* I2C3_SCL (IOMG20) */
  159. 0x054 0x2 /* I2C3_SDA (IOMG21) */
  160. >;
  161. };
  162. i2c3_pmx_idle: i2c3_pmx_idle {
  163. pinctrl-single,pins = <
  164. 0x050 0x1 /* GPIO (IOMG20) */
  165. 0x054 0x1 /* GPIO (IOMG21) */
  166. >;
  167. };
  168. spi0_pmx_func: spi0_pmx_func {
  169. pinctrl-single,pins = <
  170. 0x0d4 0x0 /* SPI0_CLK/SPI0_DI/SPI0_DO (IOMG53) */
  171. 0x0d8 0x0 /* SPI0_CS0 (IOMG54) */
  172. 0x0dc 0x0 /* SPI0_CS1 (IOMG55) */
  173. 0x0e0 0x0 /* SPI0_CS2 (IOMG56) */
  174. 0x0e4 0x0 /* SPI0_CS3 (IOMG57) */
  175. >;
  176. };
  177. spi0_pmx_idle: spi0_pmx_idle {
  178. pinctrl-single,pins = <
  179. 0x0d4 0x1 /* GPIO (IOMG53) */
  180. 0x0d8 0x1 /* GPIO (IOMG54) */
  181. 0x0dc 0x1 /* GPIO (IOMG55) */
  182. 0x0e0 0x1 /* GPIO (IOMG56) */
  183. 0x0e4 0x1 /* GPIO (IOMG57) */
  184. >;
  185. };
  186. spi1_pmx_func: spi1_pmx_func {
  187. pinctrl-single,pins = <
  188. 0x184 0x0 /* SPI1_CLK/SPI1_DI (IOMG98) */
  189. 0x0e8 0x0 /* SPI1_DO (IOMG58) */
  190. 0x0ec 0x0 /* SPI1_CS (IOMG95) */
  191. >;
  192. };
  193. spi1_pmx_idle: spi1_pmx_idle {
  194. pinctrl-single,pins = <
  195. 0x184 0x1 /* GPIO (IOMG98) */
  196. 0x0e8 0x1 /* GPIO (IOMG58) */
  197. 0x0ec 0x1 /* GPIO (IOMG95) */
  198. >;
  199. };
  200. kpc_pmx_func: kpc_pmx_func {
  201. pinctrl-single,pins = <
  202. 0x12c 0x0 /* KEY_IN0 (IOMG73) */
  203. 0x130 0x0 /* KEY_IN1 (IOMG74) */
  204. 0x134 0x0 /* KEY_IN2 (IOMG75) */
  205. 0x10c 0x0 /* KEY_OUT0 (IOMG65) */
  206. 0x110 0x0 /* KEY_OUT1 (IOMG66) */
  207. 0x114 0x0 /* KEY_OUT2 (IOMG67) */
  208. >;
  209. };
  210. kpc_pmx_idle: kpc_pmx_idle {
  211. pinctrl-single,pins = <
  212. 0x12c 0x1 /* GPIO (IOMG73) */
  213. 0x130 0x1 /* GPIO (IOMG74) */
  214. 0x134 0x1 /* GPIO (IOMG75) */
  215. 0x10c 0x1 /* GPIO (IOMG65) */
  216. 0x110 0x1 /* GPIO (IOMG66) */
  217. 0x114 0x1 /* GPIO (IOMG67) */
  218. >;
  219. };
  220. gpio_key_func: gpio_key_func {
  221. pinctrl-single,pins = <
  222. 0x10c 0x1 /* KEY_OUT0/GPIO (IOMG65) */
  223. 0x130 0x1 /* KEY_IN1/GPIO (IOMG74) */
  224. >;
  225. };
  226. emmc_pmx_func: emmc_pmx_func {
  227. pinctrl-single,pins = <
  228. 0x030 0x2 /* eMMC_CMD/eMMC_CLK (IOMG12) */
  229. 0x018 0x0 /* NAND_CS3_N (IOMG6) */
  230. 0x024 0x0 /* NAND_BUSY2_N (IOMG8) */
  231. 0x028 0x0 /* NAND_BUSY3_N (IOMG9) */
  232. 0x02c 0x2 /* eMMC_DATA[0:7] (IOMG10) */
  233. >;
  234. };
  235. emmc_pmx_idle: emmc_pmx_idle {
  236. pinctrl-single,pins = <
  237. 0x030 0x0 /* GPIO (IOMG12) */
  238. 0x018 0x1 /* GPIO (IOMG6) */
  239. 0x024 0x1 /* GPIO (IOMG8) */
  240. 0x028 0x1 /* GPIO (IOMG9) */
  241. 0x02c 0x1 /* GPIO (IOMG10) */
  242. >;
  243. };
  244. sd_pmx_func: sd_pmx_func {
  245. pinctrl-single,pins = <
  246. 0x0bc 0x0 /* SD_CLK/SD_CMD/SD_DATA0/SD_DATA1/SD_DATA2 (IOMG47) */
  247. 0x0c0 0x0 /* SD_DATA3 (IOMG48) */
  248. >;
  249. };
  250. sd_pmx_idle: sd_pmx_idle {
  251. pinctrl-single,pins = <
  252. 0x0bc 0x1 /* GPIO (IOMG47) */
  253. 0x0c0 0x1 /* GPIO (IOMG48) */
  254. >;
  255. };
  256. nand_pmx_func: nand_pmx_func {
  257. pinctrl-single,pins = <
  258. 0x00c 0x0 /* NAND_ALE/NAND_CLE/.../NAND_DATA[0:7] (IOMG3) */
  259. 0x010 0x0 /* NAND_CS1_N (IOMG4) */
  260. 0x014 0x0 /* NAND_CS2_N (IOMG5) */
  261. 0x018 0x0 /* NAND_CS3_N (IOMG6) */
  262. 0x01c 0x0 /* NAND_BUSY0_N (IOMG94) */
  263. 0x020 0x0 /* NAND_BUSY1_N (IOMG7) */
  264. 0x024 0x0 /* NAND_BUSY2_N (IOMG8) */
  265. 0x028 0x0 /* NAND_BUSY3_N (IOMG9) */
  266. 0x02c 0x0 /* NAND_DATA[8:15] (IOMG10) */
  267. >;
  268. };
  269. nand_pmx_idle: nand_pmx_idle {
  270. pinctrl-single,pins = <
  271. 0x00c 0x1 /* GPIO (IOMG3) */
  272. 0x010 0x1 /* GPIO (IOMG4) */
  273. 0x014 0x1 /* GPIO (IOMG5) */
  274. 0x018 0x1 /* GPIO (IOMG6) */
  275. 0x01c 0x1 /* GPIO (IOMG94) */
  276. 0x020 0x1 /* GPIO (IOMG7) */
  277. 0x024 0x1 /* GPIO (IOMG8) */
  278. 0x028 0x1 /* GPIO (IOMG9) */
  279. 0x02c 0x1 /* GPIO (IOMG10) */
  280. >;
  281. };
  282. sdio_pmx_func: sdio_pmx_func {
  283. pinctrl-single,pins = <
  284. 0x0c4 0x0 /* SDIO_CLK/SDIO_CMD/SDIO_DATA[0:3] (IOMG49) */
  285. >;
  286. };
  287. sdio_pmx_idle: sdio_pmx_idle {
  288. pinctrl-single,pins = <
  289. 0x0c4 0x1 /* GPIO (IOMG49) */
  290. >;
  291. };
  292. audio_out_pmx_func: audio_out_pmx_func {
  293. pinctrl-single,pins = <
  294. 0x0f0 0x1 /* GPIO (IOMG59), audio spk & earphone */
  295. >;
  296. };
  297. };
  298. pmx1: pinmux@803800 {
  299. pinctrl-names = "default";
  300. pinctrl-0 = < &board_pu_pins &board_pd_pins &board_pd_ps_pins
  301. &board_np_pins &board_ps_pins &kpc_cfg_func
  302. &audio_out_cfg_func>;
  303. board_pu_pins: board_pu_pins {
  304. pinctrl-single,pins = <
  305. 0x014 0 /* GPIO_158 (IOCFG2) */
  306. 0x018 0 /* GPIO_159 (IOCFG3) */
  307. 0x01c 0 /* BOOT_MODE0 (IOCFG4) */
  308. 0x020 0 /* BOOT_MODE1 (IOCFG5) */
  309. >;
  310. pinctrl-single,bias-pulldown = <0 2 0 2>;
  311. pinctrl-single,bias-pullup = <1 1 0 1>;
  312. };
  313. board_pd_pins: board_pd_pins {
  314. pinctrl-single,pins = <
  315. 0x038 0 /* eFUSE_DOUT (IOCFG11) */
  316. 0x150 0 /* ISP_GPIO8 (IOCFG93) */
  317. 0x154 0 /* ISP_GPIO9 (IOCFG94) */
  318. >;
  319. pinctrl-single,bias-pulldown = <2 2 0 2>;
  320. pinctrl-single,bias-pullup = <0 1 0 1>;
  321. };
  322. board_pd_ps_pins: board_pd_ps_pins {
  323. pinctrl-single,pins = <
  324. 0x2d8 0 /* CLK_OUT0 (IOCFG190) */
  325. 0x004 0 /* PMU_SPI_DATA (IOCFG192) */
  326. >;
  327. pinctrl-single,bias-pulldown = <2 2 0 2>;
  328. pinctrl-single,bias-pullup = <0 1 0 1>;
  329. pinctrl-single,drive-strength = <0x30 0xf0>;
  330. };
  331. board_np_pins: board_np_pins {
  332. pinctrl-single,pins = <
  333. 0x24c 0 /* KEYPAD_OUT7 (IOCFG155) */
  334. >;
  335. pinctrl-single,bias-pulldown = <0 2 0 2>;
  336. pinctrl-single,bias-pullup = <0 1 0 1>;
  337. };
  338. board_ps_pins: board_ps_pins {
  339. pinctrl-single,pins = <
  340. 0x000 0 /* PMU_SPI_CLK (IOCFG191) */
  341. 0x008 0 /* PMU_SPI_CS_N (IOCFG193) */
  342. >;
  343. pinctrl-single,drive-strength = <0x30 0xf0>;
  344. };
  345. uart0_cfg_func: uart0_cfg_func {
  346. pinctrl-single,pins = <
  347. 0x208 0 /* UART0_RXD (IOCFG138) */
  348. 0x20c 0 /* UART0_TXD (IOCFG139) */
  349. >;
  350. pinctrl-single,bias-pulldown = <0 2 0 2>;
  351. pinctrl-single,bias-pullup = <0 1 0 1>;
  352. };
  353. uart0_cfg_idle: uart0_cfg_idle {
  354. pinctrl-single,pins = <
  355. 0x208 0 /* UART0_RXD (IOCFG138) */
  356. 0x20c 0 /* UART0_TXD (IOCFG139) */
  357. >;
  358. pinctrl-single,bias-pulldown = <2 2 0 2>;
  359. pinctrl-single,bias-pullup = <0 1 0 1>;
  360. };
  361. uart1_cfg_func: uart1_cfg_func {
  362. pinctrl-single,pins = <
  363. 0x210 0 /* UART1_CTS (IOCFG140) */
  364. 0x214 0 /* UART1_RTS (IOCFG141) */
  365. 0x218 0 /* UART1_RXD (IOCFG142) */
  366. 0x21c 0 /* UART1_TXD (IOCFG143) */
  367. >;
  368. pinctrl-single,bias-pulldown = <0 2 0 2>;
  369. pinctrl-single,bias-pullup = <0 1 0 1>;
  370. };
  371. uart1_cfg_idle: uart1_cfg_idle {
  372. pinctrl-single,pins = <
  373. 0x210 0 /* UART1_CTS (IOCFG140) */
  374. 0x214 0 /* UART1_RTS (IOCFG141) */
  375. 0x218 0 /* UART1_RXD (IOCFG142) */
  376. 0x21c 0 /* UART1_TXD (IOCFG143) */
  377. >;
  378. pinctrl-single,bias-pulldown = <2 2 0 2>;
  379. pinctrl-single,bias-pullup = <0 1 0 1>;
  380. };
  381. uart2_cfg_func: uart2_cfg_func {
  382. pinctrl-single,pins = <
  383. 0x220 0 /* UART2_CTS (IOCFG144) */
  384. 0x224 0 /* UART2_RTS (IOCFG145) */
  385. 0x228 0 /* UART2_RXD (IOCFG146) */
  386. 0x22c 0 /* UART2_TXD (IOCFG147) */
  387. >;
  388. pinctrl-single,bias-pulldown = <0 2 0 2>;
  389. pinctrl-single,bias-pullup = <0 1 0 1>;
  390. };
  391. uart2_cfg_idle: uart2_cfg_idle {
  392. pinctrl-single,pins = <
  393. 0x220 0 /* GPIO (IOCFG144) */
  394. 0x224 0 /* GPIO (IOCFG145) */
  395. 0x228 0 /* GPIO (IOCFG146) */
  396. 0x22c 0 /* GPIO (IOCFG147) */
  397. >;
  398. pinctrl-single,bias-pulldown = <2 2 0 2>;
  399. pinctrl-single,bias-pullup = <0 1 0 1>;
  400. };
  401. uart3_cfg_func: uart3_cfg_func {
  402. pinctrl-single,pins = <
  403. 0x294 0 /* UART3_CTS (IOCFG173) */
  404. 0x298 0 /* UART3_RTS (IOCFG174) */
  405. 0x29c 0 /* UART3_RXD (IOCFG175) */
  406. 0x2a0 0 /* UART3_TXD (IOCFG176) */
  407. >;
  408. pinctrl-single,bias-pulldown = <0 2 0 2>;
  409. pinctrl-single,bias-pullup = <0 1 0 1>;
  410. };
  411. uart3_cfg_idle: uart3_cfg_idle {
  412. pinctrl-single,pins = <
  413. 0x294 0 /* UART3_CTS (IOCFG173) */
  414. 0x298 0 /* UART3_RTS (IOCFG174) */
  415. 0x29c 0 /* UART3_RXD (IOCFG175) */
  416. 0x2a0 0 /* UART3_TXD (IOCFG176) */
  417. >;
  418. pinctrl-single,bias-pulldown = <2 2 0 2>;
  419. pinctrl-single,bias-pullup = <0 1 0 1>;
  420. };
  421. uart4_cfg_func: uart4_cfg_func {
  422. pinctrl-single,pins = <
  423. 0x2a4 0 /* UART4_CTS (IOCFG177) */
  424. 0x2a8 0 /* UART4_RTS (IOCFG178) */
  425. 0x2ac 0 /* UART4_RXD (IOCFG179) */
  426. 0x2b0 0 /* UART4_TXD (IOCFG180) */
  427. >;
  428. pinctrl-single,bias-pulldown = <0 2 0 2>;
  429. pinctrl-single,bias-pullup = <0 1 0 1>;
  430. };
  431. i2c0_cfg_func: i2c0_cfg_func {
  432. pinctrl-single,pins = <
  433. 0x17c 0 /* I2C0_SCL (IOCFG103) */
  434. 0x180 0 /* I2C0_SDA (IOCFG104) */
  435. >;
  436. pinctrl-single,bias-pulldown = <0 2 0 2>;
  437. pinctrl-single,bias-pullup = <0 1 0 1>;
  438. pinctrl-single,drive-strength = <0x30 0xf0>;
  439. };
  440. i2c1_cfg_func: i2c1_cfg_func {
  441. pinctrl-single,pins = <
  442. 0x184 0 /* I2C1_SCL (IOCFG105) */
  443. 0x188 0 /* I2C1_SDA (IOCFG106) */
  444. >;
  445. pinctrl-single,bias-pulldown = <0 2 0 2>;
  446. pinctrl-single,bias-pullup = <0 1 0 1>;
  447. pinctrl-single,drive-strength = <0x30 0xf0>;
  448. };
  449. i2c2_cfg_func: i2c2_cfg_func {
  450. pinctrl-single,pins = <
  451. 0x118 0 /* I2C2_SCL (IOCFG79) */
  452. 0x11c 0 /* I2C2_SDA (IOCFG80) */
  453. >;
  454. pinctrl-single,bias-pulldown = <0 2 0 2>;
  455. pinctrl-single,bias-pullup = <0 1 0 1>;
  456. pinctrl-single,drive-strength = <0x30 0xf0>;
  457. };
  458. i2c3_cfg_func: i2c3_cfg_func {
  459. pinctrl-single,pins = <
  460. 0x100 0 /* I2C3_SCL (IOCFG73) */
  461. 0x104 0 /* I2C3_SDA (IOCFG74) */
  462. >;
  463. pinctrl-single,bias-pulldown = <0 2 0 2>;
  464. pinctrl-single,bias-pullup = <0 1 0 1>;
  465. pinctrl-single,drive-strength = <0x30 0xf0>;
  466. };
  467. spi0_cfg_func1: spi0_cfg_func1 {
  468. pinctrl-single,pins = <
  469. 0x1d4 0 /* SPI0_CLK (IOCFG125) */
  470. 0x1d8 0 /* SPI0_DI (IOCFG126) */
  471. 0x1dc 0 /* SPI0_DO (IOCFG127) */
  472. >;
  473. pinctrl-single,bias-pulldown = <2 2 0 2>;
  474. pinctrl-single,bias-pullup = <0 1 0 1>;
  475. pinctrl-single,drive-strength = <0x30 0xf0>;
  476. };
  477. spi0_cfg_func2: spi0_cfg_func2 {
  478. pinctrl-single,pins = <
  479. 0x1e0 0 /* SPI0_CS0 (IOCFG128) */
  480. 0x1e4 0 /* SPI0_CS1 (IOCFG129) */
  481. 0x1e8 0 /* SPI0_CS2 (IOCFG130 */
  482. 0x1ec 0 /* SPI0_CS3 (IOCFG131) */
  483. >;
  484. pinctrl-single,bias-pulldown = <0 2 0 2>;
  485. pinctrl-single,bias-pullup = <1 1 0 1>;
  486. pinctrl-single,drive-strength = <0x30 0xf0>;
  487. };
  488. spi1_cfg_func1: spi1_cfg_func1 {
  489. pinctrl-single,pins = <
  490. 0x1f0 0 /* SPI1_CLK (IOCFG132) */
  491. 0x1f4 0 /* SPI1_DI (IOCFG133) */
  492. 0x1f8 0 /* SPI1_DO (IOCFG134) */
  493. >;
  494. pinctrl-single,bias-pulldown = <2 2 0 2>;
  495. pinctrl-single,bias-pullup = <0 1 0 1>;
  496. pinctrl-single,drive-strength = <0x30 0xf0>;
  497. };
  498. spi1_cfg_func2: spi1_cfg_func2 {
  499. pinctrl-single,pins = <
  500. 0x1fc 0 /* SPI1_CS (IOCFG135) */
  501. >;
  502. pinctrl-single,bias-pulldown = <0 2 0 2>;
  503. pinctrl-single,bias-pullup = <1 1 0 1>;
  504. pinctrl-single,drive-strength = <0x30 0xf0>;
  505. };
  506. kpc_cfg_func: kpc_cfg_func {
  507. pinctrl-single,pins = <
  508. 0x250 0 /* KEY_IN0 (IOCFG156) */
  509. 0x254 0 /* KEY_IN1 (IOCFG157) */
  510. 0x258 0 /* KEY_IN2 (IOCFG158) */
  511. 0x230 0 /* KEY_OUT0 (IOCFG148) */
  512. 0x234 0 /* KEY_OUT1 (IOCFG149) */
  513. 0x238 0 /* KEY_OUT2 (IOCFG150) */
  514. >;
  515. pinctrl-single,bias-pulldown = <2 2 0 2>;
  516. pinctrl-single,bias-pullup = <0 1 0 1>;
  517. };
  518. emmc_cfg_func: emmc_cfg_func {
  519. pinctrl-single,pins = <
  520. 0x0ac 0 /* eMMC_CMD (IOCFG40) */
  521. 0x0b0 0 /* eMMC_CLK (IOCFG41) */
  522. 0x058 0 /* NAND_CS3_N (IOCFG19) */
  523. 0x064 0 /* NAND_BUSY2_N (IOCFG22) */
  524. 0x068 0 /* NAND_BUSY3_N (IOCFG23) */
  525. 0x08c 0 /* NAND_DATA8 (IOCFG32) */
  526. 0x090 0 /* NAND_DATA9 (IOCFG33) */
  527. 0x094 0 /* NAND_DATA10 (IOCFG34) */
  528. 0x098 0 /* NAND_DATA11 (IOCFG35) */
  529. 0x09c 0 /* NAND_DATA12 (IOCFG36) */
  530. 0x0a0 0 /* NAND_DATA13 (IOCFG37) */
  531. 0x0a4 0 /* NAND_DATA14 (IOCFG38) */
  532. 0x0a8 0 /* NAND_DATA15 (IOCFG39) */
  533. >;
  534. pinctrl-single,bias-pulldown = <0 2 0 2>;
  535. pinctrl-single,bias-pullup = <1 1 0 1>;
  536. pinctrl-single,drive-strength = <0x30 0xf0>;
  537. };
  538. sd_cfg_func1: sd_cfg_func1 {
  539. pinctrl-single,pins = <
  540. 0x18c 0 /* SD_CLK (IOCFG107) */
  541. 0x190 0 /* SD_CMD (IOCFG108) */
  542. >;
  543. pinctrl-single,bias-pulldown = <2 2 0 2>;
  544. pinctrl-single,bias-pullup = <0 1 0 1>;
  545. pinctrl-single,drive-strength = <0x30 0xf0>;
  546. };
  547. sd_cfg_func2: sd_cfg_func2 {
  548. pinctrl-single,pins = <
  549. 0x194 0 /* SD_DATA0 (IOCFG109) */
  550. 0x198 0 /* SD_DATA1 (IOCFG110) */
  551. 0x19c 0 /* SD_DATA2 (IOCFG111) */
  552. 0x1a0 0 /* SD_DATA3 (IOCFG112) */
  553. >;
  554. pinctrl-single,bias-pulldown = <2 2 0 2>;
  555. pinctrl-single,bias-pullup = <0 1 0 1>;
  556. pinctrl-single,drive-strength = <0x70 0xf0>;
  557. };
  558. nand_cfg_func1: nand_cfg_func1 {
  559. pinctrl-single,pins = <
  560. 0x03c 0 /* NAND_ALE (IOCFG12) */
  561. 0x040 0 /* NAND_CLE (IOCFG13) */
  562. 0x06c 0 /* NAND_DATA0 (IOCFG24) */
  563. 0x070 0 /* NAND_DATA1 (IOCFG25) */
  564. 0x074 0 /* NAND_DATA2 (IOCFG26) */
  565. 0x078 0 /* NAND_DATA3 (IOCFG27) */
  566. 0x07c 0 /* NAND_DATA4 (IOCFG28) */
  567. 0x080 0 /* NAND_DATA5 (IOCFG29) */
  568. 0x084 0 /* NAND_DATA6 (IOCFG30) */
  569. 0x088 0 /* NAND_DATA7 (IOCFG31) */
  570. 0x08c 0 /* NAND_DATA8 (IOCFG32) */
  571. 0x090 0 /* NAND_DATA9 (IOCFG33) */
  572. 0x094 0 /* NAND_DATA10 (IOCFG34) */
  573. 0x098 0 /* NAND_DATA11 (IOCFG35) */
  574. 0x09c 0 /* NAND_DATA12 (IOCFG36) */
  575. 0x0a0 0 /* NAND_DATA13 (IOCFG37) */
  576. 0x0a4 0 /* NAND_DATA14 (IOCFG38) */
  577. 0x0a8 0 /* NAND_DATA15 (IOCFG39) */
  578. >;
  579. pinctrl-single,bias-pulldown = <2 2 0 2>;
  580. pinctrl-single,bias-pullup = <0 1 0 1>;
  581. pinctrl-single,drive-strength = <0x30 0xf0>;
  582. };
  583. nand_cfg_func2: nand_cfg_func2 {
  584. pinctrl-single,pins = <
  585. 0x044 0 /* NAND_RE_N (IOCFG14) */
  586. 0x048 0 /* NAND_WE_N (IOCFG15) */
  587. 0x04c 0 /* NAND_CS0_N (IOCFG16) */
  588. 0x050 0 /* NAND_CS1_N (IOCFG17) */
  589. 0x054 0 /* NAND_CS2_N (IOCFG18) */
  590. 0x058 0 /* NAND_CS3_N (IOCFG19) */
  591. 0x05c 0 /* NAND_BUSY0_N (IOCFG20) */
  592. 0x060 0 /* NAND_BUSY1_N (IOCFG21) */
  593. 0x064 0 /* NAND_BUSY2_N (IOCFG22) */
  594. 0x068 0 /* NAND_BUSY3_N (IOCFG23) */
  595. >;
  596. pinctrl-single,bias-pulldown = <0 2 0 2>;
  597. pinctrl-single,bias-pullup = <1 1 0 1>;
  598. pinctrl-single,drive-strength = <0x30 0xf0>;
  599. };
  600. sdio_cfg_func: sdio_cfg_func {
  601. pinctrl-single,pins = <
  602. 0x1a4 0 /* SDIO0_CLK (IOCG113) */
  603. 0x1a8 0 /* SDIO0_CMD (IOCG114) */
  604. 0x1ac 0 /* SDIO0_DATA0 (IOCG115) */
  605. 0x1b0 0 /* SDIO0_DATA1 (IOCG116) */
  606. 0x1b4 0 /* SDIO0_DATA2 (IOCG117) */
  607. 0x1b8 0 /* SDIO0_DATA3 (IOCG118) */
  608. >;
  609. pinctrl-single,bias-pulldown = <2 2 0 2>;
  610. pinctrl-single,bias-pullup = <0 1 0 1>;
  611. pinctrl-single,drive-strength = <0x30 0xf0>;
  612. };
  613. audio_out_cfg_func: audio_out_cfg_func {
  614. pinctrl-single,pins = <
  615. 0x200 0 /* GPIO (IOCFG136) */
  616. 0x204 0 /* GPIO (IOCFG137) */
  617. >;
  618. pinctrl-single,bias-pulldown = <2 2 0 2>;
  619. pinctrl-single,bias-pullup = <0 1 0 1>;
  620. };
  621. };
  622. };
  623. gpio-keys {
  624. compatible = "gpio-keys";
  625. call {
  626. label = "call";
  627. gpios = <&gpio17 2 0>;
  628. linux,code = <169>; /* KEY_PHONE */
  629. };
  630. };
  631. };