exynos4412-tiny4412.dts 2.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * FriendlyARM's Exynos4412 based TINY4412 board device tree source
  4. *
  5. * Copyright (c) 2013 Alex Ling <[email protected]>
  6. *
  7. * Device tree source file for FriendlyARM's TINY4412 board which is based on
  8. * Samsung's Exynos4412 SoC.
  9. */
  10. /dts-v1/;
  11. #include "exynos4412.dtsi"
  12. #include <dt-bindings/gpio/gpio.h>
  13. #include <dt-bindings/leds/common.h>
  14. / {
  15. model = "FriendlyARM TINY4412 board based on Exynos4412";
  16. compatible = "friendlyarm,tiny4412", "samsung,exynos4412", "samsung,exynos4";
  17. chosen {
  18. stdout-path = &serial_0;
  19. };
  20. memory@40000000 {
  21. device_type = "memory";
  22. reg = <0x40000000 0x40000000>;
  23. };
  24. leds {
  25. compatible = "gpio-leds";
  26. led1 {
  27. label = "led1";
  28. function = LED_FUNCTION_HEARTBEAT;
  29. gpios = <&gpm4 0 GPIO_ACTIVE_LOW>;
  30. default-state = "off";
  31. linux,default-trigger = "heartbeat";
  32. };
  33. led2 {
  34. label = "led2";
  35. gpios = <&gpm4 1 GPIO_ACTIVE_LOW>;
  36. default-state = "off";
  37. };
  38. led3 {
  39. label = "led3";
  40. gpios = <&gpm4 2 GPIO_ACTIVE_LOW>;
  41. default-state = "off";
  42. };
  43. led4 {
  44. label = "led4";
  45. function = LED_FUNCTION_DISK_ACTIVITY;
  46. gpios = <&gpm4 3 GPIO_ACTIVE_LOW>;
  47. default-state = "off";
  48. linux,default-trigger = "mmc0";
  49. };
  50. };
  51. fixed-rate-clocks {
  52. xxti {
  53. compatible = "samsung,clock-xxti";
  54. clock-frequency = <0>;
  55. };
  56. xusbxti {
  57. compatible = "samsung,clock-xusbxti";
  58. clock-frequency = <24000000>;
  59. };
  60. pmic_ap_clk: pmic-ap-clk {
  61. /* Workaround for missing clock on PMIC */
  62. compatible = "fixed-clock";
  63. #clock-cells = <0>;
  64. clock-frequency = <32768>;
  65. };
  66. };
  67. panel {
  68. compatible = "innolux,at070tn92";
  69. port {
  70. panel_input: endpoint {
  71. remote-endpoint = <&lcdc_output>;
  72. };
  73. };
  74. };
  75. };
  76. &cpu_thermal {
  77. cooling-maps {
  78. cooling_map0: map0 {
  79. /* Corresponds to 800MHz at freq_table */
  80. cooling-device = <&cpu0 7 7>, <&cpu1 7 7>,
  81. <&cpu2 7 7>, <&cpu3 7 7>;
  82. };
  83. cooling_map1: map1 {
  84. /* Corresponds to 200MHz at freq_table */
  85. cooling-device = <&cpu0 13 13>, <&cpu1 13 13>,
  86. <&cpu2 13 13>, <&cpu3 13 13>;
  87. };
  88. };
  89. };
  90. &fimd {
  91. pinctrl-0 = <&lcd_clk>, <&lcd_data24>;
  92. pinctrl-names = "default";
  93. #address-cells = <1>;
  94. #size-cells = <0>;
  95. status = "okay";
  96. port@3 {
  97. reg = <3>;
  98. lcdc_output: endpoint {
  99. remote-endpoint = <&panel_input>;
  100. };
  101. };
  102. };
  103. &rtc {
  104. status = "okay";
  105. clocks = <&clock CLK_RTC>, <&pmic_ap_clk>;
  106. clock-names = "rtc", "rtc_src";
  107. };
  108. &sdhci_2 {
  109. bus-width = <4>;
  110. pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
  111. pinctrl-names = "default";
  112. status = "okay";
  113. };
  114. &serial_0 {
  115. status = "okay";
  116. };
  117. &serial_1 {
  118. status = "okay";
  119. };
  120. &serial_2 {
  121. status = "okay";
  122. };
  123. &serial_3 {
  124. status = "okay";
  125. };