exynos4412-odroid-common.dtsi 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Common definition for Hardkernel's Exynos4412 based ODROID-X/X2/U2/U3 boards
  4. * device tree source
  5. */
  6. #include <dt-bindings/sound/samsung-i2s.h>
  7. #include <dt-bindings/input/input.h>
  8. #include <dt-bindings/clock/maxim,max77686.h>
  9. #include "exynos4412.dtsi"
  10. #include "exynos4412-ppmu-common.dtsi"
  11. #include <dt-bindings/gpio/gpio.h>
  12. #include "exynos-mfc-reserved-memory.dtsi"
  13. / {
  14. chosen {
  15. stdout-path = &serial_1;
  16. };
  17. firmware@204f000 {
  18. compatible = "samsung,secure-firmware";
  19. reg = <0x0204F000 0x1000>;
  20. };
  21. gpio_keys: gpio-keys {
  22. compatible = "gpio-keys";
  23. pinctrl-names = "default";
  24. pinctrl-0 = <&gpio_power_key>;
  25. power-key {
  26. gpios = <&gpx1 3 GPIO_ACTIVE_LOW>;
  27. linux,code = <KEY_POWER>;
  28. label = "power key";
  29. debounce-interval = <10>;
  30. wakeup-source;
  31. };
  32. };
  33. sound: sound {
  34. compatible = "hardkernel,odroid-xu4-audio";
  35. cpu {
  36. sound-dai = <&i2s0 0>;
  37. };
  38. codec {
  39. sound-dai = <&hdmi>, <&max98090>;
  40. };
  41. };
  42. emmc_pwrseq: pwrseq {
  43. pinctrl-0 = <&emmc_rstn>;
  44. pinctrl-names = "default";
  45. compatible = "mmc-pwrseq-emmc";
  46. reset-gpios = <&gpk1 2 GPIO_ACTIVE_LOW>;
  47. };
  48. fixed-rate-clocks {
  49. xxti {
  50. compatible = "samsung,clock-xxti";
  51. clock-frequency = <0>;
  52. };
  53. xusbxti {
  54. compatible = "samsung,clock-xusbxti";
  55. clock-frequency = <24000000>;
  56. };
  57. };
  58. };
  59. &bus_dmc {
  60. devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
  61. vdd-supply = <&buck1_reg>;
  62. status = "okay";
  63. };
  64. &bus_acp {
  65. devfreq = <&bus_dmc>;
  66. status = "okay";
  67. };
  68. &bus_c2c {
  69. devfreq = <&bus_dmc>;
  70. status = "okay";
  71. };
  72. &bus_leftbus {
  73. devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
  74. vdd-supply = <&buck3_reg>;
  75. status = "okay";
  76. };
  77. &bus_rightbus {
  78. devfreq = <&bus_leftbus>;
  79. status = "okay";
  80. };
  81. &bus_display {
  82. devfreq = <&bus_leftbus>;
  83. status = "okay";
  84. };
  85. &bus_fsys {
  86. devfreq = <&bus_leftbus>;
  87. status = "okay";
  88. };
  89. &bus_peri {
  90. devfreq = <&bus_leftbus>;
  91. status = "okay";
  92. };
  93. &bus_mfc {
  94. devfreq = <&bus_leftbus>;
  95. status = "okay";
  96. };
  97. &camera {
  98. status = "okay";
  99. pinctrl-names = "default";
  100. pinctrl-0 = <>;
  101. };
  102. &clock {
  103. clocks = <&clock CLK_XUSBXTI>;
  104. assigned-clocks = <&clock CLK_FOUT_EPLL>;
  105. assigned-clock-rates = <45158401>;
  106. };
  107. &clock_audss {
  108. assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
  109. <&clock_audss EXYNOS_MOUT_I2S>,
  110. <&clock_audss EXYNOS_DOUT_SRP>,
  111. <&clock_audss EXYNOS_DOUT_AUD_BUS>,
  112. <&clock_audss EXYNOS_DOUT_I2S>;
  113. assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
  114. <&clock_audss EXYNOS_MOUT_AUDSS>;
  115. assigned-clock-rates = <0>, <0>,
  116. <196608001>,
  117. <(196608001 / 2)>,
  118. <(196608001 / 8)>;
  119. };
  120. &cpu0 {
  121. cpu0-supply = <&buck2_reg>;
  122. };
  123. &cpu0_opp_table {
  124. opp-1000000000 {
  125. opp-suspend;
  126. };
  127. opp-800000000 {
  128. /delete-property/opp-suspend;
  129. };
  130. };
  131. &cpu_thermal {
  132. cooling-maps {
  133. cooling_map0: map0 {
  134. /* Corresponds to 800MHz at freq_table */
  135. cooling-device = <&cpu0 7 7>, <&cpu1 7 7>,
  136. <&cpu2 7 7>, <&cpu3 7 7>;
  137. };
  138. cooling_map1: map1 {
  139. /* Corresponds to 200MHz at freq_table */
  140. cooling-device = <&cpu0 13 13>, <&cpu1 13 13>,
  141. <&cpu2 13 13>, <&cpu3 13 13>;
  142. };
  143. };
  144. };
  145. &pinctrl_1 {
  146. gpio_power_key: power-key-pins {
  147. samsung,pins = "gpx1-3";
  148. samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
  149. };
  150. max77686_irq: max77686-irq-pins {
  151. samsung,pins = "gpx3-2";
  152. samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
  153. samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
  154. samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
  155. };
  156. hdmi_hpd: hdmi-hpd-pins {
  157. samsung,pins = "gpx3-7";
  158. samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
  159. };
  160. emmc_rstn: emmc-rstn-pins {
  161. samsung,pins = "gpk1-2";
  162. samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
  163. };
  164. };
  165. &ehci {
  166. status = "okay";
  167. };
  168. &exynos_usbphy {
  169. status = "okay";
  170. };
  171. &fimc_0 {
  172. status = "okay";
  173. assigned-clocks = <&clock CLK_MOUT_FIMC0>,
  174. <&clock CLK_SCLK_FIMC0>;
  175. assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
  176. assigned-clock-rates = <0>, <176000000>;
  177. };
  178. &fimc_1 {
  179. status = "okay";
  180. assigned-clocks = <&clock CLK_MOUT_FIMC1>,
  181. <&clock CLK_SCLK_FIMC1>;
  182. assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
  183. assigned-clock-rates = <0>, <176000000>;
  184. };
  185. &fimc_2 {
  186. status = "okay";
  187. assigned-clocks = <&clock CLK_MOUT_FIMC2>,
  188. <&clock CLK_SCLK_FIMC2>;
  189. assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
  190. assigned-clock-rates = <0>, <176000000>;
  191. };
  192. &fimc_3 {
  193. status = "okay";
  194. assigned-clocks = <&clock CLK_MOUT_FIMC3>,
  195. <&clock CLK_SCLK_FIMC3>;
  196. assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
  197. assigned-clock-rates = <0>, <176000000>;
  198. };
  199. &gpu {
  200. mali-supply = <&buck4_reg>;
  201. status = "okay";
  202. };
  203. &hdmi {
  204. hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
  205. pinctrl-names = "default";
  206. pinctrl-0 = <&hdmi_hpd>;
  207. vdd-supply = <&ldo8_reg>;
  208. vdd_osc-supply = <&ldo10_reg>;
  209. vdd_pll-supply = <&ldo8_reg>;
  210. ddc = <&i2c_2>;
  211. status = "okay";
  212. };
  213. &hdmicec {
  214. status = "okay";
  215. };
  216. &hsotg {
  217. status = "okay";
  218. vusb_d-supply = <&ldo15_reg>;
  219. vusb_a-supply = <&ldo12_reg>;
  220. };
  221. &i2c_0 {
  222. samsung,i2c-sda-delay = <100>;
  223. samsung,i2c-max-bus-freq = <400000>;
  224. status = "okay";
  225. usb3503: usb-hub@8 {
  226. compatible = "smsc,usb3503";
  227. reg = <0x08>;
  228. intn-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
  229. connect-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
  230. reset-gpios = <&gpx3 5 GPIO_ACTIVE_LOW>;
  231. initial-mode = <1>;
  232. };
  233. max77686: pmic@9 {
  234. compatible = "maxim,max77686";
  235. interrupt-parent = <&gpx3>;
  236. interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
  237. pinctrl-names = "default";
  238. pinctrl-0 = <&max77686_irq>;
  239. wakeup-source;
  240. reg = <0x09>;
  241. #clock-cells = <1>;
  242. voltage-regulators {
  243. ldo1_reg: LDO1 {
  244. regulator-name = "VDD_ALIVE_1.0V";
  245. regulator-min-microvolt = <1000000>;
  246. regulator-max-microvolt = <1000000>;
  247. regulator-always-on;
  248. };
  249. ldo2_reg: LDO2 {
  250. regulator-name = "VDDQ_M1_2_1.8V";
  251. regulator-min-microvolt = <1800000>;
  252. regulator-max-microvolt = <1800000>;
  253. regulator-always-on;
  254. };
  255. ldo3_reg: LDO3 {
  256. regulator-name = "VDDQ_EXT_1.8V";
  257. regulator-min-microvolt = <1800000>;
  258. regulator-max-microvolt = <1800000>;
  259. regulator-always-on;
  260. };
  261. ldo4_reg: LDO4 {
  262. regulator-name = "VDDQ_MMC2_2.8V";
  263. regulator-min-microvolt = <2800000>;
  264. regulator-max-microvolt = <2800000>;
  265. regulator-boot-on;
  266. };
  267. ldo5_reg: LDO5 {
  268. regulator-name = "VDDQ_MMC1_3_1.8V";
  269. regulator-min-microvolt = <1800000>;
  270. regulator-max-microvolt = <1800000>;
  271. regulator-always-on;
  272. regulator-boot-on;
  273. };
  274. ldo6_reg: LDO6 {
  275. regulator-name = "VDD10_MPLL_1.0V";
  276. regulator-min-microvolt = <1000000>;
  277. regulator-max-microvolt = <1000000>;
  278. regulator-always-on;
  279. };
  280. ldo7_reg: LDO7 {
  281. regulator-name = "VDD10_XPLL_1.0V";
  282. regulator-min-microvolt = <1000000>;
  283. regulator-max-microvolt = <1000000>;
  284. regulator-always-on;
  285. };
  286. ldo8_reg: LDO8 {
  287. regulator-name = "VDD10_HDMI_1.0V";
  288. regulator-min-microvolt = <1000000>;
  289. regulator-max-microvolt = <1000000>;
  290. };
  291. ldo10_reg: LDO10 {
  292. regulator-name = "VDDQ_MIPIHSI_1.8V";
  293. regulator-min-microvolt = <1800000>;
  294. regulator-max-microvolt = <1800000>;
  295. };
  296. ldo11_reg: LDO11 {
  297. regulator-name = "VDD18_ABB1_1.8V";
  298. regulator-min-microvolt = <1800000>;
  299. regulator-max-microvolt = <1800000>;
  300. regulator-always-on;
  301. };
  302. ldo12_reg: LDO12 {
  303. regulator-name = "VDD33_USB_3.3V";
  304. regulator-min-microvolt = <3300000>;
  305. regulator-max-microvolt = <3300000>;
  306. regulator-always-on;
  307. regulator-boot-on;
  308. };
  309. ldo13_reg: LDO13 {
  310. regulator-name = "VDDQ_C2C_W_1.8V";
  311. regulator-min-microvolt = <1800000>;
  312. regulator-max-microvolt = <1800000>;
  313. regulator-always-on;
  314. regulator-boot-on;
  315. };
  316. ldo14_reg: LDO14 {
  317. regulator-name = "VDD18_ABB0_2_1.8V";
  318. regulator-min-microvolt = <1800000>;
  319. regulator-max-microvolt = <1800000>;
  320. regulator-always-on;
  321. regulator-boot-on;
  322. };
  323. ldo15_reg: LDO15 {
  324. regulator-name = "VDD10_HSIC_1.0V";
  325. regulator-min-microvolt = <1000000>;
  326. regulator-max-microvolt = <1000000>;
  327. regulator-always-on;
  328. regulator-boot-on;
  329. };
  330. ldo16_reg: LDO16 {
  331. regulator-name = "VDD18_HSIC_1.8V";
  332. regulator-min-microvolt = <1800000>;
  333. regulator-max-microvolt = <1800000>;
  334. regulator-always-on;
  335. regulator-boot-on;
  336. };
  337. ldo20_reg: LDO20 {
  338. regulator-name = "LDO20_1.8V";
  339. regulator-min-microvolt = <1800000>;
  340. regulator-max-microvolt = <1800000>;
  341. };
  342. ldo21_reg: LDO21 {
  343. regulator-name = "TFLASH_2.8V";
  344. regulator-min-microvolt = <2800000>;
  345. regulator-max-microvolt = <2800000>;
  346. regulator-boot-on;
  347. };
  348. ldo22_reg: LDO22 {
  349. /*
  350. * Only U3 uses it, so let it define the
  351. * constraints
  352. */
  353. regulator-name = "LDO22";
  354. regulator-boot-on;
  355. };
  356. ldo25_reg: LDO25 {
  357. regulator-name = "VDDQ_LCD_1.8V";
  358. regulator-min-microvolt = <1800000>;
  359. regulator-max-microvolt = <1800000>;
  360. regulator-always-on;
  361. regulator-boot-on;
  362. };
  363. buck1_reg: BUCK1 {
  364. regulator-name = "VDD_MIF";
  365. regulator-min-microvolt = <900000>;
  366. regulator-max-microvolt = <1100000>;
  367. regulator-always-on;
  368. regulator-boot-on;
  369. };
  370. buck2_reg: BUCK2 {
  371. regulator-name = "VDD_ARM";
  372. regulator-min-microvolt = <900000>;
  373. regulator-max-microvolt = <1350000>;
  374. regulator-always-on;
  375. regulator-boot-on;
  376. };
  377. buck3_reg: BUCK3 {
  378. regulator-name = "VDD_INT";
  379. regulator-min-microvolt = <900000>;
  380. regulator-max-microvolt = <1050000>;
  381. regulator-always-on;
  382. regulator-boot-on;
  383. };
  384. buck4_reg: BUCK4 {
  385. regulator-name = "VDD_G3D";
  386. regulator-min-microvolt = <900000>;
  387. regulator-max-microvolt = <1100000>;
  388. regulator-microvolt-offset = <50000>;
  389. };
  390. buck5_reg: BUCK5 {
  391. regulator-name = "VDDQ_CKEM1_2_1.2V";
  392. regulator-min-microvolt = <1200000>;
  393. regulator-max-microvolt = <1200000>;
  394. regulator-always-on;
  395. regulator-boot-on;
  396. };
  397. buck6_reg: BUCK6 {
  398. regulator-name = "BUCK6_1.35V";
  399. regulator-min-microvolt = <1350000>;
  400. regulator-max-microvolt = <1350000>;
  401. regulator-always-on;
  402. regulator-boot-on;
  403. };
  404. buck7_reg: BUCK7 {
  405. regulator-name = "BUCK7_2.0V";
  406. regulator-min-microvolt = <2000000>;
  407. regulator-max-microvolt = <2000000>;
  408. regulator-always-on;
  409. };
  410. buck8_reg: BUCK8 {
  411. /*
  412. * Constraints set by specific board: X,
  413. * X2 and U3.
  414. */
  415. regulator-name = "BUCK8_2.8V";
  416. };
  417. };
  418. };
  419. };
  420. &i2c_1 {
  421. status = "okay";
  422. max98090: audio-codec@10 {
  423. compatible = "maxim,max98090";
  424. reg = <0x10>;
  425. interrupt-parent = <&gpx0>;
  426. interrupts = <0 IRQ_TYPE_NONE>;
  427. clocks = <&i2s0 CLK_I2S_CDCLK>;
  428. clock-names = "mclk";
  429. #sound-dai-cells = <0>;
  430. };
  431. };
  432. &i2c_2 {
  433. status = "okay";
  434. };
  435. &i2c_8 {
  436. status = "okay";
  437. };
  438. &i2s0 {
  439. pinctrl-0 = <&i2s0_bus>;
  440. pinctrl-names = "default";
  441. status = "okay";
  442. assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>;
  443. assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;
  444. };
  445. &mixer {
  446. status = "okay";
  447. };
  448. &mshc_0 {
  449. pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
  450. pinctrl-names = "default";
  451. vmmc-supply = <&ldo20_reg>;
  452. mmc-pwrseq = <&emmc_pwrseq>;
  453. status = "okay";
  454. broken-cd;
  455. card-detect-delay = <200>;
  456. samsung,dw-mshc-ciu-div = <3>;
  457. samsung,dw-mshc-sdr-timing = <2 3>;
  458. samsung,dw-mshc-ddr-timing = <1 2>;
  459. bus-width = <8>;
  460. cap-mmc-highspeed;
  461. };
  462. &rtc {
  463. status = "okay";
  464. clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
  465. clock-names = "rtc", "rtc_src";
  466. };
  467. &sdhci_2 {
  468. bus-width = <4>;
  469. pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
  470. pinctrl-names = "default";
  471. vmmc-supply = <&ldo21_reg>;
  472. vqmmc-supply = <&ldo4_reg>;
  473. cd-gpios = <&gpk2 2 GPIO_ACTIVE_LOW>;
  474. status = "okay";
  475. };
  476. &serial_0 {
  477. status = "okay";
  478. };
  479. &serial_1 {
  480. status = "okay";
  481. };
  482. &tmu {
  483. vtmu-supply = <&ldo10_reg>;
  484. status = "okay";
  485. };