ecx-2000.dts 1.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright 2011-2012 Calxeda, Inc.
  4. */
  5. /dts-v1/;
  6. /* First 4KB has pen for secondary cores. */
  7. /memreserve/ 0x00000000 0x0001000;
  8. / {
  9. model = "Calxeda ECX-2000";
  10. compatible = "calxeda,ecx-2000";
  11. #address-cells = <2>;
  12. #size-cells = <2>;
  13. cpus {
  14. #address-cells = <1>;
  15. #size-cells = <0>;
  16. cpu@0 {
  17. compatible = "arm,cortex-a15";
  18. device_type = "cpu";
  19. reg = <0>;
  20. clocks = <&a9pll>;
  21. clock-names = "cpu";
  22. };
  23. cpu@1 {
  24. compatible = "arm,cortex-a15";
  25. device_type = "cpu";
  26. reg = <1>;
  27. clocks = <&a9pll>;
  28. clock-names = "cpu";
  29. };
  30. cpu@2 {
  31. compatible = "arm,cortex-a15";
  32. device_type = "cpu";
  33. reg = <2>;
  34. clocks = <&a9pll>;
  35. clock-names = "cpu";
  36. };
  37. cpu@3 {
  38. compatible = "arm,cortex-a15";
  39. device_type = "cpu";
  40. reg = <3>;
  41. clocks = <&a9pll>;
  42. clock-names = "cpu";
  43. };
  44. };
  45. memory@0 {
  46. name = "memory";
  47. device_type = "memory";
  48. reg = <0x00000000 0x00000000 0x00000000 0xff800000>;
  49. };
  50. memory@200000000 {
  51. name = "memory";
  52. device_type = "memory";
  53. reg = <0x00000002 0x00000000 0x00000003 0x00000000>;
  54. };
  55. soc {
  56. ranges = <0x00000000 0x00000000 0x00000000 0xffffffff>;
  57. timer {
  58. compatible = "arm,cortex-a15-timer", "arm,armv7-timer"; interrupts = <1 13 0xf08>,
  59. <1 14 0xf08>,
  60. <1 11 0xf08>,
  61. <1 10 0xf08>;
  62. };
  63. memory-controller@fff00000 {
  64. compatible = "calxeda,ecx-2000-ddr-ctrl";
  65. reg = <0xfff00000 0x1000>;
  66. interrupts = <0 91 4>;
  67. };
  68. intc: interrupt-controller@fff11000 {
  69. compatible = "arm,cortex-a15-gic";
  70. #interrupt-cells = <3>;
  71. #address-cells = <0>;
  72. interrupt-controller;
  73. interrupts = <1 9 0xf04>;
  74. reg = <0xfff11000 0x1000>,
  75. <0xfff12000 0x2000>,
  76. <0xfff14000 0x2000>,
  77. <0xfff16000 0x2000>;
  78. };
  79. pmu {
  80. compatible = "arm,cortex-a9-pmu";
  81. interrupts = <0 76 4>, <0 75 4>, <0 74 4>, <0 73 4>;
  82. };
  83. };
  84. };
  85. /include/ "ecx-common.dtsi"