dra76-evm.dts 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/
  4. */
  5. /dts-v1/;
  6. #include "dra76x.dtsi"
  7. #include "dra7-evm-common.dtsi"
  8. #include "dra76x-mmc-iodelay.dtsi"
  9. #include <dt-bindings/net/ti-dp83867.h>
  10. / {
  11. model = "TI DRA762 EVM";
  12. compatible = "ti,dra76-evm", "ti,dra762", "ti,dra7";
  13. aliases {
  14. display0 = &hdmi0;
  15. sound0 = &sound0;
  16. sound1 = &hdmi;
  17. };
  18. memory@0 {
  19. device_type = "memory";
  20. reg = <0x0 0x80000000 0x0 0x80000000>;
  21. };
  22. reserved-memory {
  23. #address-cells = <2>;
  24. #size-cells = <2>;
  25. ranges;
  26. ipu2_cma_pool: ipu2_cma@95800000 {
  27. compatible = "shared-dma-pool";
  28. reg = <0x0 0x95800000 0x0 0x3800000>;
  29. reusable;
  30. status = "okay";
  31. };
  32. dsp1_cma_pool: dsp1_cma@99000000 {
  33. compatible = "shared-dma-pool";
  34. reg = <0x0 0x99000000 0x0 0x4000000>;
  35. reusable;
  36. status = "okay";
  37. };
  38. ipu1_cma_pool: ipu1_cma@9d000000 {
  39. compatible = "shared-dma-pool";
  40. reg = <0x0 0x9d000000 0x0 0x2000000>;
  41. reusable;
  42. status = "okay";
  43. };
  44. dsp2_cma_pool: dsp2_cma@9f000000 {
  45. compatible = "shared-dma-pool";
  46. reg = <0x0 0x9f000000 0x0 0x800000>;
  47. reusable;
  48. status = "okay";
  49. };
  50. };
  51. vsys_12v0: fixedregulator-vsys12v0 {
  52. /* main supply */
  53. compatible = "regulator-fixed";
  54. regulator-name = "vsys_12v0";
  55. regulator-min-microvolt = <12000000>;
  56. regulator-max-microvolt = <12000000>;
  57. regulator-always-on;
  58. regulator-boot-on;
  59. };
  60. vsys_5v0: fixedregulator-vsys5v0 {
  61. /* Output of Cntlr B of TPS43351-Q1 on dra76-evm */
  62. compatible = "regulator-fixed";
  63. regulator-name = "vsys_5v0";
  64. regulator-min-microvolt = <5000000>;
  65. regulator-max-microvolt = <5000000>;
  66. vin-supply = <&vsys_12v0>;
  67. regulator-always-on;
  68. regulator-boot-on;
  69. };
  70. vio_3v6: fixedregulator-vio_3v6 {
  71. compatible = "regulator-fixed";
  72. regulator-name = "vio_3v6";
  73. regulator-min-microvolt = <3600000>;
  74. regulator-max-microvolt = <3600000>;
  75. vin-supply = <&vsys_5v0>;
  76. regulator-always-on;
  77. regulator-boot-on;
  78. };
  79. vsys_3v3: fixedregulator-vsys3v3 {
  80. /* Output of Cntlr A of TPS43351-Q1 on dra76-evm */
  81. compatible = "regulator-fixed";
  82. regulator-name = "vsys_3v3";
  83. regulator-min-microvolt = <3300000>;
  84. regulator-max-microvolt = <3300000>;
  85. vin-supply = <&vsys_12v0>;
  86. regulator-always-on;
  87. regulator-boot-on;
  88. };
  89. vio_3v3: fixedregulator-vio_3v3 {
  90. compatible = "regulator-fixed";
  91. regulator-name = "vio_3v3";
  92. regulator-min-microvolt = <3300000>;
  93. regulator-max-microvolt = <3300000>;
  94. vin-supply = <&vsys_3v3>;
  95. regulator-always-on;
  96. regulator-boot-on;
  97. };
  98. vio_3v3_sd: fixedregulator-sd {
  99. compatible = "regulator-fixed";
  100. regulator-name = "vio_3v3_sd";
  101. regulator-min-microvolt = <3300000>;
  102. regulator-max-microvolt = <3300000>;
  103. vin-supply = <&vio_3v3>;
  104. enable-active-high;
  105. gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
  106. };
  107. vio_1v8: fixedregulator-vio_1v8 {
  108. compatible = "regulator-fixed";
  109. regulator-name = "vio_1v8";
  110. regulator-min-microvolt = <1800000>;
  111. regulator-max-microvolt = <1800000>;
  112. vin-supply = <&smps5_reg>;
  113. };
  114. vmmcwl_fixed: fixedregulator-mmcwl {
  115. compatible = "regulator-fixed";
  116. regulator-name = "vmmcwl_fixed";
  117. regulator-min-microvolt = <1800000>;
  118. regulator-max-microvolt = <1800000>;
  119. gpio = <&gpio5 8 0>; /* gpio5_8 */
  120. startup-delay-us = <70000>;
  121. enable-active-high;
  122. };
  123. vtt_fixed: fixedregulator-vtt {
  124. compatible = "regulator-fixed";
  125. regulator-name = "vtt_fixed";
  126. regulator-min-microvolt = <1350000>;
  127. regulator-max-microvolt = <1350000>;
  128. vin-supply = <&vsys_3v3>;
  129. regulator-always-on;
  130. regulator-boot-on;
  131. };
  132. aic_dvdd: fixedregulator-aic_dvdd {
  133. /* TPS77018DBVT */
  134. compatible = "regulator-fixed";
  135. regulator-name = "aic_dvdd";
  136. vin-supply = <&vio_3v3>;
  137. regulator-min-microvolt = <1800000>;
  138. regulator-max-microvolt = <1800000>;
  139. };
  140. hdmi0: connector {
  141. compatible = "hdmi-connector";
  142. label = "hdmi";
  143. type = "a";
  144. port {
  145. hdmi_connector_in: endpoint {
  146. remote-endpoint = <&tpd12s015_out>;
  147. };
  148. };
  149. };
  150. tpd12s015: encoder {
  151. compatible = "ti,tpd12s015";
  152. gpios = <&gpio7 30 GPIO_ACTIVE_HIGH>, /* gpio7_30, CT CP HPD */
  153. <&gpio7 31 GPIO_ACTIVE_HIGH>, /* gpio7_31, LS OE */
  154. <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
  155. ports {
  156. #address-cells = <1>;
  157. #size-cells = <0>;
  158. port@0 {
  159. reg = <0>;
  160. tpd12s015_in: endpoint {
  161. remote-endpoint = <&hdmi_out>;
  162. };
  163. };
  164. port@1 {
  165. reg = <1>;
  166. tpd12s015_out: endpoint {
  167. remote-endpoint = <&hdmi_connector_in>;
  168. };
  169. };
  170. };
  171. };
  172. };
  173. &i2c1 {
  174. status = "okay";
  175. clock-frequency = <400000>;
  176. tps65917: tps65917@58 {
  177. compatible = "ti,tps65917";
  178. reg = <0x58>;
  179. ti,system-power-controller;
  180. ti,palmas-override-powerhold;
  181. interrupt-controller;
  182. #interrupt-cells = <2>;
  183. tps65917_pmic {
  184. compatible = "ti,tps65917-pmic";
  185. smps12-in-supply = <&vsys_3v3>;
  186. smps3-in-supply = <&vsys_3v3>;
  187. smps4-in-supply = <&vsys_3v3>;
  188. smps5-in-supply = <&vsys_3v3>;
  189. ldo1-in-supply = <&vsys_3v3>;
  190. ldo2-in-supply = <&vsys_3v3>;
  191. ldo3-in-supply = <&vsys_5v0>;
  192. ldo4-in-supply = <&vsys_5v0>;
  193. ldo5-in-supply = <&vsys_3v3>;
  194. tps65917_regulators: regulators {
  195. smps12_reg: smps12 {
  196. /* VDD_DSPEVE */
  197. regulator-name = "smps12";
  198. regulator-min-microvolt = <850000>;
  199. regulator-max-microvolt = <1250000>;
  200. regulator-always-on;
  201. regulator-boot-on;
  202. };
  203. smps3_reg: smps3 {
  204. /* VDD_CORE */
  205. regulator-name = "smps3";
  206. regulator-min-microvolt = <850000>;
  207. regulator-max-microvolt = <1250000>;
  208. regulator-boot-on;
  209. regulator-always-on;
  210. };
  211. smps4_reg: smps4 {
  212. /* VDD_IVA */
  213. regulator-name = "smps4";
  214. regulator-min-microvolt = <850000>;
  215. regulator-max-microvolt = <1250000>;
  216. regulator-always-on;
  217. regulator-boot-on;
  218. };
  219. smps5_reg: smps5 {
  220. /* VDDS1V8 */
  221. regulator-name = "smps5";
  222. regulator-min-microvolt = <1800000>;
  223. regulator-max-microvolt = <1800000>;
  224. regulator-boot-on;
  225. regulator-always-on;
  226. };
  227. ldo1_reg: ldo1 {
  228. /* LDO1_OUT --> VDA_PHY1_1V8 */
  229. regulator-name = "ldo1";
  230. regulator-min-microvolt = <1800000>;
  231. regulator-max-microvolt = <1800000>;
  232. regulator-always-on;
  233. regulator-boot-on;
  234. regulator-allow-bypass;
  235. };
  236. ldo2_reg: ldo2 {
  237. /* LDO2_OUT --> VDA_PHY2_1V8 */
  238. regulator-name = "ldo2";
  239. regulator-min-microvolt = <1800000>;
  240. regulator-max-microvolt = <1800000>;
  241. regulator-allow-bypass;
  242. regulator-always-on;
  243. };
  244. ldo3_reg: ldo3 {
  245. /* VDA_USB_3V3 */
  246. regulator-name = "ldo3";
  247. regulator-min-microvolt = <3300000>;
  248. regulator-max-microvolt = <3300000>;
  249. regulator-boot-on;
  250. regulator-always-on;
  251. };
  252. ldo5_reg: ldo5 {
  253. /* VDDA_1V8_PLL */
  254. regulator-name = "ldo5";
  255. regulator-min-microvolt = <1800000>;
  256. regulator-max-microvolt = <1800000>;
  257. regulator-always-on;
  258. regulator-boot-on;
  259. };
  260. ldo4_reg: ldo4 {
  261. /* VDD_SDIO_DV */
  262. regulator-name = "ldo4";
  263. regulator-min-microvolt = <1800000>;
  264. regulator-max-microvolt = <3300000>;
  265. regulator-boot-on;
  266. regulator-always-on;
  267. };
  268. };
  269. };
  270. tps65917_power_button {
  271. compatible = "ti,palmas-pwrbutton";
  272. interrupt-parent = <&tps65917>;
  273. interrupts = <1 IRQ_TYPE_NONE>;
  274. wakeup-source;
  275. ti,palmas-long-press-seconds = <6>;
  276. };
  277. };
  278. lp87565: lp87565@60 {
  279. compatible = "ti,lp87565-q1";
  280. reg = <0x60>;
  281. buck10-in-supply =<&vsys_3v3>;
  282. buck23-in-supply =<&vsys_3v3>;
  283. regulators: regulators {
  284. buck10_reg: buck10 {
  285. /*VDD_MPU*/
  286. regulator-name = "buck10";
  287. regulator-min-microvolt = <850000>;
  288. regulator-max-microvolt = <1250000>;
  289. regulator-always-on;
  290. regulator-boot-on;
  291. };
  292. buck23_reg: buck23 {
  293. /* VDD_GPU*/
  294. regulator-name = "buck23";
  295. regulator-min-microvolt = <850000>;
  296. regulator-max-microvolt = <1250000>;
  297. regulator-boot-on;
  298. regulator-always-on;
  299. };
  300. };
  301. };
  302. pcf_lcd: pcf8757@20 {
  303. compatible = "nxp,pcf8575";
  304. reg = <0x20>;
  305. gpio-controller;
  306. #gpio-cells = <2>;
  307. interrupt-controller;
  308. #interrupt-cells = <2>;
  309. interrupt-parent = <&gpio1>;
  310. interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
  311. };
  312. pcf_gpio_21: pcf8757@21 {
  313. compatible = "nxp,pcf8575";
  314. reg = <0x21>;
  315. gpio-controller;
  316. #gpio-cells = <2>;
  317. interrupt-parent = <&gpio1>;
  318. interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
  319. interrupt-controller;
  320. #interrupt-cells = <2>;
  321. };
  322. pcf_hdmi: pcf8575@26 {
  323. compatible = "nxp,pcf8575";
  324. reg = <0x26>;
  325. gpio-controller;
  326. #gpio-cells = <2>;
  327. hdmi-audio-hog {
  328. /* vin6_sel_s0: high: VIN6, low: audio */
  329. gpio-hog;
  330. gpios = <1 GPIO_ACTIVE_HIGH>;
  331. output-low;
  332. line-name = "vin6_sel_s0";
  333. };
  334. };
  335. tlv320aic3106: tlv320aic3106@19 {
  336. #sound-dai-cells = <0>;
  337. compatible = "ti,tlv320aic3106";
  338. reg = <0x19>;
  339. adc-settle-ms = <40>;
  340. ai3x-micbias-vg = <1>; /* 2.0V */
  341. status = "okay";
  342. /* Regulators */
  343. AVDD-supply = <&vio_3v3>;
  344. IOVDD-supply = <&vio_3v3>;
  345. DRVDD-supply = <&vio_3v3>;
  346. DVDD-supply = <&aic_dvdd>;
  347. };
  348. };
  349. &cpu0 {
  350. vdd-supply = <&buck10_reg>;
  351. };
  352. &mmc1 {
  353. status = "okay";
  354. vmmc-supply = <&vio_3v3_sd>;
  355. vqmmc-supply = <&ldo4_reg>;
  356. bus-width = <4>;
  357. /*
  358. * SDCD signal is not being used here - using the fact that GPIO mode
  359. * is always hardwired.
  360. */
  361. cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
  362. pinctrl-names = "default", "hs";
  363. pinctrl-0 = <&mmc1_pins_default>;
  364. pinctrl-1 = <&mmc1_pins_hs>;
  365. };
  366. &mmc2 {
  367. status = "okay";
  368. vmmc-supply = <&vio_1v8>;
  369. vqmmc-supply = <&vio_1v8>;
  370. bus-width = <8>;
  371. non-removable;
  372. pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v";
  373. pinctrl-0 = <&mmc2_pins_default>;
  374. pinctrl-1 = <&mmc2_pins_default>;
  375. pinctrl-2 = <&mmc2_pins_default>;
  376. pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_conf>;
  377. };
  378. &mmc4 {
  379. status = "okay";
  380. vmmc-supply = <&vio_3v6>;
  381. vqmmc-supply = <&vmmcwl_fixed>;
  382. pinctrl-names = "default", "hs", "sdr12", "sdr25";
  383. pinctrl-0 = <&mmc4_pins_hs &mmc4_iodelay_default_conf>;
  384. pinctrl-1 = <&mmc4_pins_hs &mmc4_iodelay_manual1_conf>;
  385. pinctrl-2 = <&mmc4_pins_hs &mmc4_iodelay_manual1_conf>;
  386. pinctrl-3 = <&mmc4_pins_hs &mmc4_iodelay_manual1_conf>;
  387. };
  388. /* No RTC on this device */
  389. &rtc {
  390. status = "disabled";
  391. };
  392. &mac_sw {
  393. status = "okay";
  394. };
  395. &cpsw_port1 {
  396. phy-handle = <&dp83867_0>;
  397. phy-mode = "rgmii-id";
  398. ti,dual-emac-pvid = <1>;
  399. };
  400. &cpsw_port2 {
  401. phy-handle = <&dp83867_1>;
  402. phy-mode = "rgmii-id";
  403. ti,dual-emac-pvid = <2>;
  404. };
  405. &davinci_mdio_sw {
  406. dp83867_0: ethernet-phy@2 {
  407. reg = <2>;
  408. ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
  409. ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
  410. ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
  411. ti,min-output-impedance;
  412. ti,dp83867-rxctrl-strap-quirk;
  413. };
  414. dp83867_1: ethernet-phy@3 {
  415. reg = <3>;
  416. ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
  417. ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
  418. ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
  419. ti,min-output-impedance;
  420. ti,dp83867-rxctrl-strap-quirk;
  421. };
  422. };
  423. &usb2_phy1 {
  424. phy-supply = <&ldo3_reg>;
  425. };
  426. &usb2_phy2 {
  427. phy-supply = <&ldo3_reg>;
  428. };
  429. &dss {
  430. status = "okay";
  431. vdda_video-supply = <&ldo5_reg>;
  432. };
  433. &hdmi {
  434. status = "okay";
  435. vdda-supply = <&ldo1_reg>;
  436. port {
  437. hdmi_out: endpoint {
  438. remote-endpoint = <&tpd12s015_in>;
  439. };
  440. };
  441. };
  442. &qspi {
  443. spi-max-frequency = <96000000>;
  444. flash@0 {
  445. spi-max-frequency = <96000000>;
  446. };
  447. };
  448. &pcie2_phy {
  449. status = "okay";
  450. };
  451. &pcie1_rc {
  452. num-lanes = <2>;
  453. phys = <&pcie1_phy>, <&pcie2_phy>;
  454. phy-names = "pcie-phy0", "pcie-phy1";
  455. };
  456. &pcie1_ep {
  457. num-lanes = <2>;
  458. phys = <&pcie1_phy>, <&pcie2_phy>;
  459. phy-names = "pcie-phy0", "pcie-phy1";
  460. };
  461. &extcon_usb1 {
  462. vbus-gpio = <&pcf_lcd 14 GPIO_ACTIVE_HIGH>;
  463. };
  464. &extcon_usb2 {
  465. vbus-gpio = <&pcf_lcd 15 GPIO_ACTIVE_HIGH>;
  466. };
  467. &m_can0 {
  468. can-transceiver {
  469. max-bitrate = <5000000>;
  470. };
  471. };
  472. &ipu2 {
  473. status = "okay";
  474. memory-region = <&ipu2_cma_pool>;
  475. };
  476. &ipu1 {
  477. status = "okay";
  478. memory-region = <&ipu1_cma_pool>;
  479. };
  480. &dsp1 {
  481. status = "okay";
  482. memory-region = <&dsp1_cma_pool>;
  483. };
  484. &dsp2 {
  485. status = "okay";
  486. memory-region = <&dsp2_cma_pool>;
  487. };