dra71-evm.dts 7.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
  4. */
  5. #include "dra71x.dtsi"
  6. #include "dra7-mmc-iodelay.dtsi"
  7. #include "dra72x-mmc-iodelay.dtsi"
  8. #include <dt-bindings/net/ti-dp83867.h>
  9. / {
  10. compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7";
  11. model = "TI DRA718 EVM";
  12. memory {
  13. device_type = "memory";
  14. reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */
  15. };
  16. reserved-memory {
  17. #address-cells = <2>;
  18. #size-cells = <2>;
  19. ranges;
  20. ipu2_memory_region: ipu2-memory@95800000 {
  21. compatible = "shared-dma-pool";
  22. reg = <0x0 0x95800000 0x0 0x3800000>;
  23. reusable;
  24. status = "okay";
  25. };
  26. dsp1_memory_region: dsp1-memory@99000000 {
  27. compatible = "shared-dma-pool";
  28. reg = <0x0 0x99000000 0x0 0x4000000>;
  29. reusable;
  30. status = "okay";
  31. };
  32. ipu1_memory_region: ipu1-memory@9d000000 {
  33. compatible = "shared-dma-pool";
  34. reg = <0x0 0x9d000000 0x0 0x2000000>;
  35. reusable;
  36. status = "okay";
  37. };
  38. };
  39. vpo_sd_1v8_3v3: gpio-regulator-TPS74801 {
  40. compatible = "regulator-gpio";
  41. regulator-name = "vddshv8";
  42. regulator-min-microvolt = <1800000>;
  43. regulator-max-microvolt = <3300000>;
  44. regulator-boot-on;
  45. vin-supply = <&evm_5v0>;
  46. gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
  47. states = <1800000 0x0
  48. 3300000 0x1>;
  49. };
  50. evm_1v8_sw: fixedregulator-evm_1v8 {
  51. compatible = "regulator-fixed";
  52. regulator-name = "evm_1v8";
  53. regulator-min-microvolt = <1800000>;
  54. regulator-max-microvolt = <1800000>;
  55. vin-supply = <&lp8732_buck0_reg>;
  56. regulator-always-on;
  57. regulator-boot-on;
  58. };
  59. poweroff: gpio-poweroff {
  60. compatible = "gpio-poweroff";
  61. gpios = <&gpio7 30 GPIO_ACTIVE_HIGH>;
  62. input;
  63. };
  64. };
  65. &i2c1 {
  66. status = "okay";
  67. clock-frequency = <400000>;
  68. lp8733: lp8733@60 {
  69. compatible = "ti,lp8733";
  70. reg = <0x60>;
  71. buck0-in-supply =<&vsys_3v3>;
  72. buck1-in-supply =<&vsys_3v3>;
  73. ldo0-in-supply =<&evm_5v0>;
  74. ldo1-in-supply =<&evm_5v0>;
  75. lp8733_regulators: regulators {
  76. lp8733_buck0_reg: buck0 {
  77. /* FB_B0 -> LP8733-BUCK1 - VPO_S1_AVS - VDD_CORE_AVS (core, mpu, gpu) */
  78. regulator-name = "lp8733-buck0";
  79. regulator-min-microvolt = <850000>;
  80. regulator-max-microvolt = <1250000>;
  81. regulator-always-on;
  82. regulator-boot-on;
  83. };
  84. lp8733_buck1_reg: buck1 {
  85. /* FB_B1 -> LP8733-BUCK2 - VPO_S2_AVS - VDD_DSP_AVS (DSP/eve/iva) */
  86. regulator-name = "lp8733-buck1";
  87. regulator-min-microvolt = <850000>;
  88. regulator-max-microvolt = <1250000>;
  89. regulator-boot-on;
  90. regulator-always-on;
  91. };
  92. lp8733_ldo0_reg: ldo0 {
  93. /* LDO0 -> LP8733-LDO1 - VPO_L1_3V3 - VDDSHV8 (optional) */
  94. regulator-name = "lp8733-ldo0";
  95. regulator-min-microvolt = <3300000>;
  96. regulator-max-microvolt = <3300000>;
  97. regulator-boot-on;
  98. regulator-always-on;
  99. };
  100. lp8733_ldo1_reg: ldo1 {
  101. /* LDO1 -> LP8733-LDO2 - VPO_L2_3V3 - VDDA_USB3V3 */
  102. regulator-name = "lp8733-ldo1";
  103. regulator-min-microvolt = <3300000>;
  104. regulator-max-microvolt = <3300000>;
  105. regulator-always-on;
  106. regulator-boot-on;
  107. };
  108. };
  109. };
  110. lp8732: lp8732@61 {
  111. compatible = "ti,lp8732";
  112. reg = <0x61>;
  113. buck0-in-supply =<&vsys_3v3>;
  114. buck1-in-supply =<&vsys_3v3>;
  115. ldo0-in-supply =<&vsys_3v3>;
  116. ldo1-in-supply =<&vsys_3v3>;
  117. lp8732_regulators: regulators {
  118. lp8732_buck0_reg: buck0 {
  119. /* FB_B0 -> LP8732-BUCK1 - VPO_S3_1V8 - VDDS_1V8 */
  120. regulator-name = "lp8732-buck0";
  121. regulator-min-microvolt = <1800000>;
  122. regulator-max-microvolt = <1800000>;
  123. regulator-always-on;
  124. regulator-boot-on;
  125. };
  126. lp8732_buck1_reg: buck1 {
  127. /* FB_B1 -> LP8732-BUCK2 - VPO_S4_DDR - VDD_DDR_1V35 */
  128. regulator-name = "lp8732-buck1";
  129. regulator-min-microvolt = <1350000>;
  130. regulator-max-microvolt = <1350000>;
  131. regulator-boot-on;
  132. regulator-always-on;
  133. };
  134. lp8732_ldo0_reg: ldo0 {
  135. /* LDO0 -> LP8732-LDO1 - VPO_L3_1V8 - VDA_1V8_PLL */
  136. regulator-name = "lp8732-ldo0";
  137. regulator-min-microvolt = <1800000>;
  138. regulator-max-microvolt = <1800000>;
  139. regulator-boot-on;
  140. regulator-always-on;
  141. };
  142. lp8732_ldo1_reg: ldo1 {
  143. /* LDO1 -> LP8732-LDO2 - VPO_L4_1V8 - VDA_1V8_PHY */
  144. regulator-name = "lp8732-ldo1";
  145. regulator-min-microvolt = <1800000>;
  146. regulator-max-microvolt = <1800000>;
  147. regulator-always-on;
  148. regulator-boot-on;
  149. };
  150. };
  151. };
  152. };
  153. &pcf_lcd {
  154. interrupt-parent = <&gpio7>;
  155. interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
  156. };
  157. &pcf_gpio_21 {
  158. interrupt-parent = <&gpio7>;
  159. interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
  160. };
  161. &pcf_hdmi {
  162. hdmi-i2c-disable-hog {
  163. /*
  164. * PM_OEn to High: Disable routing I2C3 to PM_I2C
  165. * With this PM_SEL(p3) should not matter
  166. */
  167. gpio-hog;
  168. gpios = <0 GPIO_ACTIVE_LOW>;
  169. output-high;
  170. line-name = "pm_oe_n";
  171. };
  172. };
  173. &mmc1 {
  174. pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
  175. pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
  176. pinctrl-1 = <&mmc1_pins_hs>;
  177. pinctrl-2 = <&mmc1_pins_sdr12>;
  178. pinctrl-3 = <&mmc1_pins_sdr25>;
  179. pinctrl-4 = <&mmc1_pins_sdr50>;
  180. pinctrl-5 = <&mmc1_pins_ddr50_rev20 &mmc1_iodelay_ddr50_conf>;
  181. pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>;
  182. vqmmc-supply = <&vpo_sd_1v8_3v3>;
  183. };
  184. &mmc2 {
  185. pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v";
  186. pinctrl-0 = <&mmc2_pins_default>;
  187. pinctrl-1 = <&mmc2_pins_hs>;
  188. pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>;
  189. pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev20_conf>;
  190. vmmc-supply = <&evm_1v8_sw>;
  191. vqmmc-supply = <&evm_1v8_sw>;
  192. };
  193. &mac_sw {
  194. mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>,
  195. <&pcf_hdmi 9 GPIO_ACTIVE_LOW>, /* P11 */
  196. <&pcf_hdmi 10 GPIO_ACTIVE_LOW>; /* P12 */
  197. status = "okay";
  198. };
  199. &cpsw_port1 {
  200. phy-handle = <&dp83867_0>;
  201. phy-mode = "rgmii-id";
  202. ti,dual-emac-pvid = <1>;
  203. };
  204. &cpsw_port2 {
  205. phy-handle = <&dp83867_1>;
  206. phy-mode = "rgmii-id";
  207. ti,dual-emac-pvid = <2>;
  208. };
  209. &davinci_mdio_sw {
  210. dp83867_0: ethernet-phy@2 {
  211. reg = <2>;
  212. ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
  213. ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
  214. ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
  215. ti,min-output-impedance;
  216. ti,dp83867-rxctrl-strap-quirk;
  217. };
  218. dp83867_1: ethernet-phy@3 {
  219. reg = <3>;
  220. ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
  221. ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
  222. ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
  223. ti,min-output-impedance;
  224. ti,dp83867-rxctrl-strap-quirk;
  225. };
  226. };
  227. /* No Sata on this device */
  228. &sata_phy {
  229. status = "disabled";
  230. };
  231. &sata {
  232. status = "disabled";
  233. };
  234. /* No RTC on this device */
  235. &rtc {
  236. status = "disabled";
  237. };
  238. &usb2_phy1 {
  239. phy-supply = <&lp8733_ldo1_reg>;
  240. };
  241. &usb2_phy2 {
  242. phy-supply = <&lp8733_ldo1_reg>;
  243. };
  244. &dss {
  245. /* Supplied by VDA_1V8_PLL */
  246. vdda_video-supply = <&lp8732_ldo0_reg>;
  247. };
  248. &hdmi {
  249. /* Supplied by VDA_1V8_PHY */
  250. vdda_video-supply = <&lp8732_ldo1_reg>;
  251. };
  252. &extcon_usb1 {
  253. vbus-gpio = <&pcf_lcd 14 GPIO_ACTIVE_HIGH>;
  254. };
  255. &extcon_usb2 {
  256. vbus-gpio = <&pcf_lcd 15 GPIO_ACTIVE_HIGH>;
  257. };
  258. &ipu2 {
  259. status = "okay";
  260. memory-region = <&ipu2_memory_region>;
  261. };
  262. &ipu1 {
  263. status = "okay";
  264. memory-region = <&ipu1_memory_region>;
  265. };
  266. &dsp1 {
  267. status = "okay";
  268. memory-region = <&dsp1_memory_region>;
  269. };