da850-evm.dts 9.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Device Tree for DA850 EVM board
  4. *
  5. * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
  6. */
  7. /dts-v1/;
  8. #include "da850.dtsi"
  9. #include <dt-bindings/gpio/gpio.h>
  10. / {
  11. compatible = "ti,da850-evm", "ti,da850";
  12. model = "DA850/AM1808/OMAP-L138 EVM";
  13. chosen {
  14. stdout-path = &serial2;
  15. };
  16. aliases {
  17. serial0 = &serial0;
  18. serial1 = &serial1;
  19. serial2 = &serial2;
  20. ethernet0 = &eth0;
  21. spi0 = &spi1;
  22. };
  23. backlight: backlight-pwm {
  24. pinctrl-names = "default";
  25. pinctrl-0 = <&ecap2_pins>;
  26. power-supply = <&backlight_lcd>;
  27. compatible = "pwm-backlight";
  28. /*
  29. * The PWM here corresponds to production hardware. The
  30. * schematic needs to be 1015171 (15 March 2010), Rev A
  31. * or newer.
  32. */
  33. pwms = <&ecap2 0 50000 0>;
  34. brightness-levels = <0 10 20 30 40 50 60 70 80 90 99>;
  35. default-brightness-level = <7>;
  36. };
  37. panel {
  38. compatible = "ti,tilcdc,panel";
  39. pinctrl-names = "default";
  40. pinctrl-0 = <&lcd_pins>;
  41. /*
  42. * The vpif and the LCD are mutually exclusive.
  43. * To enable VPIF, change the status below to 'disabled' then
  44. * then change the status of the vpif below to 'okay'
  45. */
  46. status = "okay";
  47. enable-gpios = <&gpio 40 GPIO_ACTIVE_HIGH>; /* lcd_panel_pwr */
  48. panel-info {
  49. ac-bias = <255>;
  50. ac-bias-intrpt = <0>;
  51. dma-burst-sz = <16>;
  52. bpp = <16>;
  53. fdd = <0x80>;
  54. sync-edge = <0>;
  55. sync-ctrl = <1>;
  56. raster-order = <0>;
  57. fifo-th = <0>;
  58. };
  59. display-timings {
  60. native-mode = <&timing0>;
  61. timing0: 480x272 {
  62. clock-frequency = <9000000>;
  63. hactive = <480>;
  64. vactive = <272>;
  65. hfront-porch = <3>;
  66. hback-porch = <2>;
  67. hsync-len = <42>;
  68. vback-porch = <3>;
  69. vfront-porch = <4>;
  70. vsync-len = <11>;
  71. hsync-active = <0>;
  72. vsync-active = <0>;
  73. de-active = <1>;
  74. pixelclk-active = <1>;
  75. };
  76. };
  77. };
  78. vbat: fixedregulator0 {
  79. compatible = "regulator-fixed";
  80. regulator-name = "vbat";
  81. regulator-min-microvolt = <5000000>;
  82. regulator-max-microvolt = <5000000>;
  83. regulator-boot-on;
  84. };
  85. baseboard_3v3: fixedregulator-3v3 {
  86. /* TPS73701DCQ */
  87. compatible = "regulator-fixed";
  88. regulator-name = "baseboard_3v3";
  89. regulator-min-microvolt = <3300000>;
  90. regulator-max-microvolt = <3300000>;
  91. vin-supply = <&vbat>;
  92. regulator-always-on;
  93. regulator-boot-on;
  94. };
  95. baseboard_1v8: fixedregulator-1v8 {
  96. /* TPS73701DCQ */
  97. compatible = "regulator-fixed";
  98. regulator-name = "baseboard_1v8";
  99. regulator-min-microvolt = <1800000>;
  100. regulator-max-microvolt = <1800000>;
  101. vin-supply = <&vbat>;
  102. regulator-always-on;
  103. regulator-boot-on;
  104. };
  105. backlight_lcd: backlight-regulator {
  106. compatible = "regulator-fixed";
  107. regulator-name = "lcd_backlight_pwr";
  108. regulator-min-microvolt = <3300000>;
  109. regulator-max-microvolt = <3300000>;
  110. gpio = <&gpio 47 GPIO_ACTIVE_HIGH>; /* lcd_backlight_pwr */
  111. enable-active-high;
  112. };
  113. sound {
  114. compatible = "simple-audio-card";
  115. simple-audio-card,name = "DA850-OMAPL138 EVM";
  116. simple-audio-card,widgets =
  117. "Line", "Line In",
  118. "Line", "Line Out";
  119. simple-audio-card,routing =
  120. "LINE1L", "Line In",
  121. "LINE1R", "Line In",
  122. "Line Out", "LLOUT",
  123. "Line Out", "RLOUT";
  124. simple-audio-card,format = "dsp_b";
  125. simple-audio-card,bitclock-master = <&link0_codec>;
  126. simple-audio-card,frame-master = <&link0_codec>;
  127. simple-audio-card,bitclock-inversion;
  128. simple-audio-card,cpu {
  129. sound-dai = <&mcasp0>;
  130. system-clock-frequency = <24576000>;
  131. };
  132. link0_codec: simple-audio-card,codec {
  133. sound-dai = <&tlv320aic3106>;
  134. system-clock-frequency = <24576000>;
  135. };
  136. };
  137. };
  138. &ecap2 {
  139. status = "okay";
  140. };
  141. &ref_clk {
  142. clock-frequency = <24000000>;
  143. };
  144. &pmx_core {
  145. status = "okay";
  146. mcasp0_pins: pinmux_mcasp0_pins {
  147. pinctrl-single,bits = <
  148. /*
  149. * AHCLKX, ACLKX, AFSX, AHCLKR, ACLKR,
  150. * AFSR, AMUTE
  151. */
  152. 0x00 0x11111111 0xffffffff
  153. /* AXR11, AXR12 */
  154. 0x04 0x00011000 0x000ff000
  155. >;
  156. };
  157. nand_pins: nand_pins {
  158. pinctrl-single,bits = <
  159. /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[4], EMA_CS[3] */
  160. 0x1c 0x10110110 0xf0ff0ff0
  161. /*
  162. * EMA_D[0], EMA_D[1], EMA_D[2],
  163. * EMA_D[3], EMA_D[4], EMA_D[5],
  164. * EMA_D[6], EMA_D[7]
  165. */
  166. 0x24 0x11111111 0xffffffff
  167. /* EMA_A[1], EMA_A[2] */
  168. 0x30 0x01100000 0x0ff00000
  169. >;
  170. };
  171. };
  172. &cpu {
  173. cpu-supply = <&vdcdc3_reg>;
  174. };
  175. /*
  176. * The standard da850-evm kits and SOM's are 375MHz so enable this operating
  177. * point by default. Higher frequencies must be enabled for custom boards with
  178. * other variants of the SoC.
  179. */
  180. &opp_375 {
  181. status = "okay";
  182. };
  183. &sata {
  184. status = "okay";
  185. };
  186. &serial0 {
  187. status = "okay";
  188. };
  189. &serial1 {
  190. status = "okay";
  191. };
  192. &serial2 {
  193. status = "okay";
  194. };
  195. &rtc0 {
  196. status = "okay";
  197. };
  198. &lcdc {
  199. status = "okay";
  200. };
  201. &i2c0 {
  202. status = "okay";
  203. clock-frequency = <100000>;
  204. pinctrl-names = "default";
  205. pinctrl-0 = <&i2c0_pins>;
  206. tps: tps@48 {
  207. reg = <0x48>;
  208. };
  209. tlv320aic3106: tlv320aic3106@18 {
  210. #sound-dai-cells = <0>;
  211. compatible = "ti,tlv320aic3106";
  212. reg = <0x18>;
  213. status = "okay";
  214. /* Regulators */
  215. IOVDD-supply = <&vdcdc2_reg>;
  216. AVDD-supply = <&baseboard_3v3>;
  217. DRVDD-supply = <&baseboard_3v3>;
  218. DVDD-supply = <&baseboard_1v8>;
  219. };
  220. tca6416: gpio@20 {
  221. compatible = "ti,tca6416";
  222. reg = <0x20>;
  223. gpio-controller;
  224. #gpio-cells = <2>;
  225. };
  226. tca6416_bb: gpio@21 {
  227. compatible = "ti,tca6416";
  228. reg = <0x21>;
  229. gpio-controller;
  230. #gpio-cells = <2>;
  231. };
  232. };
  233. &wdt {
  234. status = "okay";
  235. };
  236. &mmc0 {
  237. max-frequency = <50000000>;
  238. bus-width = <4>;
  239. status = "okay";
  240. pinctrl-names = "default";
  241. pinctrl-0 = <&mmc0_pins>;
  242. cd-gpios = <&gpio 64 GPIO_ACTIVE_LOW>;
  243. wp-gpios = <&gpio 65 GPIO_ACTIVE_HIGH>;
  244. };
  245. &spi1 {
  246. status = "okay";
  247. pinctrl-names = "default";
  248. pinctrl-0 = <&spi1_pins &spi1_cs0_pin>;
  249. flash: flash@0 {
  250. #address-cells = <1>;
  251. #size-cells = <1>;
  252. compatible = "jedec,spi-nor";
  253. spi-max-frequency = <30000000>;
  254. m25p,fast-read;
  255. reg = <0>;
  256. partition@0 {
  257. label = "U-Boot-SPL";
  258. reg = <0x00000000 0x00010000>;
  259. read-only;
  260. };
  261. partition@1 {
  262. label = "U-Boot";
  263. reg = <0x00010000 0x00080000>;
  264. read-only;
  265. };
  266. partition@2 {
  267. label = "U-Boot-Env";
  268. reg = <0x00090000 0x00010000>;
  269. read-only;
  270. };
  271. partition@3 {
  272. label = "Kernel";
  273. reg = <0x000a0000 0x00280000>;
  274. };
  275. partition@4 {
  276. label = "Filesystem";
  277. reg = <0x00320000 0x00400000>;
  278. };
  279. partition@5 {
  280. label = "MAC-Address";
  281. reg = <0x007f0000 0x00010000>;
  282. read-only;
  283. };
  284. };
  285. };
  286. &mdio {
  287. status = "okay";
  288. pinctrl-names = "default";
  289. pinctrl-0 = <&mdio_pins>;
  290. bus_freq = <2200000>;
  291. };
  292. &eth0 {
  293. status = "okay";
  294. pinctrl-names = "default";
  295. pinctrl-0 = <&mii_pins>;
  296. };
  297. &gpio {
  298. status = "okay";
  299. };
  300. /include/ "tps6507x.dtsi"
  301. &tps {
  302. vdcdc1_2-supply = <&vbat>;
  303. vdcdc3-supply = <&vbat>;
  304. vldo1_2-supply = <&vbat>;
  305. regulators {
  306. vdcdc1_reg: regulator@0 {
  307. regulator-name = "VDCDC1_3.3V";
  308. regulator-min-microvolt = <3150000>;
  309. regulator-max-microvolt = <3450000>;
  310. regulator-always-on;
  311. regulator-boot-on;
  312. };
  313. vdcdc2_reg: regulator@1 {
  314. regulator-name = "VDCDC2_3.3V";
  315. regulator-min-microvolt = <1710000>;
  316. regulator-max-microvolt = <3450000>;
  317. regulator-always-on;
  318. regulator-boot-on;
  319. ti,defdcdc_default = <1>;
  320. };
  321. vdcdc3_reg: regulator@2 {
  322. regulator-name = "VDCDC3_1.2V";
  323. regulator-min-microvolt = <950000>;
  324. regulator-max-microvolt = <1350000>;
  325. regulator-always-on;
  326. regulator-boot-on;
  327. ti,defdcdc_default = <1>;
  328. };
  329. ldo1_reg: regulator@3 {
  330. regulator-name = "LDO1_1.8V";
  331. regulator-min-microvolt = <1710000>;
  332. regulator-max-microvolt = <1890000>;
  333. regulator-always-on;
  334. regulator-boot-on;
  335. };
  336. ldo2_reg: regulator@4 {
  337. regulator-name = "LDO2_1.2V";
  338. regulator-min-microvolt = <1140000>;
  339. regulator-max-microvolt = <1320000>;
  340. regulator-always-on;
  341. regulator-boot-on;
  342. };
  343. };
  344. };
  345. &mcasp0 {
  346. #sound-dai-cells = <0>;
  347. status = "okay";
  348. pinctrl-names = "default";
  349. pinctrl-0 = <&mcasp0_pins>;
  350. op-mode = <0>; /* MCASP_IIS_MODE */
  351. tdm-slots = <2>;
  352. /* 4 serializer */
  353. serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
  354. 0 0 0 0
  355. 0 0 0 0
  356. 0 0 0 1
  357. 2 0 0 0
  358. >;
  359. tx-num-evt = <32>;
  360. rx-num-evt = <32>;
  361. };
  362. &edma0 {
  363. ti,edma-reserved-slot-ranges = <32 50>;
  364. };
  365. &edma1 {
  366. ti,edma-reserved-slot-ranges = <32 90>;
  367. };
  368. &aemif {
  369. pinctrl-names = "default";
  370. pinctrl-0 = <&nand_pins>;
  371. status = "ok";
  372. cs3 {
  373. #address-cells = <2>;
  374. #size-cells = <1>;
  375. clock-ranges;
  376. ranges;
  377. ti,cs-chipselect = <3>;
  378. nand@2000000,0 {
  379. compatible = "ti,davinci-nand";
  380. #address-cells = <1>;
  381. #size-cells = <1>;
  382. reg = <0 0x02000000 0x02000000
  383. 1 0x00000000 0x00008000>;
  384. ti,davinci-chipselect = <1>;
  385. ti,davinci-mask-ale = <0>;
  386. ti,davinci-mask-cle = <0>;
  387. ti,davinci-mask-chipsel = <0>;
  388. ti,davinci-ecc-mode = "hw";
  389. ti,davinci-ecc-bits = <4>;
  390. ti,davinci-nand-use-bbt;
  391. };
  392. };
  393. };
  394. &usb_phy {
  395. status = "okay";
  396. };
  397. &usb0 {
  398. status = "okay";
  399. };
  400. &usb1 {
  401. status = "okay";
  402. };
  403. &vpif {
  404. pinctrl-names = "default";
  405. pinctrl-0 = <&vpif_capture_pins>, <&vpif_display_pins>;
  406. /*
  407. * The vpif and the LCD are mutually exclusive.
  408. * To enable VPIF, disable the ti,tilcdc,panel then
  409. * change the status below to 'okay'
  410. */
  411. status = "disabled";
  412. };