bcm6846.dtsi 2.2 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright 2022 Broadcom Ltd.
  4. */
  5. #include <dt-bindings/interrupt-controller/arm-gic.h>
  6. #include <dt-bindings/interrupt-controller/irq.h>
  7. / {
  8. compatible = "brcm,bcm6846", "brcm,bcmbca";
  9. #address-cells = <1>;
  10. #size-cells = <1>;
  11. interrupt-parent = <&gic>;
  12. cpus {
  13. #address-cells = <1>;
  14. #size-cells = <0>;
  15. CA7_0: cpu@0 {
  16. device_type = "cpu";
  17. compatible = "arm,cortex-a7";
  18. reg = <0x0>;
  19. next-level-cache = <&L2_0>;
  20. enable-method = "psci";
  21. };
  22. CA7_1: cpu@1 {
  23. device_type = "cpu";
  24. compatible = "arm,cortex-a7";
  25. reg = <0x1>;
  26. next-level-cache = <&L2_0>;
  27. enable-method = "psci";
  28. };
  29. L2_0: l2-cache0 {
  30. compatible = "cache";
  31. };
  32. };
  33. timer {
  34. compatible = "arm,armv7-timer";
  35. interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  36. <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  37. <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  38. <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
  39. arm,cpu-registers-not-fw-configured;
  40. };
  41. pmu: pmu {
  42. compatible = "arm,cortex-a7-pmu";
  43. interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
  44. <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
  45. interrupt-affinity = <&CA7_0>, <&CA7_1>;
  46. };
  47. clocks: clocks {
  48. periph_clk: periph-clk {
  49. compatible = "fixed-clock";
  50. #clock-cells = <0>;
  51. clock-frequency = <200000000>;
  52. };
  53. };
  54. psci {
  55. compatible = "arm,psci-0.2";
  56. method = "smc";
  57. };
  58. axi@81000000 {
  59. compatible = "simple-bus";
  60. #address-cells = <1>;
  61. #size-cells = <1>;
  62. ranges = <0 0x81000000 0x8000>;
  63. gic: interrupt-controller@1000 {
  64. compatible = "arm,cortex-a7-gic";
  65. #interrupt-cells = <3>;
  66. interrupt-controller;
  67. interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
  68. reg = <0x1000 0x1000>,
  69. <0x2000 0x2000>,
  70. <0x4000 0x2000>,
  71. <0x6000 0x2000>;
  72. };
  73. };
  74. bus@ff800000 {
  75. compatible = "simple-bus";
  76. #address-cells = <1>;
  77. #size-cells = <1>;
  78. ranges = <0 0xff800000 0x800000>;
  79. uart0: serial@640 {
  80. compatible = "brcm,bcm6345-uart";
  81. reg = <0x640 0x1b>;
  82. interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
  83. clocks = <&periph_clk>;
  84. clock-names = "refclk";
  85. status = "disabled";
  86. };
  87. };
  88. };