at91sam9x5_usart3.dtsi 1.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * at91sam9x5_usart3.dtsi - Device Tree Include file for AT91SAM9x5 SoC with
  4. * 4 USART.
  5. *
  6. * Copyright (C) 2013 Boris BREZILLON <[email protected]>
  7. */
  8. #include <dt-bindings/pinctrl/at91.h>
  9. #include <dt-bindings/interrupt-controller/irq.h>
  10. #include <dt-bindings/mfd/at91-usart.h>
  11. / {
  12. aliases {
  13. serial4 = &usart3;
  14. };
  15. ahb {
  16. apb {
  17. pinctrl@fffff400 {
  18. usart3 {
  19. pinctrl_usart3: usart3-0 {
  20. atmel,pins =
  21. <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE
  22. AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
  23. };
  24. pinctrl_usart3_rts: usart3_rts-0 {
  25. atmel,pins =
  26. <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
  27. };
  28. pinctrl_usart3_cts: usart3_cts-0 {
  29. atmel,pins =
  30. <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
  31. };
  32. pinctrl_usart3_sck: usart3_sck-0 {
  33. atmel,pins =
  34. <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC26 periph B */
  35. };
  36. };
  37. };
  38. usart3: serial@f8028000 {
  39. compatible = "atmel,at91sam9260-usart";
  40. reg = <0xf8028000 0x200>;
  41. atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
  42. interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
  43. pinctrl-names = "default";
  44. pinctrl-0 = <&pinctrl_usart3>;
  45. dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(14)>,
  46. <&dma1 1 (AT91_DMA_CFG_PER_ID(15) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
  47. dma-names = "tx", "rx";
  48. clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
  49. clock-names = "usart";
  50. status = "disabled";
  51. };
  52. };
  53. };
  54. };