at91sam9rl.dtsi 23 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
  4. *
  5. * Copyright (C) 2014 Microchip
  6. * Alexandre Belloni <[email protected]>
  7. */
  8. #include <dt-bindings/pinctrl/at91.h>
  9. #include <dt-bindings/clock/at91.h>
  10. #include <dt-bindings/interrupt-controller/irq.h>
  11. #include <dt-bindings/gpio/gpio.h>
  12. #include <dt-bindings/pwm/pwm.h>
  13. #include <dt-bindings/mfd/at91-usart.h>
  14. / {
  15. #address-cells = <1>;
  16. #size-cells = <1>;
  17. model = "Atmel AT91SAM9RL family SoC";
  18. compatible = "atmel,at91sam9rl", "atmel,at91sam9";
  19. interrupt-parent = <&aic>;
  20. aliases {
  21. serial0 = &dbgu;
  22. serial1 = &usart0;
  23. serial2 = &usart1;
  24. serial3 = &usart2;
  25. serial4 = &usart3;
  26. gpio0 = &pioA;
  27. gpio1 = &pioB;
  28. gpio2 = &pioC;
  29. gpio3 = &pioD;
  30. tcb0 = &tcb0;
  31. i2c0 = &i2c0;
  32. i2c1 = &i2c1;
  33. ssc0 = &ssc0;
  34. ssc1 = &ssc1;
  35. pwm0 = &pwm0;
  36. };
  37. cpus {
  38. #address-cells = <1>;
  39. #size-cells = <0>;
  40. cpu@0 {
  41. compatible = "arm,arm926ej-s";
  42. device_type = "cpu";
  43. reg = <0>;
  44. };
  45. };
  46. memory@20000000 {
  47. device_type = "memory";
  48. reg = <0x20000000 0x04000000>;
  49. };
  50. clocks {
  51. slow_xtal: slow_xtal {
  52. compatible = "fixed-clock";
  53. #clock-cells = <0>;
  54. clock-frequency = <0>;
  55. };
  56. main_xtal: main_xtal {
  57. compatible = "fixed-clock";
  58. #clock-cells = <0>;
  59. clock-frequency = <0>;
  60. };
  61. adc_op_clk: adc_op_clk{
  62. compatible = "fixed-clock";
  63. #clock-cells = <0>;
  64. clock-frequency = <1000000>;
  65. };
  66. };
  67. sram: sram@300000 {
  68. compatible = "mmio-sram";
  69. reg = <0x00300000 0x10000>;
  70. #address-cells = <1>;
  71. #size-cells = <1>;
  72. ranges = <0 0x00300000 0x10000>;
  73. };
  74. ahb {
  75. compatible = "simple-bus";
  76. #address-cells = <1>;
  77. #size-cells = <1>;
  78. ranges;
  79. fb0: fb@500000 {
  80. compatible = "atmel,at91sam9rl-lcdc";
  81. reg = <0x00500000 0x1000>;
  82. interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
  83. pinctrl-names = "default";
  84. pinctrl-0 = <&pinctrl_fb>;
  85. clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>;
  86. clock-names = "hclk", "lcdc_clk";
  87. status = "disabled";
  88. };
  89. ebi: ebi@10000000 {
  90. compatible = "atmel,at91sam9rl-ebi";
  91. #address-cells = <2>;
  92. #size-cells = <1>;
  93. atmel,smc = <&smc>;
  94. atmel,matrix = <&matrix>;
  95. reg = <0x10000000 0x80000000>;
  96. ranges = <0x0 0x0 0x10000000 0x10000000
  97. 0x1 0x0 0x20000000 0x10000000
  98. 0x2 0x0 0x30000000 0x10000000
  99. 0x3 0x0 0x40000000 0x10000000
  100. 0x4 0x0 0x50000000 0x10000000
  101. 0x5 0x0 0x60000000 0x10000000>;
  102. clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
  103. status = "disabled";
  104. nand_controller: nand-controller {
  105. compatible = "atmel,at91sam9g45-nand-controller";
  106. #address-cells = <2>;
  107. #size-cells = <1>;
  108. ranges;
  109. status = "disabled";
  110. };
  111. };
  112. apb {
  113. compatible = "simple-bus";
  114. #address-cells = <1>;
  115. #size-cells = <1>;
  116. ranges;
  117. tcb0: timer@fffa0000 {
  118. compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
  119. #address-cells = <1>;
  120. #size-cells = <0>;
  121. reg = <0xfffa0000 0x100>;
  122. interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>,
  123. <17 IRQ_TYPE_LEVEL_HIGH 0>,
  124. <18 IRQ_TYPE_LEVEL_HIGH 0>;
  125. clocks = <&pmc PMC_TYPE_PERIPHERAL 16>, <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>;
  126. clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
  127. };
  128. mmc0: mmc@fffa4000 {
  129. compatible = "atmel,hsmci";
  130. reg = <0xfffa4000 0x600>;
  131. interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
  132. #address-cells = <1>;
  133. #size-cells = <0>;
  134. pinctrl-names = "default";
  135. clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
  136. clock-names = "mci_clk";
  137. status = "disabled";
  138. };
  139. i2c0: i2c@fffa8000 {
  140. compatible = "atmel,at91sam9260-i2c";
  141. reg = <0xfffa8000 0x100>;
  142. interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
  143. #address-cells = <1>;
  144. #size-cells = <0>;
  145. clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
  146. status = "disabled";
  147. };
  148. i2c1: i2c@fffac000 {
  149. compatible = "atmel,at91sam9260-i2c";
  150. reg = <0xfffac000 0x100>;
  151. interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
  152. #address-cells = <1>;
  153. #size-cells = <0>;
  154. status = "disabled";
  155. };
  156. usart0: serial@fffb0000 {
  157. compatible = "atmel,at91sam9260-usart";
  158. reg = <0xfffb0000 0x200>;
  159. atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
  160. interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
  161. atmel,use-dma-rx;
  162. atmel,use-dma-tx;
  163. pinctrl-names = "default";
  164. pinctrl-0 = <&pinctrl_usart0>;
  165. clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
  166. clock-names = "usart";
  167. status = "disabled";
  168. };
  169. usart1: serial@fffb4000 {
  170. compatible = "atmel,at91sam9260-usart";
  171. reg = <0xfffb4000 0x200>;
  172. atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
  173. interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
  174. atmel,use-dma-rx;
  175. atmel,use-dma-tx;
  176. pinctrl-names = "default";
  177. pinctrl-0 = <&pinctrl_usart1>;
  178. clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
  179. clock-names = "usart";
  180. status = "disabled";
  181. };
  182. usart2: serial@fffb8000 {
  183. compatible = "atmel,at91sam9260-usart";
  184. reg = <0xfffb8000 0x200>;
  185. atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
  186. interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
  187. atmel,use-dma-rx;
  188. atmel,use-dma-tx;
  189. pinctrl-names = "default";
  190. pinctrl-0 = <&pinctrl_usart2>;
  191. clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
  192. clock-names = "usart";
  193. status = "disabled";
  194. };
  195. usart3: serial@fffbc000 {
  196. compatible = "atmel,at91sam9260-usart";
  197. reg = <0xfffbc000 0x200>;
  198. atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
  199. interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
  200. atmel,use-dma-rx;
  201. atmel,use-dma-tx;
  202. pinctrl-names = "default";
  203. pinctrl-0 = <&pinctrl_usart3>;
  204. clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
  205. clock-names = "usart";
  206. status = "disabled";
  207. };
  208. ssc0: ssc@fffc0000 {
  209. compatible = "atmel,at91sam9rl-ssc";
  210. reg = <0xfffc0000 0x4000>;
  211. interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
  212. pinctrl-names = "default";
  213. pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
  214. status = "disabled";
  215. };
  216. ssc1: ssc@fffc4000 {
  217. compatible = "atmel,at91sam9rl-ssc";
  218. reg = <0xfffc4000 0x4000>;
  219. interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
  220. pinctrl-names = "default";
  221. pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
  222. status = "disabled";
  223. };
  224. pwm0: pwm@fffc8000 {
  225. compatible = "atmel,at91sam9rl-pwm";
  226. reg = <0xfffc8000 0x300>;
  227. interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
  228. #pwm-cells = <3>;
  229. clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
  230. clock-names = "pwm_clk";
  231. status = "disabled";
  232. };
  233. spi0: spi@fffcc000 {
  234. #address-cells = <1>;
  235. #size-cells = <0>;
  236. compatible = "atmel,at91rm9200-spi";
  237. reg = <0xfffcc000 0x200>;
  238. interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
  239. pinctrl-names = "default";
  240. pinctrl-0 = <&pinctrl_spi0>;
  241. clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
  242. clock-names = "spi_clk";
  243. status = "disabled";
  244. };
  245. adc0: adc@fffd0000 {
  246. compatible = "atmel,at91sam9rl-adc";
  247. reg = <0xfffd0000 0x100>;
  248. interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
  249. clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&adc_op_clk>;
  250. clock-names = "adc_clk", "adc_op_clk";
  251. atmel,adc-use-external-triggers;
  252. atmel,adc-channels-used = <0x3f>;
  253. atmel,adc-vref = <3300>;
  254. atmel,adc-startup-time = <40>;
  255. };
  256. usb0: gadget@fffd4000 {
  257. compatible = "atmel,at91sam9rl-udc";
  258. reg = <0x00600000 0x100000>,
  259. <0xfffd4000 0x4000>;
  260. interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
  261. clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
  262. clock-names = "pclk", "hclk";
  263. status = "disabled";
  264. };
  265. dma0: dma-controller@ffffe600 {
  266. compatible = "atmel,at91sam9rl-dma";
  267. reg = <0xffffe600 0x200>;
  268. interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
  269. #dma-cells = <2>;
  270. clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
  271. clock-names = "dma_clk";
  272. };
  273. ramc0: ramc@ffffea00 {
  274. compatible = "atmel,at91sam9260-sdramc";
  275. reg = <0xffffea00 0x200>;
  276. };
  277. smc: smc@ffffec00 {
  278. compatible = "atmel,at91sam9260-smc", "syscon";
  279. reg = <0xffffec00 0x200>;
  280. };
  281. matrix: matrix@ffffee00 {
  282. compatible = "atmel,at91sam9rl-matrix", "syscon";
  283. reg = <0xffffee00 0x200>;
  284. };
  285. aic: interrupt-controller@fffff000 {
  286. #interrupt-cells = <3>;
  287. compatible = "atmel,at91rm9200-aic";
  288. interrupt-controller;
  289. reg = <0xfffff000 0x200>;
  290. atmel,external-irqs = <31>;
  291. };
  292. dbgu: serial@fffff200 {
  293. compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
  294. reg = <0xfffff200 0x200>;
  295. atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
  296. interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
  297. pinctrl-names = "default";
  298. pinctrl-0 = <&pinctrl_dbgu>;
  299. clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
  300. clock-names = "usart";
  301. status = "disabled";
  302. };
  303. pinctrl@fffff400 {
  304. #address-cells = <1>;
  305. #size-cells = <1>;
  306. compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
  307. ranges = <0xfffff400 0xfffff400 0x800>;
  308. atmel,mux-mask =
  309. /* A B */
  310. <0xffffffff 0xe05c6738>, /* pioA */
  311. <0xffffffff 0x0000c780>, /* pioB */
  312. <0xffffffff 0xe3ffff0e>, /* pioC */
  313. <0x003fffff 0x0001ff3c>; /* pioD */
  314. /* shared pinctrl settings */
  315. adc0 {
  316. pinctrl_adc0_ts: adc0_ts-0 {
  317. atmel,pins =
  318. <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  319. <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  320. <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  321. <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  322. };
  323. pinctrl_adc0_ad0: adc0_ad0-0 {
  324. atmel,pins = <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  325. };
  326. pinctrl_adc0_ad1: adc0_ad1-0 {
  327. atmel,pins = <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  328. };
  329. pinctrl_adc0_ad2: adc0_ad2-0 {
  330. atmel,pins = <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  331. };
  332. pinctrl_adc0_ad3: adc0_ad3-0 {
  333. atmel,pins = <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  334. };
  335. pinctrl_adc0_ad4: adc0_ad4-0 {
  336. atmel,pins = <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  337. };
  338. pinctrl_adc0_ad5: adc0_ad5-0 {
  339. atmel,pins = <AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  340. };
  341. pinctrl_adc0_adtrg: adc0_adtrg-0 {
  342. atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  343. };
  344. };
  345. dbgu {
  346. pinctrl_dbgu: dbgu-0 {
  347. atmel,pins =
  348. <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
  349. <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  350. };
  351. };
  352. ebi {
  353. pinctrl_ebi_addr_nand: ebi-addr-0 {
  354. atmel,pins =
  355. <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  356. <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  357. };
  358. };
  359. fb {
  360. pinctrl_fb: fb-0 {
  361. atmel,pins =
  362. <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  363. <AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  364. <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  365. <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  366. <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  367. <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  368. <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  369. <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  370. <AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  371. <AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  372. <AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  373. <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  374. <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  375. <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  376. <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  377. <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  378. <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  379. <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  380. <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  381. <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  382. <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  383. };
  384. };
  385. i2c_gpio0 {
  386. pinctrl_i2c_gpio0: i2c_gpio0-0 {
  387. atmel,pins =
  388. <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
  389. <AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
  390. };
  391. };
  392. i2c_gpio1 {
  393. pinctrl_i2c_gpio1: i2c_gpio1-0 {
  394. atmel,pins =
  395. <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
  396. <AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
  397. };
  398. };
  399. mmc0 {
  400. pinctrl_mmc0_clk: mmc0_clk-0 {
  401. atmel,pins =
  402. <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  403. };
  404. pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
  405. atmel,pins =
  406. <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
  407. <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
  408. };
  409. pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
  410. atmel,pins =
  411. <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
  412. <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
  413. <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
  414. };
  415. };
  416. nand {
  417. pinctrl_nand_rb: nand-rb-0 {
  418. atmel,pins =
  419. <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
  420. };
  421. pinctrl_nand_cs: nand-cs-0 {
  422. atmel,pins =
  423. <AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
  424. };
  425. pinctrl_nand_oe_we: nand-oe-we-0 {
  426. atmel,pins =
  427. <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  428. <AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  429. };
  430. };
  431. pwm0 {
  432. pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
  433. atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  434. };
  435. pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
  436. atmel,pins = <AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  437. };
  438. pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
  439. atmel,pins = <AT91_PIOD 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  440. };
  441. pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
  442. atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  443. };
  444. pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
  445. atmel,pins = <AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  446. };
  447. pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
  448. atmel,pins = <AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  449. };
  450. pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
  451. atmel,pins = <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  452. };
  453. pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
  454. atmel,pins = <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  455. };
  456. pinctrl_pwm0_pwm2_2: pwm0_pwm2-2 {
  457. atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  458. };
  459. pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
  460. atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  461. };
  462. pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
  463. atmel,pins = <AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  464. };
  465. };
  466. spi0 {
  467. pinctrl_spi0: spi0-0 {
  468. atmel,pins =
  469. <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  470. <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  471. <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  472. };
  473. };
  474. ssc0 {
  475. pinctrl_ssc0_tx: ssc0_tx-0 {
  476. atmel,pins =
  477. <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  478. <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  479. <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  480. };
  481. pinctrl_ssc0_rx: ssc0_rx-0 {
  482. atmel,pins =
  483. <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  484. <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  485. <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  486. };
  487. };
  488. ssc1 {
  489. pinctrl_ssc1_tx: ssc1_tx-0 {
  490. atmel,pins =
  491. <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  492. <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  493. <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  494. };
  495. pinctrl_ssc1_rx: ssc1_rx-0 {
  496. atmel,pins =
  497. <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  498. <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  499. <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  500. };
  501. };
  502. tcb0 {
  503. pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
  504. atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  505. };
  506. pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
  507. atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  508. };
  509. pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
  510. atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  511. };
  512. pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
  513. atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  514. };
  515. pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
  516. atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  517. };
  518. pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
  519. atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  520. };
  521. pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
  522. atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  523. };
  524. pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
  525. atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  526. };
  527. pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
  528. atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  529. };
  530. };
  531. usart0 {
  532. pinctrl_usart0: usart0-0 {
  533. atmel,pins =
  534. <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
  535. <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
  536. };
  537. pinctrl_usart0_rts: usart0_rts-0 {
  538. atmel,pins =
  539. <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  540. };
  541. pinctrl_usart0_cts: usart0_cts-0 {
  542. atmel,pins =
  543. <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  544. };
  545. pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
  546. atmel,pins =
  547. <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  548. <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  549. };
  550. pinctrl_usart0_dcd: usart0_dcd-0 {
  551. atmel,pins =
  552. <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  553. };
  554. pinctrl_usart0_ri: usart0_ri-0 {
  555. atmel,pins =
  556. <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  557. };
  558. pinctrl_usart0_sck: usart0_sck-0 {
  559. atmel,pins =
  560. <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  561. };
  562. };
  563. usart1 {
  564. pinctrl_usart1: usart1-0 {
  565. atmel,pins =
  566. <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
  567. <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
  568. };
  569. pinctrl_usart1_rts: usart1_rts-0 {
  570. atmel,pins =
  571. <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  572. };
  573. pinctrl_usart1_cts: usart1_cts-0 {
  574. atmel,pins =
  575. <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  576. };
  577. pinctrl_usart1_sck: usart1_sck-0 {
  578. atmel,pins =
  579. <AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  580. };
  581. };
  582. usart2 {
  583. pinctrl_usart2: usart2-0 {
  584. atmel,pins =
  585. <AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
  586. <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
  587. };
  588. pinctrl_usart2_rts: usart2_rts-0 {
  589. atmel,pins =
  590. <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  591. };
  592. pinctrl_usart2_cts: usart2_cts-0 {
  593. atmel,pins =
  594. <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  595. };
  596. pinctrl_usart2_sck: usart2_sck-0 {
  597. atmel,pins =
  598. <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  599. };
  600. };
  601. usart3 {
  602. pinctrl_usart3: usart3-0 {
  603. atmel,pins =
  604. <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
  605. <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
  606. };
  607. pinctrl_usart3_rts: usart3_rts-0 {
  608. atmel,pins =
  609. <AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  610. };
  611. pinctrl_usart3_cts: usart3_cts-0 {
  612. atmel,pins =
  613. <AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  614. };
  615. pinctrl_usart3_sck: usart3_sck-0 {
  616. atmel,pins =
  617. <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  618. };
  619. };
  620. pioA: gpio@fffff400 {
  621. compatible = "atmel,at91rm9200-gpio";
  622. reg = <0xfffff400 0x200>;
  623. interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
  624. #gpio-cells = <2>;
  625. gpio-controller;
  626. interrupt-controller;
  627. #interrupt-cells = <2>;
  628. clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
  629. };
  630. pioB: gpio@fffff600 {
  631. compatible = "atmel,at91rm9200-gpio";
  632. reg = <0xfffff600 0x200>;
  633. interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
  634. #gpio-cells = <2>;
  635. gpio-controller;
  636. interrupt-controller;
  637. #interrupt-cells = <2>;
  638. clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
  639. };
  640. pioC: gpio@fffff800 {
  641. compatible = "atmel,at91rm9200-gpio";
  642. reg = <0xfffff800 0x200>;
  643. interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
  644. #gpio-cells = <2>;
  645. gpio-controller;
  646. interrupt-controller;
  647. #interrupt-cells = <2>;
  648. clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
  649. };
  650. pioD: gpio@fffffa00 {
  651. compatible = "atmel,at91rm9200-gpio";
  652. reg = <0xfffffa00 0x200>;
  653. interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
  654. #gpio-cells = <2>;
  655. gpio-controller;
  656. interrupt-controller;
  657. #interrupt-cells = <2>;
  658. clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
  659. };
  660. };
  661. pmc: pmc@fffffc00 {
  662. compatible = "atmel,at91sam9rl-pmc", "syscon";
  663. reg = <0xfffffc00 0x100>;
  664. interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
  665. #clock-cells = <2>;
  666. clocks = <&clk32k>, <&main_xtal>;
  667. clock-names = "slow_clk", "main_xtal";
  668. };
  669. reset-controller@fffffd00 {
  670. compatible = "atmel,at91sam9260-rstc";
  671. reg = <0xfffffd00 0x10>;
  672. clocks = <&clk32k>;
  673. };
  674. shdwc@fffffd10 {
  675. compatible = "atmel,at91sam9260-shdwc";
  676. reg = <0xfffffd10 0x10>;
  677. clocks = <&clk32k>;
  678. };
  679. pit: timer@fffffd30 {
  680. compatible = "atmel,at91sam9260-pit";
  681. reg = <0xfffffd30 0xf>;
  682. interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
  683. clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
  684. };
  685. watchdog@fffffd40 {
  686. compatible = "atmel,at91sam9260-wdt";
  687. reg = <0xfffffd40 0x10>;
  688. interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
  689. clocks = <&clk32k>;
  690. status = "disabled";
  691. };
  692. clk32k: sckc@fffffd50 {
  693. compatible = "atmel,at91sam9x5-sckc";
  694. reg = <0xfffffd50 0x4>;
  695. clocks = <&slow_xtal>;
  696. #clock-cells = <0>;
  697. };
  698. rtc@fffffd20 {
  699. compatible = "atmel,at91sam9260-rtt";
  700. reg = <0xfffffd20 0x10>;
  701. interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
  702. clocks = <&clk32k>;
  703. status = "disabled";
  704. };
  705. gpbr: syscon@fffffd60 {
  706. compatible = "atmel,at91sam9260-gpbr", "syscon";
  707. reg = <0xfffffd60 0x10>;
  708. status = "disabled";
  709. };
  710. rtc@fffffe00 {
  711. compatible = "atmel,at91rm9200-rtc";
  712. reg = <0xfffffe00 0x40>;
  713. interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
  714. clocks = <&clk32k>;
  715. status = "disabled";
  716. };
  717. };
  718. };
  719. i2c-gpio-0 {
  720. compatible = "i2c-gpio";
  721. gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */
  722. <&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */
  723. i2c-gpio,sda-open-drain;
  724. i2c-gpio,scl-open-drain;
  725. i2c-gpio,delay-us = <2>; /* ~100 kHz */
  726. #address-cells = <1>;
  727. #size-cells = <0>;
  728. pinctrl-names = "default";
  729. pinctrl-0 = <&pinctrl_i2c_gpio0>;
  730. status = "disabled";
  731. };
  732. i2c-gpio-1 {
  733. compatible = "i2c-gpio";
  734. gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */
  735. <&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */
  736. i2c-gpio,sda-open-drain;
  737. i2c-gpio,scl-open-drain;
  738. i2c-gpio,delay-us = <2>; /* ~100 kHz */
  739. #address-cells = <1>;
  740. #size-cells = <0>;
  741. pinctrl-names = "default";
  742. pinctrl-0 = <&pinctrl_i2c_gpio1>;
  743. status = "disabled";
  744. };
  745. };