aspeed-bmc-opp-swift.dts 15 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /dts-v1/;
  3. #include "aspeed-g5.dtsi"
  4. #include <dt-bindings/gpio/aspeed-gpio.h>
  5. #include <dt-bindings/leds/leds-pca955x.h>
  6. / {
  7. model = "Swift BMC";
  8. compatible = "ibm,swift-bmc", "aspeed,ast2500";
  9. chosen {
  10. stdout-path = &uart5;
  11. bootargs = "console=ttyS4,115200 earlycon";
  12. };
  13. memory@80000000 {
  14. reg = <0x80000000 0x20000000>;
  15. };
  16. reserved-memory {
  17. #address-cells = <1>;
  18. #size-cells = <1>;
  19. ranges;
  20. flash_memory: region@98000000 {
  21. no-map;
  22. reg = <0x98000000 0x04000000>; /* 64M */
  23. };
  24. gfx_memory: framebuffer {
  25. size = <0x01000000>;
  26. alignment = <0x01000000>;
  27. compatible = "shared-dma-pool";
  28. reusable;
  29. };
  30. };
  31. gpio-keys {
  32. compatible = "gpio-keys";
  33. event-air-water {
  34. label = "air-water";
  35. gpios = <&gpio ASPEED_GPIO(B, 5) GPIO_ACTIVE_LOW>;
  36. linux,code = <ASPEED_GPIO(B, 5)>;
  37. };
  38. event-checkstop {
  39. label = "checkstop";
  40. gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
  41. linux,code = <ASPEED_GPIO(J, 2)>;
  42. };
  43. event-ps0-presence {
  44. label = "ps0-presence";
  45. gpios = <&gpio ASPEED_GPIO(R, 7) GPIO_ACTIVE_LOW>;
  46. linux,code = <ASPEED_GPIO(R, 7)>;
  47. };
  48. event-ps1-presence {
  49. label = "ps1-presence";
  50. gpios = <&gpio ASPEED_GPIO(N, 0) GPIO_ACTIVE_LOW>;
  51. linux,code = <ASPEED_GPIO(N, 0)>;
  52. };
  53. event-oppanel-presence {
  54. label = "oppanel-presence";
  55. gpios = <&gpio ASPEED_GPIO(A, 7) GPIO_ACTIVE_LOW>;
  56. linux,code = <ASPEED_GPIO(A, 7)>;
  57. };
  58. event-opencapi-riser-presence {
  59. label = "opencapi-riser-presence";
  60. gpios = <&gpio ASPEED_GPIO(I, 0) GPIO_ACTIVE_LOW>;
  61. linux,code = <ASPEED_GPIO(I, 0)>;
  62. };
  63. };
  64. iio-hwmon-battery {
  65. compatible = "iio-hwmon";
  66. io-channels = <&adc 12>;
  67. };
  68. gpio-keys-polled {
  69. compatible = "gpio-keys-polled";
  70. poll-interval = <1000>;
  71. event-scm0-presence {
  72. label = "scm0-presence";
  73. gpios = <&pca9552 6 GPIO_ACTIVE_LOW>;
  74. linux,code = <6>;
  75. };
  76. event-scm1-presence {
  77. label = "scm1-presence";
  78. gpios = <&pca9552 7 GPIO_ACTIVE_LOW>;
  79. linux,code = <7>;
  80. };
  81. event-cpu0vrm-presence {
  82. label = "cpu0vrm-presence";
  83. gpios = <&pca9552 12 GPIO_ACTIVE_LOW>;
  84. linux,code = <12>;
  85. };
  86. event-cpu1vrm-presence {
  87. label = "cpu1vrm-presence";
  88. gpios = <&pca9552 13 GPIO_ACTIVE_LOW>;
  89. linux,code = <13>;
  90. };
  91. event-fan0-presence {
  92. label = "fan0-presence";
  93. gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
  94. linux,code = <5>;
  95. };
  96. event-fan1-presence {
  97. label = "fan1-presence";
  98. gpios = <&pca0 6 GPIO_ACTIVE_LOW>;
  99. linux,code = <6>;
  100. };
  101. event-fan2-presence {
  102. label = "fan2-presence";
  103. gpios = <&pca0 7 GPIO_ACTIVE_LOW>;
  104. linux,code = <7>;
  105. };
  106. event-fan3-presence {
  107. label = "fan3-presence";
  108. gpios = <&pca0 8 GPIO_ACTIVE_LOW>;
  109. linux,code = <8>;
  110. };
  111. event-fanboost-presence {
  112. label = "fanboost-presence";
  113. gpios = <&pca0 9 GPIO_ACTIVE_LOW>;
  114. linux,code = <9>;
  115. };
  116. };
  117. leds {
  118. compatible = "gpio-leds";
  119. fan0 {
  120. retain-state-shutdown;
  121. default-state = "keep";
  122. gpios = <&pca0 0 GPIO_ACTIVE_LOW>;
  123. };
  124. fan1 {
  125. retain-state-shutdown;
  126. default-state = "keep";
  127. gpios = <&pca0 1 GPIO_ACTIVE_LOW>;
  128. };
  129. fan2 {
  130. retain-state-shutdown;
  131. default-state = "keep";
  132. gpios = <&pca0 2 GPIO_ACTIVE_LOW>;
  133. };
  134. fan3 {
  135. retain-state-shutdown;
  136. default-state = "keep";
  137. gpios = <&pca0 3 GPIO_ACTIVE_LOW>;
  138. };
  139. fanboost {
  140. retain-state-shutdown;
  141. default-state = "keep";
  142. gpios = <&pca0 4 GPIO_ACTIVE_LOW>;
  143. };
  144. front-fault {
  145. retain-state-shutdown;
  146. default-state = "keep";
  147. gpios = <&pca1 2 GPIO_ACTIVE_LOW>;
  148. };
  149. front-power {
  150. retain-state-shutdown;
  151. default-state = "keep";
  152. gpios = <&pca1 3 GPIO_ACTIVE_LOW>;
  153. };
  154. front-id {
  155. retain-state-shutdown;
  156. default-state = "keep";
  157. gpios = <&pca1 0 GPIO_ACTIVE_LOW>;
  158. };
  159. rear-fault {
  160. gpios = <&gpio ASPEED_GPIO(N, 2) GPIO_ACTIVE_LOW>;
  161. };
  162. rear-id {
  163. gpios = <&gpio ASPEED_GPIO(N, 4) GPIO_ACTIVE_LOW>;
  164. };
  165. };
  166. fsi: gpio-fsi {
  167. compatible = "fsi-master-gpio", "fsi-master";
  168. #address-cells = <2>;
  169. #size-cells = <0>;
  170. no-gpio-delays;
  171. clock-gpios = <&gpio ASPEED_GPIO(P, 1) GPIO_ACTIVE_HIGH>;
  172. data-gpios = <&gpio ASPEED_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
  173. mux-gpios = <&gpio ASPEED_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
  174. enable-gpios = <&gpio ASPEED_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
  175. trans-gpios = <&gpio ASPEED_GPIO(P, 3) GPIO_ACTIVE_HIGH>;
  176. };
  177. iio-hwmon-dps310 {
  178. compatible = "iio-hwmon";
  179. io-channels = <&dps 0>;
  180. };
  181. };
  182. &fmc {
  183. status = "okay";
  184. flash@0 {
  185. status = "okay";
  186. label = "bmc";
  187. m25p,fast-read;
  188. spi-max-frequency = <100000000>;
  189. partitions {
  190. #address-cells = < 1 >;
  191. #size-cells = < 1 >;
  192. compatible = "fixed-partitions";
  193. u-boot@0 {
  194. reg = < 0 0x60000 >;
  195. label = "u-boot";
  196. };
  197. u-boot-env@60000 {
  198. reg = < 0x60000 0x20000 >;
  199. label = "u-boot-env";
  200. };
  201. obmc-ubi@80000 {
  202. reg = < 0x80000 0x7F80000>;
  203. label = "obmc-ubi";
  204. };
  205. };
  206. };
  207. flash@1 {
  208. status = "okay";
  209. label = "alt-bmc";
  210. m25p,fast-read;
  211. spi-max-frequency = <100000000>;
  212. partitions {
  213. #address-cells = < 1 >;
  214. #size-cells = < 1 >;
  215. compatible = "fixed-partitions";
  216. u-boot@0 {
  217. reg = < 0 0x60000 >;
  218. label = "alt-u-boot";
  219. };
  220. u-boot-env@60000 {
  221. reg = < 0x60000 0x20000 >;
  222. label = "alt-u-boot-env";
  223. };
  224. obmc-ubi@80000 {
  225. reg = < 0x80000 0x7F80000>;
  226. label = "alt-obmc-ubi";
  227. };
  228. };
  229. };
  230. };
  231. &spi1 {
  232. status = "okay";
  233. pinctrl-names = "default";
  234. pinctrl-0 = <&pinctrl_spi1_default>;
  235. flash@0 {
  236. status = "okay";
  237. label = "pnor";
  238. m25p,fast-read;
  239. spi-max-frequency = <100000000>;
  240. };
  241. };
  242. &uart1 {
  243. /* Rear RS-232 connector */
  244. status = "okay";
  245. pinctrl-names = "default";
  246. pinctrl-0 = <&pinctrl_txd1_default
  247. &pinctrl_rxd1_default
  248. &pinctrl_nrts1_default
  249. &pinctrl_ndtr1_default
  250. &pinctrl_ndsr1_default
  251. &pinctrl_ncts1_default
  252. &pinctrl_ndcd1_default
  253. &pinctrl_nri1_default>;
  254. };
  255. &uart2 {
  256. /* APSS */
  257. status = "okay";
  258. pinctrl-names = "default";
  259. pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
  260. };
  261. &uart5 {
  262. status = "okay";
  263. };
  264. &lpc_ctrl {
  265. status = "okay";
  266. memory-region = <&flash_memory>;
  267. flash = <&spi1>;
  268. };
  269. &mac0 {
  270. status = "okay";
  271. pinctrl-names = "default";
  272. pinctrl-0 = <&pinctrl_rmii1_default>;
  273. use-ncsi;
  274. clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
  275. <&syscon ASPEED_CLK_MAC1RCLK>;
  276. clock-names = "MACCLK", "RCLK";
  277. };
  278. &i2c2 {
  279. status = "okay";
  280. /* MUX ->
  281. * Samtec 1
  282. * Samtec 2
  283. */
  284. };
  285. &i2c3 {
  286. status = "okay";
  287. max31785@52 {
  288. compatible = "maxim,max31785a";
  289. reg = <0x52>;
  290. #address-cells = <1>;
  291. #size-cells = <0>;
  292. fan@0 {
  293. compatible = "pmbus-fan";
  294. reg = <0>;
  295. tach-pulses = <2>;
  296. maxim,fan-rotor-input = "tach";
  297. maxim,fan-pwm-freq = <25000>;
  298. maxim,fan-no-watchdog;
  299. maxim,fan-no-fault-ramp;
  300. maxim,fan-ramp = <2>;
  301. maxim,fan-fault-pin-mon;
  302. };
  303. fan@1 {
  304. compatible = "pmbus-fan";
  305. reg = <1>;
  306. tach-pulses = <2>;
  307. maxim,fan-rotor-input = "tach";
  308. maxim,fan-pwm-freq = <25000>;
  309. maxim,fan-no-watchdog;
  310. maxim,fan-no-fault-ramp;
  311. maxim,fan-ramp = <2>;
  312. maxim,fan-fault-pin-mon;
  313. };
  314. fan@2 {
  315. compatible = "pmbus-fan";
  316. reg = <2>;
  317. tach-pulses = <2>;
  318. maxim,fan-rotor-input = "tach";
  319. maxim,fan-pwm-freq = <25000>;
  320. maxim,fan-no-watchdog;
  321. maxim,fan-no-fault-ramp;
  322. maxim,fan-ramp = <2>;
  323. maxim,fan-fault-pin-mon;
  324. };
  325. fan@3 {
  326. compatible = "pmbus-fan";
  327. reg = <3>;
  328. tach-pulses = <2>;
  329. maxim,fan-rotor-input = "tach";
  330. maxim,fan-pwm-freq = <25000>;
  331. maxim,fan-no-watchdog;
  332. maxim,fan-no-fault-ramp;
  333. maxim,fan-ramp = <2>;
  334. maxim,fan-fault-pin-mon;
  335. };
  336. fan@4 {
  337. compatible = "pmbus-fan";
  338. reg = <4>;
  339. tach-pulses = <2>;
  340. maxim,fan-rotor-input = "tach";
  341. maxim,fan-pwm-freq = <25000>;
  342. maxim,fan-no-watchdog;
  343. maxim,fan-no-fault-ramp;
  344. maxim,fan-ramp = <2>;
  345. maxim,fan-fault-pin-mon;
  346. };
  347. };
  348. pca0: pca9552@60 {
  349. compatible = "nxp,pca9552";
  350. reg = <0x60>;
  351. #address-cells = <1>;
  352. #size-cells = <0>;
  353. gpio-controller;
  354. #gpio-cells = <2>;
  355. gpio@0 {
  356. reg = <0>;
  357. type = <PCA955X_TYPE_GPIO>;
  358. };
  359. gpio@1 {
  360. reg = <1>;
  361. type = <PCA955X_TYPE_GPIO>;
  362. };
  363. gpio@2 {
  364. reg = <2>;
  365. type = <PCA955X_TYPE_GPIO>;
  366. };
  367. gpio@3 {
  368. reg = <3>;
  369. type = <PCA955X_TYPE_GPIO>;
  370. };
  371. gpio@4 {
  372. reg = <4>;
  373. type = <PCA955X_TYPE_GPIO>;
  374. };
  375. gpio@5 {
  376. reg = <5>;
  377. type = <PCA955X_TYPE_GPIO>;
  378. };
  379. gpio@6 {
  380. reg = <6>;
  381. type = <PCA955X_TYPE_GPIO>;
  382. };
  383. gpio@7 {
  384. reg = <7>;
  385. type = <PCA955X_TYPE_GPIO>;
  386. };
  387. gpio@8 {
  388. reg = <8>;
  389. type = <PCA955X_TYPE_GPIO>;
  390. };
  391. gpio@9 {
  392. reg = <9>;
  393. type = <PCA955X_TYPE_GPIO>;
  394. };
  395. gpio@10 {
  396. reg = <10>;
  397. type = <PCA955X_TYPE_GPIO>;
  398. };
  399. gpio@11 {
  400. reg = <11>;
  401. type = <PCA955X_TYPE_GPIO>;
  402. };
  403. gpio@12 {
  404. reg = <12>;
  405. type = <PCA955X_TYPE_GPIO>;
  406. };
  407. gpio@13 {
  408. reg = <13>;
  409. type = <PCA955X_TYPE_GPIO>;
  410. };
  411. gpio@14 {
  412. reg = <14>;
  413. type = <PCA955X_TYPE_GPIO>;
  414. };
  415. gpio@15 {
  416. reg = <15>;
  417. type = <PCA955X_TYPE_GPIO>;
  418. };
  419. };
  420. power-supply@68 {
  421. compatible = "ibm,cffps2";
  422. reg = <0x68>;
  423. };
  424. eeprom@50 {
  425. compatible = "atmel,24c64";
  426. reg = <0x50>;
  427. };
  428. power-supply@69 {
  429. compatible = "ibm,cffps2";
  430. reg = <0x69>;
  431. };
  432. eeprom@51 {
  433. compatible = "atmel,24c64";
  434. reg = <0x51>;
  435. };
  436. };
  437. &i2c7 {
  438. status = "okay";
  439. dps: dps310@76 {
  440. compatible = "infineon,dps310";
  441. reg = <0x76>;
  442. #io-channel-cells = <0>;
  443. };
  444. tmp275@48 {
  445. compatible = "ti,tmp275";
  446. reg = <0x48>;
  447. };
  448. si7021a20@20 {
  449. compatible = "si,si7021a20";
  450. reg = <0x20>;
  451. };
  452. eeprom@50 {
  453. compatible = "atmel,24c64";
  454. reg = <0x50>;
  455. };
  456. pca1: pca9551@60 {
  457. compatible = "nxp,pca9551";
  458. reg = <0x60>;
  459. #address-cells = <1>;
  460. #size-cells = <0>;
  461. gpio-controller;
  462. #gpio-cells = <2>;
  463. gpio@0 {
  464. reg = <0>;
  465. type = <PCA955X_TYPE_GPIO>;
  466. };
  467. gpio@1 {
  468. reg = <1>;
  469. type = <PCA955X_TYPE_GPIO>;
  470. };
  471. gpio@2 {
  472. reg = <2>;
  473. type = <PCA955X_TYPE_GPIO>;
  474. };
  475. gpio@3 {
  476. reg = <3>;
  477. type = <PCA955X_TYPE_GPIO>;
  478. };
  479. gpio@4 {
  480. reg = <4>;
  481. type = <PCA955X_TYPE_GPIO>;
  482. };
  483. gpio@5 {
  484. reg = <5>;
  485. type = <PCA955X_TYPE_GPIO>;
  486. };
  487. gpio@6 {
  488. reg = <6>;
  489. type = <PCA955X_TYPE_GPIO>;
  490. };
  491. gpio@7 {
  492. reg = <7>;
  493. type = <PCA955X_TYPE_GPIO>;
  494. };
  495. };
  496. };
  497. &i2c8 {
  498. status = "okay";
  499. pca9552: pca9552@60 {
  500. compatible = "nxp,pca9552";
  501. reg = <0x60>;
  502. #address-cells = <1>;
  503. #size-cells = <0>;
  504. gpio-controller;
  505. #gpio-cells = <2>;
  506. gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N",
  507. "GPU0_TH_OVERT_N_BUFF", "GPU1_TH_OVERT_N_BUFF",
  508. "GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF",
  509. "P9_SCM0_PRES", "P9_SCM1_PRES",
  510. "GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF",
  511. "GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF",
  512. "PRESENT_VRM_CP0_N", "PRESENT_VRM_CP1_N",
  513. "12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N";
  514. gpio@0 {
  515. reg = <0>;
  516. type = <PCA955X_TYPE_GPIO>;
  517. };
  518. gpio@1 {
  519. reg = <1>;
  520. type = <PCA955X_TYPE_GPIO>;
  521. };
  522. gpio@2 {
  523. reg = <2>;
  524. type = <PCA955X_TYPE_GPIO>;
  525. };
  526. gpio@3 {
  527. reg = <3>;
  528. type = <PCA955X_TYPE_GPIO>;
  529. };
  530. gpio@4 {
  531. reg = <4>;
  532. type = <PCA955X_TYPE_GPIO>;
  533. };
  534. gpio@5 {
  535. reg = <5>;
  536. type = <PCA955X_TYPE_GPIO>;
  537. };
  538. gpio@6 {
  539. reg = <6>;
  540. type = <PCA955X_TYPE_GPIO>;
  541. };
  542. gpio@7 {
  543. reg = <7>;
  544. type = <PCA955X_TYPE_GPIO>;
  545. };
  546. gpio@8 {
  547. reg = <8>;
  548. type = <PCA955X_TYPE_GPIO>;
  549. };
  550. gpio@9 {
  551. reg = <9>;
  552. type = <PCA955X_TYPE_GPIO>;
  553. };
  554. gpio@10 {
  555. reg = <10>;
  556. type = <PCA955X_TYPE_GPIO>;
  557. };
  558. gpio@11 {
  559. reg = <11>;
  560. type = <PCA955X_TYPE_GPIO>;
  561. };
  562. gpio@12 {
  563. reg = <12>;
  564. type = <PCA955X_TYPE_GPIO>;
  565. };
  566. gpio@13 {
  567. reg = <13>;
  568. type = <PCA955X_TYPE_GPIO>;
  569. };
  570. gpio@14 {
  571. reg = <14>;
  572. type = <PCA955X_TYPE_GPIO>;
  573. };
  574. gpio@15 {
  575. reg = <15>;
  576. type = <PCA955X_TYPE_GPIO>;
  577. };
  578. };
  579. rtc@32 {
  580. compatible = "epson,rx8900";
  581. reg = <0x32>;
  582. };
  583. eeprom@51 {
  584. compatible = "atmel,24c64";
  585. reg = <0x51>;
  586. };
  587. ucd90160@64 {
  588. compatible = "ti,ucd90160";
  589. reg = <0x64>;
  590. };
  591. };
  592. &i2c9 {
  593. status = "okay";
  594. eeprom@50 {
  595. compatible = "atmel,24c64";
  596. reg = <0x50>;
  597. };
  598. tmp423a@4c {
  599. compatible = "ti,tmp423";
  600. reg = <0x4c>;
  601. };
  602. ir35221@71 {
  603. compatible = "infineon,ir35221";
  604. reg = <0x71>;
  605. };
  606. ir35221@72 {
  607. compatible = "infineon,ir35221";
  608. reg = <0x72>;
  609. };
  610. pca2: pca9539@74 {
  611. compatible = "nxp,pca9539";
  612. reg = <0x74>;
  613. #address-cells = <1>;
  614. #size-cells = <0>;
  615. gpio-controller;
  616. #gpio-cells = <2>;
  617. gpio@0 {
  618. reg = <0>;
  619. };
  620. gpio@1 {
  621. reg = <1>;
  622. };
  623. gpio@2 {
  624. reg = <2>;
  625. };
  626. gpio@3 {
  627. reg = <3>;
  628. };
  629. gpio@4 {
  630. reg = <4>;
  631. };
  632. gpio@5 {
  633. reg = <5>;
  634. };
  635. gpio@6 {
  636. reg = <6>;
  637. };
  638. gpio@7 {
  639. reg = <7>;
  640. };
  641. gpio@8 {
  642. reg = <8>;
  643. };
  644. gpio@9 {
  645. reg = <9>;
  646. };
  647. gpio@10 {
  648. reg = <10>;
  649. };
  650. gpio@11 {
  651. reg = <11>;
  652. };
  653. gpio@12 {
  654. reg = <12>;
  655. };
  656. gpio@13 {
  657. reg = <13>;
  658. };
  659. gpio@14 {
  660. reg = <14>;
  661. };
  662. gpio@15 {
  663. reg = <15>;
  664. };
  665. };
  666. };
  667. &i2c10 {
  668. status = "okay";
  669. eeprom@50 {
  670. compatible = "atmel,24c64";
  671. reg = <0x50>;
  672. };
  673. tmp423a@4c {
  674. compatible = "ti,tmp423";
  675. reg = <0x4c>;
  676. };
  677. ir35221@71 {
  678. compatible = "infineon,ir35221";
  679. reg = <0x71>;
  680. };
  681. ir35221@72 {
  682. compatible = "infineon,ir35221";
  683. reg = <0x72>;
  684. };
  685. pca3: pca9539@74 {
  686. compatible = "nxp,pca9539";
  687. reg = <0x74>;
  688. #address-cells = <1>;
  689. #size-cells = <0>;
  690. gpio-controller;
  691. #gpio-cells = <2>;
  692. gpio@0 {
  693. reg = <0>;
  694. };
  695. gpio@1 {
  696. reg = <1>;
  697. };
  698. gpio@2 {
  699. reg = <2>;
  700. };
  701. gpio@3 {
  702. reg = <3>;
  703. };
  704. gpio@4 {
  705. reg = <4>;
  706. };
  707. gpio@5 {
  708. reg = <5>;
  709. };
  710. gpio@6 {
  711. reg = <6>;
  712. };
  713. gpio@7 {
  714. reg = <7>;
  715. };
  716. gpio@8 {
  717. reg = <8>;
  718. };
  719. gpio@9 {
  720. reg = <9>;
  721. };
  722. gpio@10 {
  723. reg = <10>;
  724. };
  725. gpio@11 {
  726. reg = <11>;
  727. };
  728. gpio@12 {
  729. reg = <12>;
  730. };
  731. gpio@13 {
  732. reg = <13>;
  733. };
  734. gpio@14 {
  735. reg = <14>;
  736. };
  737. gpio@15 {
  738. reg = <15>;
  739. };
  740. };
  741. };
  742. &i2c11 {
  743. /* MUX
  744. * -> PCIe Slot 0
  745. * -> PCIe Slot 1
  746. * -> PCIe Slot 2
  747. * -> PCIe Slot 3
  748. */
  749. status = "okay";
  750. };
  751. &i2c12 {
  752. status = "okay";
  753. tmp275@48 {
  754. compatible = "ti,tmp275";
  755. reg = <0x48>;
  756. };
  757. tmp275@4a {
  758. compatible = "ti,tmp275";
  759. reg = <0x4a>;
  760. };
  761. };
  762. &i2c13 {
  763. status = "okay";
  764. };
  765. &vuart {
  766. status = "okay";
  767. };
  768. &gfx {
  769. status = "okay";
  770. memory-region = <&gfx_memory>;
  771. };
  772. &pinctrl {
  773. aspeed,external-nodes = <&gfx &lhc>;
  774. };
  775. &wdt1 {
  776. aspeed,reset-type = "none";
  777. aspeed,external-signal;
  778. aspeed,ext-push-pull;
  779. aspeed,ext-active-high;
  780. pinctrl-names = "default";
  781. pinctrl-0 = <&pinctrl_wdtrst1_default>;
  782. };
  783. &wdt2 {
  784. aspeed,alt-boot;
  785. };
  786. &ibt {
  787. status = "okay";
  788. };
  789. &adc {
  790. status = "okay";
  791. };
  792. &sdmmc {
  793. status = "okay";
  794. };
  795. &sdhci1 {
  796. status = "okay";
  797. pinctrl-names = "default";
  798. pinctrl-0 = <&pinctrl_sd2_default>;
  799. };
  800. #include "ibm-power9-dual.dtsi"