aspeed-bmc-opp-mowgli.dts 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /dts-v1/;
  3. #include "aspeed-g5.dtsi"
  4. #include <dt-bindings/gpio/aspeed-gpio.h>
  5. #include <dt-bindings/leds/leds-pca955x.h>
  6. / {
  7. model = "Mowgli BMC";
  8. compatible = "ibm,mowgli-bmc", "aspeed,ast2500";
  9. chosen {
  10. stdout-path = &uart5;
  11. bootargs = "console=ttyS4,115200 earlycon";
  12. };
  13. memory@80000000 {
  14. reg = <0x80000000 0x20000000>;
  15. };
  16. reserved-memory {
  17. #address-cells = <1>;
  18. #size-cells = <1>;
  19. ranges;
  20. flash_memory: region@98000000 {
  21. no-map;
  22. reg = <0x98000000 0x04000000>; /* 64M */
  23. };
  24. gfx_memory: framebuffer {
  25. size = <0x01000000>;
  26. alignment = <0x01000000>;
  27. compatible = "shared-dma-pool";
  28. reusable;
  29. };
  30. video_engine_memory: jpegbuffer {
  31. size = <0x02000000>;
  32. alignment = <0x01000000>;
  33. compatible = "shared-dma-pool";
  34. reusable;
  35. };
  36. };
  37. gpio-keys {
  38. compatible = "gpio-keys";
  39. event-air-water {
  40. label = "air-water";
  41. gpios = <&gpio ASPEED_GPIO(F, 6) GPIO_ACTIVE_LOW>;
  42. linux,code = <ASPEED_GPIO(F, 6)>;
  43. };
  44. event-checkstop {
  45. label = "checkstop";
  46. gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
  47. linux,code = <ASPEED_GPIO(J, 2)>;
  48. };
  49. event-ps0-presence {
  50. label = "ps0-presence";
  51. gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>;
  52. linux,code = <ASPEED_GPIO(Z, 2)>;
  53. };
  54. event-ps1-presence {
  55. label = "ps1-presence";
  56. gpios = <&gpio ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
  57. linux,code = <ASPEED_GPIO(Z, 0)>;
  58. };
  59. button-id {
  60. label = "id-button";
  61. gpios = <&gpio ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>;
  62. linux,code = <ASPEED_GPIO(F, 1)>;
  63. };
  64. };
  65. gpio-keys-polled {
  66. compatible = "gpio-keys-polled";
  67. poll-interval = <1000>;
  68. event-fan0-presence {
  69. label = "fan0-presence";
  70. gpios = <&pca9552 9 GPIO_ACTIVE_LOW>;
  71. linux,code = <9>;
  72. };
  73. event-fan1-presence {
  74. label = "fan1-presence";
  75. gpios = <&pca9552 10 GPIO_ACTIVE_LOW>;
  76. linux,code = <10>;
  77. };
  78. event-fan2-presence {
  79. label = "fan2-presence";
  80. gpios = <&pca9552 11 GPIO_ACTIVE_LOW>;
  81. linux,code = <11>;
  82. };
  83. event-fan3-presence {
  84. label = "fan3-presence";
  85. gpios = <&pca9552 12 GPIO_ACTIVE_LOW>;
  86. linux,code = <12>;
  87. };
  88. event-fan4-presence {
  89. label = "fan4-presence";
  90. gpios = <&pca9552 13 GPIO_ACTIVE_LOW>;
  91. linux,code = <13>;
  92. };
  93. };
  94. leds {
  95. compatible = "gpio-leds";
  96. front-fault {
  97. retain-state-shutdown;
  98. default-state = "keep";
  99. gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_LOW>;
  100. };
  101. power-button {
  102. retain-state-shutdown;
  103. default-state = "keep";
  104. gpios = <&gpio ASPEED_GPIO(AA, 1) GPIO_ACTIVE_LOW>;
  105. };
  106. front-id {
  107. retain-state-shutdown;
  108. default-state = "keep";
  109. gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_LOW>;
  110. };
  111. fan0 {
  112. retain-state-shutdown;
  113. default-state = "keep";
  114. gpios = <&pca9552 0 GPIO_ACTIVE_LOW>;
  115. };
  116. fan1 {
  117. retain-state-shutdown;
  118. default-state = "keep";
  119. gpios = <&pca9552 1 GPIO_ACTIVE_LOW>;
  120. };
  121. fan2 {
  122. retain-state-shutdown;
  123. default-state = "keep";
  124. gpios = <&pca9552 2 GPIO_ACTIVE_LOW>;
  125. };
  126. fan3 {
  127. retain-state-shutdown;
  128. default-state = "keep";
  129. gpios = <&pca9552 3 GPIO_ACTIVE_LOW>;
  130. };
  131. fan4 {
  132. retain-state-shutdown;
  133. default-state = "keep";
  134. gpios = <&pca9552 4 GPIO_ACTIVE_LOW>;
  135. };
  136. };
  137. fsi: gpio-fsi {
  138. compatible = "fsi-master-gpio", "fsi-master";
  139. #address-cells = <2>;
  140. #size-cells = <0>;
  141. no-gpio-delays;
  142. clock-gpios = <&gpio ASPEED_GPIO(E, 6) GPIO_ACTIVE_HIGH>;
  143. data-gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_HIGH>;
  144. mux-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
  145. enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
  146. trans-gpios = <&gpio ASPEED_GPIO(E, 5) GPIO_ACTIVE_HIGH>;
  147. };
  148. iio-hwmon-12v {
  149. compatible = "iio-hwmon";
  150. io-channels = <&adc 0>;
  151. };
  152. iio-hwmon-5v {
  153. compatible = "iio-hwmon";
  154. io-channels = <&adc 1>;
  155. };
  156. iio-hwmon-3v {
  157. compatible = "iio-hwmon";
  158. io-channels = <&adc 2>;
  159. };
  160. iio-hwmon-vdd {
  161. compatible = "iio-hwmon";
  162. io-channels = <&adc 3>;
  163. };
  164. iio-hwmon-vcs {
  165. compatible = "iio-hwmon";
  166. io-channels = <&adc 5>;
  167. };
  168. iio-hwmon-vdn {
  169. compatible = "iio-hwmon";
  170. io-channels = <&adc 7>;
  171. };
  172. iio-hwmon-vio {
  173. compatible = "iio-hwmon";
  174. io-channels = <&adc 9>;
  175. };
  176. iio-hwmon-vddra {
  177. compatible = "iio-hwmon";
  178. io-channels = <&adc 11>;
  179. };
  180. iio-hwmon-battery {
  181. compatible = "iio-hwmon";
  182. io-channels = <&adc 12>;
  183. };
  184. iio-hwmon-vddrb {
  185. compatible = "iio-hwmon";
  186. io-channels = <&adc 13>;
  187. };
  188. };
  189. &pwm_tacho {
  190. status = "okay";
  191. pinctrl-names = "default";
  192. pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
  193. &pinctrl_pwm2_default &pinctrl_pwm3_default
  194. &pinctrl_pwm4_default>;
  195. fan@0 {
  196. reg = <0x00>;
  197. aspeed,fan-tach-ch = /bits/ 8 <0x00>;
  198. };
  199. fan@1 {
  200. reg = <0x01>;
  201. aspeed,fan-tach-ch = /bits/ 8 <0x01>;
  202. };
  203. fan@2 {
  204. reg = <0x02>;
  205. aspeed,fan-tach-ch = /bits/ 8 <0x02>;
  206. };
  207. fan@3 {
  208. reg = <0x03>;
  209. aspeed,fan-tach-ch = /bits/ 8 <0x03>;
  210. };
  211. fan@4 {
  212. reg = <0x04>;
  213. aspeed,fan-tach-ch = /bits/ 8 <0x04>;
  214. };
  215. fan@5 {
  216. reg = <0x00>;
  217. aspeed,fan-tach-ch = /bits/ 8 <0x05>;
  218. };
  219. fan@6 {
  220. reg = <0x01>;
  221. aspeed,fan-tach-ch = /bits/ 8 <0x06>;
  222. };
  223. fan@7 {
  224. reg = <0x02>;
  225. aspeed,fan-tach-ch = /bits/ 8 <0x07>;
  226. };
  227. fan@8 {
  228. reg = <0x03>;
  229. aspeed,fan-tach-ch = /bits/ 8 <0x08>;
  230. };
  231. fan@9 {
  232. reg = <0x04>;
  233. aspeed,fan-tach-ch = /bits/ 8 <0x09>;
  234. };
  235. };
  236. &fmc {
  237. status = "okay";
  238. flash@0 {
  239. status = "okay";
  240. label = "bmc";
  241. m25p,fast-read;
  242. spi-max-frequency = <50000000>;
  243. partitions {
  244. #address-cells = < 1 >;
  245. #size-cells = < 1 >;
  246. compatible = "fixed-partitions";
  247. u-boot@0 {
  248. reg = < 0 0x60000 >;
  249. label = "u-boot";
  250. };
  251. u-boot-env@60000 {
  252. reg = < 0x60000 0x20000 >;
  253. label = "u-boot-env";
  254. };
  255. obmc-ubi@80000 {
  256. reg = < 0x80000 0x1F80000 >;
  257. label = "obmc-ubi";
  258. };
  259. };
  260. };
  261. flash@1 {
  262. status = "okay";
  263. label = "alt-bmc";
  264. m25p,fast-read;
  265. spi-max-frequency = <50000000>;
  266. partitions {
  267. #address-cells = < 1 >;
  268. #size-cells = < 1 >;
  269. compatible = "fixed-partitions";
  270. u-boot@0 {
  271. reg = < 0 0x60000 >;
  272. label = "alt-u-boot";
  273. };
  274. u-boot-env@60000 {
  275. reg = < 0x60000 0x20000 >;
  276. label = "alt-u-boot-env";
  277. };
  278. obmc-ubi@80000 {
  279. reg = < 0x80000 0x1F80000 >;
  280. label = "alt-obmc-ubi";
  281. };
  282. };
  283. };
  284. };
  285. &spi1 {
  286. status = "okay";
  287. pinctrl-names = "default";
  288. pinctrl-0 = <&pinctrl_spi1_default>;
  289. flash@0 {
  290. status = "okay";
  291. label = "pnor";
  292. m25p,fast-read;
  293. spi-max-frequency = <100000000>;
  294. };
  295. };
  296. &lpc_ctrl {
  297. status = "okay";
  298. memory-region = <&flash_memory>;
  299. flash = <&spi1>;
  300. };
  301. &uart1 {
  302. /* Rear RS-232 connector */
  303. status = "okay";
  304. pinctrl-names = "default";
  305. pinctrl-0 = <&pinctrl_txd1_default
  306. &pinctrl_rxd1_default
  307. &pinctrl_nrts1_default
  308. &pinctrl_ndtr1_default
  309. &pinctrl_ndsr1_default
  310. &pinctrl_ncts1_default
  311. &pinctrl_ndcd1_default
  312. &pinctrl_nri1_default>;
  313. };
  314. &uart2 {
  315. /* APSS */
  316. status = "okay";
  317. pinctrl-names = "default";
  318. pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
  319. };
  320. &uart5 {
  321. status = "okay";
  322. };
  323. &mac0 {
  324. status = "okay";
  325. pinctrl-names = "default";
  326. pinctrl-0 = <&pinctrl_rmii1_default>;
  327. clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
  328. <&syscon ASPEED_CLK_MAC1RCLK>;
  329. clock-names = "MACCLK", "RCLK";
  330. use-ncsi;
  331. };
  332. &mac1 {
  333. status = "okay";
  334. pinctrl-names = "default";
  335. pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
  336. };
  337. &i2c0 {
  338. status = "okay";
  339. tmp275@48 {
  340. compatible = "ti,tmp275";
  341. reg = <0x48>;
  342. };
  343. };
  344. &i2c1 {
  345. status = "disabled";
  346. };
  347. &i2c2 {
  348. status = "okay";
  349. /* CPU MFG CONN */
  350. };
  351. &i2c3 {
  352. status = "okay";
  353. /* APSS */
  354. /* CPLD */
  355. /* PCA9516 (repeater) ->
  356. * CLK Buffer 9FGS9092
  357. * Power Supply 0
  358. * Power Supply 1
  359. * PCA 9552 LED
  360. */
  361. pca9552: pca9552@60 {
  362. compatible = "nxp,pca9552";
  363. reg = <0x60>;
  364. #address-cells = <1>;
  365. #size-cells = <0>;
  366. gpio-controller;
  367. #gpio-cells = <2>;
  368. gpio@0 {
  369. reg = <0>;
  370. type = <PCA955X_TYPE_GPIO>;
  371. };
  372. gpio@1 {
  373. reg = <1>;
  374. type = <PCA955X_TYPE_GPIO>;
  375. };
  376. gpio@2 {
  377. reg = <2>;
  378. type = <PCA955X_TYPE_GPIO>;
  379. };
  380. gpio@3 {
  381. reg = <3>;
  382. type = <PCA955X_TYPE_GPIO>;
  383. };
  384. gpio@4 {
  385. reg = <4>;
  386. type = <PCA955X_TYPE_GPIO>;
  387. };
  388. gpio@5 {
  389. reg = <5>;
  390. type = <PCA955X_TYPE_GPIO>;
  391. };
  392. gpio@6 {
  393. reg = <6>;
  394. type = <PCA955X_TYPE_GPIO>;
  395. };
  396. gpio@7 {
  397. reg = <7>;
  398. type = <PCA955X_TYPE_GPIO>;
  399. };
  400. gpio@8 {
  401. reg = <8>;
  402. type = <PCA955X_TYPE_GPIO>;
  403. };
  404. gpio@9 {
  405. reg = <9>;
  406. type = <PCA955X_TYPE_GPIO>;
  407. };
  408. gpio@10 {
  409. reg = <10>;
  410. type = <PCA955X_TYPE_GPIO>;
  411. };
  412. gpio@11 {
  413. reg = <11>;
  414. type = <PCA955X_TYPE_GPIO>;
  415. };
  416. gpio@12 {
  417. reg = <12>;
  418. type = <PCA955X_TYPE_GPIO>;
  419. };
  420. gpio@13 {
  421. reg = <13>;
  422. type = <PCA955X_TYPE_GPIO>;
  423. };
  424. gpio@14 {
  425. reg = <14>;
  426. type = <PCA955X_TYPE_GPIO>;
  427. };
  428. gpio@15 {
  429. reg = <15>;
  430. type = <PCA955X_TYPE_GPIO>;
  431. };
  432. };
  433. power-supply@68 {
  434. compatible = "ibm,cffps1";
  435. reg = <0x68>;
  436. };
  437. power-supply@69 {
  438. compatible = "ibm,cffps1";
  439. reg = <0x69>;
  440. };
  441. };
  442. &i2c4 {
  443. status = "okay";
  444. /* CP0 VDD & VCS : IR35221 */
  445. /* CP0 VDN & VIO : IR35221 */
  446. /* CP0 VDDR : IR35221 */
  447. ir35221@28 {
  448. compatible = "infineon,ir35221";
  449. reg = <0x28>;
  450. };
  451. ir35221@29 {
  452. compatible = "infineon,ir35221";
  453. reg = <0x29>;
  454. };
  455. ir35221@2d {
  456. compatible = "infineon,ir35221";
  457. reg = <0x2d>;
  458. };
  459. };
  460. &i2c5 {
  461. status = "disabled";
  462. };
  463. &i2c6 {
  464. status = "disabled";
  465. };
  466. &i2c7 {
  467. status = "disabled";
  468. };
  469. &i2c8 {
  470. status = "okay";
  471. eeprom@50 {
  472. compatible = "atmel,24c64";
  473. reg = <0x50>;
  474. };
  475. };
  476. &i2c9 {
  477. status = "okay";
  478. /* PCIe G3 x16 slot */
  479. };
  480. &i2c10 {
  481. status = "disabled";
  482. };
  483. &i2c11 {
  484. status = "okay";
  485. /* CPLD */
  486. /* TPM */
  487. /* RTC RX8900CE */
  488. /* TMP275A */
  489. /* TMP275A */
  490. rtc@32 {
  491. compatible = "epson,rx8900";
  492. reg = <0x32>;
  493. };
  494. tmp275@48 {
  495. compatible = "ti,tmp275";
  496. reg = <0x48>;
  497. };
  498. tmp275@49 {
  499. compatible = "ti,tmp275";
  500. reg = <0x49>;
  501. };
  502. };
  503. &i2c12 {
  504. status = "disabled";
  505. };
  506. &i2c13 {
  507. status = "disabled";
  508. };
  509. &vuart {
  510. status = "okay";
  511. };
  512. &gfx {
  513. status = "okay";
  514. memory-region = <&gfx_memory>;
  515. };
  516. &adc {
  517. status = "okay";
  518. pinctrl-names = "default";
  519. pinctrl-0 = <&pinctrl_adc0_default
  520. &pinctrl_adc1_default
  521. &pinctrl_adc2_default
  522. &pinctrl_adc3_default
  523. &pinctrl_adc4_default
  524. &pinctrl_adc5_default
  525. &pinctrl_adc6_default
  526. &pinctrl_adc7_default
  527. &pinctrl_adc8_default
  528. &pinctrl_adc9_default
  529. &pinctrl_adc10_default
  530. &pinctrl_adc11_default
  531. &pinctrl_adc12_default
  532. &pinctrl_adc13_default
  533. &pinctrl_adc14_default
  534. &pinctrl_adc15_default>;
  535. };
  536. &wdt1 {
  537. aspeed,reset-type = "none";
  538. aspeed,external-signal;
  539. aspeed,ext-push-pull;
  540. aspeed,ext-active-high;
  541. pinctrl-names = "default";
  542. pinctrl-0 = <&pinctrl_wdtrst1_default>;
  543. };
  544. &wdt2 {
  545. aspeed,alt-boot;
  546. };
  547. &ibt {
  548. status = "okay";
  549. };
  550. &vhub {
  551. status = "okay";
  552. };
  553. &video {
  554. status = "okay";
  555. memory-region = <&video_engine_memory>;
  556. };
  557. #include "ibm-power9-dual.dtsi"