aspeed-bmc-opp-mihawk.dts 23 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /dts-v1/;
  3. #include "aspeed-g5.dtsi"
  4. #include <dt-bindings/gpio/aspeed-gpio.h>
  5. #include <dt-bindings/leds/leds-pca955x.h>
  6. / {
  7. model = "Mihawk BMC";
  8. compatible = "ibm,mihawk-bmc", "aspeed,ast2500";
  9. aliases {
  10. i2c215 = &bus6_mux215;
  11. i2c216 = &bus6_mux216;
  12. i2c217 = &bus6_mux217;
  13. i2c218 = &bus6_mux218;
  14. i2c219 = &bus6_mux219;
  15. i2c220 = &bus6_mux220;
  16. i2c221 = &bus6_mux221;
  17. i2c222 = &bus6_mux222;
  18. i2c223 = &bus7_mux223;
  19. i2c224 = &bus7_mux224;
  20. i2c225 = &bus7_mux225;
  21. i2c226 = &bus7_mux226;
  22. i2c227 = &bus7_mux227;
  23. i2c228 = &bus7_mux228;
  24. i2c229 = &bus7_mux229;
  25. i2c230 = &bus7_mux230;
  26. i2c231 = &bus9_mux231;
  27. i2c232 = &bus9_mux232;
  28. i2c233 = &bus9_mux233;
  29. i2c234 = &bus9_mux234;
  30. i2c235 = &bus9_mux235;
  31. i2c236 = &bus9_mux236;
  32. i2c237 = &bus9_mux237;
  33. i2c238 = &bus9_mux238;
  34. i2c239 = &bus10_mux239;
  35. i2c240 = &bus10_mux240;
  36. i2c241 = &bus10_mux241;
  37. i2c242 = &bus10_mux242;
  38. i2c243 = &bus10_mux243;
  39. i2c244 = &bus10_mux244;
  40. i2c245 = &bus10_mux245;
  41. i2c246 = &bus10_mux246;
  42. i2c247 = &bus12_mux247;
  43. i2c248 = &bus12_mux248;
  44. i2c249 = &bus12_mux249;
  45. i2c250 = &bus12_mux250;
  46. i2c251 = &bus13_mux251;
  47. i2c252 = &bus13_mux252;
  48. i2c253 = &bus13_mux253;
  49. i2c254 = &bus13_mux254;
  50. i2c255 = &bus13_mux255;
  51. i2c256 = &bus13_mux256;
  52. i2c257 = &bus13_mux257;
  53. i2c258 = &bus13_mux258;
  54. };
  55. chosen {
  56. stdout-path = &uart5;
  57. bootargs = "console=ttyS4,115200 earlycon";
  58. };
  59. memory@80000000 {
  60. reg = <0x80000000 0x20000000>;
  61. };
  62. reserved-memory {
  63. #address-cells = <1>;
  64. #size-cells = <1>;
  65. ranges;
  66. flash_memory: region@98000000 {
  67. no-map;
  68. reg = <0x98000000 0x04000000>; /* 64M */
  69. };
  70. gfx_memory: framebuffer {
  71. size = <0x01000000>;
  72. alignment = <0x01000000>;
  73. compatible = "shared-dma-pool";
  74. reusable;
  75. };
  76. video_engine_memory: jpegbuffer {
  77. size = <0x02000000>;
  78. alignment = <0x01000000>;
  79. compatible = "shared-dma-pool";
  80. reusable;
  81. };
  82. };
  83. gpio-keys {
  84. compatible = "gpio-keys";
  85. event-air-water {
  86. label = "air-water";
  87. gpios = <&gpio ASPEED_GPIO(F, 6) GPIO_ACTIVE_LOW>;
  88. linux,code = <ASPEED_GPIO(F, 6)>;
  89. };
  90. event-checkstop {
  91. label = "checkstop";
  92. gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
  93. linux,code = <ASPEED_GPIO(J, 2)>;
  94. };
  95. event-ps0-presence {
  96. label = "ps0-presence";
  97. gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>;
  98. linux,code = <ASPEED_GPIO(Z, 2)>;
  99. };
  100. event-ps1-presence {
  101. label = "ps1-presence";
  102. gpios = <&gpio ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
  103. linux,code = <ASPEED_GPIO(Z, 0)>;
  104. };
  105. button-id {
  106. label = "id-button";
  107. gpios = <&gpio ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>;
  108. linux,code = <ASPEED_GPIO(F, 1)>;
  109. };
  110. };
  111. gpio-keys-polled {
  112. compatible = "gpio-keys-polled";
  113. poll-interval = <1000>;
  114. event-fan0-presence {
  115. label = "fan0-presence";
  116. gpios = <&pca9552 9 GPIO_ACTIVE_LOW>;
  117. linux,code = <9>;
  118. };
  119. event-fan1-presence {
  120. label = "fan1-presence";
  121. gpios = <&pca9552 10 GPIO_ACTIVE_LOW>;
  122. linux,code = <10>;
  123. };
  124. event-fan2-presence {
  125. label = "fan2-presence";
  126. gpios = <&pca9552 11 GPIO_ACTIVE_LOW>;
  127. linux,code = <11>;
  128. };
  129. event-fan3-presence {
  130. label = "fan3-presence";
  131. gpios = <&pca9552 12 GPIO_ACTIVE_LOW>;
  132. linux,code = <12>;
  133. };
  134. event-fan4-presence {
  135. label = "fan4-presence";
  136. gpios = <&pca9552 13 GPIO_ACTIVE_LOW>;
  137. linux,code = <13>;
  138. };
  139. event-fan5-presence {
  140. label = "fan5-presence";
  141. gpios = <&pca9552 14 GPIO_ACTIVE_LOW>;
  142. linux,code = <14>;
  143. };
  144. };
  145. leds {
  146. compatible = "gpio-leds";
  147. front-fault {
  148. retain-state-shutdown;
  149. default-state = "keep";
  150. gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_LOW>;
  151. };
  152. power-button {
  153. retain-state-shutdown;
  154. default-state = "keep";
  155. gpios = <&gpio ASPEED_GPIO(AA, 1) GPIO_ACTIVE_LOW>;
  156. };
  157. front-id {
  158. retain-state-shutdown;
  159. default-state = "keep";
  160. gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_LOW>;
  161. };
  162. fan0 {
  163. retain-state-shutdown;
  164. default-state = "keep";
  165. gpios = <&pca9552 0 GPIO_ACTIVE_LOW>;
  166. };
  167. fan1 {
  168. retain-state-shutdown;
  169. default-state = "keep";
  170. gpios = <&pca9552 1 GPIO_ACTIVE_LOW>;
  171. };
  172. fan2 {
  173. retain-state-shutdown;
  174. default-state = "keep";
  175. gpios = <&pca9552 2 GPIO_ACTIVE_LOW>;
  176. };
  177. fan3 {
  178. retain-state-shutdown;
  179. default-state = "keep";
  180. gpios = <&pca9552 3 GPIO_ACTIVE_LOW>;
  181. };
  182. fan4 {
  183. retain-state-shutdown;
  184. default-state = "keep";
  185. gpios = <&pca9552 4 GPIO_ACTIVE_LOW>;
  186. };
  187. fan5 {
  188. retain-state-shutdown;
  189. default-state = "keep";
  190. gpios = <&pca9552 5 GPIO_ACTIVE_LOW>;
  191. };
  192. };
  193. fsi: gpio-fsi {
  194. compatible = "fsi-master-gpio", "fsi-master";
  195. #address-cells = <2>;
  196. #size-cells = <0>;
  197. no-gpio-delays;
  198. clock-gpios = <&gpio ASPEED_GPIO(E, 6) GPIO_ACTIVE_HIGH>;
  199. data-gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_HIGH>;
  200. mux-gpios = <&gpio ASPEED_GPIO(E, 5) GPIO_ACTIVE_HIGH>;
  201. enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
  202. trans-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
  203. };
  204. iio-hwmon-12v {
  205. compatible = "iio-hwmon";
  206. io-channels = <&adc 0>;
  207. };
  208. iio-hwmon-5v {
  209. compatible = "iio-hwmon";
  210. io-channels = <&adc 1>;
  211. };
  212. iio-hwmon-3v {
  213. compatible = "iio-hwmon";
  214. io-channels = <&adc 2>;
  215. };
  216. iio-hwmon-vdd0 {
  217. compatible = "iio-hwmon";
  218. io-channels = <&adc 3>;
  219. };
  220. iio-hwmon-vdd1 {
  221. compatible = "iio-hwmon";
  222. io-channels = <&adc 4>;
  223. };
  224. iio-hwmon-vcs0 {
  225. compatible = "iio-hwmon";
  226. io-channels = <&adc 5>;
  227. };
  228. iio-hwmon-vcs1 {
  229. compatible = "iio-hwmon";
  230. io-channels = <&adc 6>;
  231. };
  232. iio-hwmon-vdn0 {
  233. compatible = "iio-hwmon";
  234. io-channels = <&adc 7>;
  235. };
  236. iio-hwmon-vdn1 {
  237. compatible = "iio-hwmon";
  238. io-channels = <&adc 8>;
  239. };
  240. iio-hwmon-vio0 {
  241. compatible = "iio-hwmon";
  242. io-channels = <&adc 9>;
  243. };
  244. iio-hwmon-vio1 {
  245. compatible = "iio-hwmon";
  246. io-channels = <&adc 10>;
  247. };
  248. iio-hwmon-vddra {
  249. compatible = "iio-hwmon";
  250. io-channels = <&adc 11>;
  251. };
  252. iio-hwmon-battery {
  253. compatible = "iio-hwmon";
  254. io-channels = <&adc 12>;
  255. };
  256. iio-hwmon-vddrb {
  257. compatible = "iio-hwmon";
  258. io-channels = <&adc 13>;
  259. };
  260. iio-hwmon-vddrc {
  261. compatible = "iio-hwmon";
  262. io-channels = <&adc 14>;
  263. };
  264. iio-hwmon-vddrd {
  265. compatible = "iio-hwmon";
  266. io-channels = <&adc 15>;
  267. };
  268. };
  269. &pwm_tacho {
  270. status = "okay";
  271. pinctrl-names = "default";
  272. pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
  273. &pinctrl_pwm2_default &pinctrl_pwm3_default
  274. &pinctrl_pwm4_default &pinctrl_pwm5_default>;
  275. fan@0 {
  276. reg = <0x00>;
  277. aspeed,fan-tach-ch = /bits/ 8 <0x00>;
  278. };
  279. fan@1 {
  280. reg = <0x01>;
  281. aspeed,fan-tach-ch = /bits/ 8 <0x01>;
  282. };
  283. fan@2 {
  284. reg = <0x02>;
  285. aspeed,fan-tach-ch = /bits/ 8 <0x02>;
  286. };
  287. fan@3 {
  288. reg = <0x03>;
  289. aspeed,fan-tach-ch = /bits/ 8 <0x03>;
  290. };
  291. fan@4 {
  292. reg = <0x04>;
  293. aspeed,fan-tach-ch = /bits/ 8 <0x04>;
  294. };
  295. fan@5 {
  296. reg = <0x05>;
  297. aspeed,fan-tach-ch = /bits/ 8 <0x05>;
  298. };
  299. fan@6 {
  300. reg = <0x00>;
  301. aspeed,fan-tach-ch = /bits/ 8 <0x06>;
  302. };
  303. fan@7 {
  304. reg = <0x01>;
  305. aspeed,fan-tach-ch = /bits/ 8 <0x07>;
  306. };
  307. fan@8 {
  308. reg = <0x02>;
  309. aspeed,fan-tach-ch = /bits/ 8 <0x08>;
  310. };
  311. fan@9 {
  312. reg = <0x03>;
  313. aspeed,fan-tach-ch = /bits/ 8 <0x09>;
  314. };
  315. fan@10 {
  316. reg = <0x04>;
  317. aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
  318. };
  319. fan@11 {
  320. reg = <0x05>;
  321. aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
  322. };
  323. };
  324. &gpio {
  325. gpio-line-names =
  326. /*A0-A7*/ "","cfam-reset","","","","","","",
  327. /*B0-B7*/ "","","","","","","","",
  328. /*C0-C7*/ "","","","","","","","",
  329. /*D0-D7*/ "fsi-enable","","","","","","","",
  330. /*E0-E7*/ "","","","","","fsi-mux","fsi-clock","fsi-data",
  331. /*F0-F7*/ "","id-button","","","","","air-water","",
  332. /*G0-G7*/ "","","","","","","","",
  333. /*H0-H7*/ "","","","","","","","",
  334. /*I0-I7*/ "","","","","","","","",
  335. /*J0-J7*/ "","","checkstop","","","","","",
  336. /*K0-K7*/ "","","","","","","","",
  337. /*L0-L7*/ "","","","","","","","",
  338. /*M0-M7*/ "","","","","","","","",
  339. /*N0-N7*/ "","","","","","","","",
  340. /*O0-O7*/ "","","","","","","","",
  341. /*P0-P7*/ "","","","","","","","",
  342. /*Q0-Q7*/ "","","","","","","","",
  343. /*R0-R7*/ "","","fsi-trans","","","","","",
  344. /*S0-S7*/ "","","","","","","","",
  345. /*T0-T7*/ "","","","","","","","",
  346. /*U0-U7*/ "","","","","","","","",
  347. /*V0-V7*/ "","","","","","","","",
  348. /*W0-W7*/ "","","","","","","","",
  349. /*X0-X7*/ "","","","","","","","",
  350. /*Y0-Y7*/ "","","","","","","","",
  351. /*Z0-Z7*/ "presence-ps1","","presence-ps0","","","","","",
  352. /*AA0-AA7*/ "led-front-fault","power-button","led-front-id","","","","","",
  353. /*AB0-AB7*/ "","","","","","","","",
  354. /*AC0-AC7*/ "","","","","","","","";
  355. };
  356. &fmc {
  357. status = "okay";
  358. flash@0 {
  359. status = "okay";
  360. label = "bmc";
  361. m25p,fast-read;
  362. spi-max-frequency = <50000000>;
  363. partitions {
  364. #address-cells = < 1 >;
  365. #size-cells = < 1 >;
  366. compatible = "fixed-partitions";
  367. u-boot@0 {
  368. reg = < 0 0x60000 >;
  369. label = "u-boot";
  370. };
  371. u-boot-env@60000 {
  372. reg = < 0x60000 0x20000 >;
  373. label = "u-boot-env";
  374. };
  375. obmc-ubi@80000 {
  376. reg = < 0x80000 0x1F80000 >;
  377. label = "obmc-ubi";
  378. };
  379. };
  380. };
  381. flash@1 {
  382. status = "okay";
  383. label = "alt-bmc";
  384. m25p,fast-read;
  385. spi-max-frequency = <50000000>;
  386. partitions {
  387. #address-cells = < 1 >;
  388. #size-cells = < 1 >;
  389. compatible = "fixed-partitions";
  390. u-boot@0 {
  391. reg = < 0 0x60000 >;
  392. label = "alt-u-boot";
  393. };
  394. u-boot-env@60000 {
  395. reg = < 0x60000 0x20000 >;
  396. label = "alt-u-boot-env";
  397. };
  398. obmc-ubi@80000 {
  399. reg = < 0x80000 0x1F80000 >;
  400. label = "alt-obmc-ubi";
  401. };
  402. };
  403. };
  404. };
  405. &spi1 {
  406. status = "okay";
  407. pinctrl-names = "default";
  408. pinctrl-0 = <&pinctrl_spi1_default>;
  409. flash@0 {
  410. status = "okay";
  411. label = "pnor";
  412. m25p,fast-read;
  413. spi-max-frequency = <100000000>;
  414. };
  415. };
  416. &lpc_ctrl {
  417. status = "okay";
  418. memory-region = <&flash_memory>;
  419. flash = <&spi1>;
  420. };
  421. &uart1 {
  422. /* Rear RS-232 connector */
  423. status = "okay";
  424. pinctrl-names = "default";
  425. pinctrl-0 = <&pinctrl_txd1_default
  426. &pinctrl_rxd1_default
  427. &pinctrl_nrts1_default
  428. &pinctrl_ndtr1_default
  429. &pinctrl_ndsr1_default
  430. &pinctrl_ncts1_default
  431. &pinctrl_ndcd1_default
  432. &pinctrl_nri1_default>;
  433. };
  434. &uart2 {
  435. /* APSS */
  436. status = "okay";
  437. pinctrl-names = "default";
  438. pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
  439. };
  440. &uart5 {
  441. status = "okay";
  442. };
  443. &mac0 {
  444. status = "okay";
  445. pinctrl-names = "default";
  446. pinctrl-0 = <&pinctrl_rmii1_default>;
  447. clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
  448. <&syscon ASPEED_CLK_MAC1RCLK>;
  449. clock-names = "MACCLK", "RCLK";
  450. use-ncsi;
  451. };
  452. &mac1 {
  453. status = "okay";
  454. pinctrl-names = "default";
  455. pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
  456. };
  457. &i2c0 {
  458. status = "disabled";
  459. };
  460. &i2c1 {
  461. status = "disabled";
  462. };
  463. &i2c2 {
  464. status = "okay";
  465. /* SAMTEC P0 */
  466. /* SAMTEC P1 */
  467. };
  468. &i2c3 {
  469. status = "okay";
  470. /* APSS */
  471. /* CPLD */
  472. /* PCA9516 (repeater) ->
  473. * CLK Buffer 9FGS9092
  474. * CLK Buffer 9DBL0651BKILFT
  475. * CLK Buffer 9DBL0651BKILFT
  476. * Power Supply 0
  477. * Power Supply 1
  478. * PCA 9552 LED
  479. */
  480. power-supply@58 {
  481. compatible = "ibm,cffps1";
  482. reg = <0x58>;
  483. };
  484. power-supply@5b {
  485. compatible = "ibm,cffps1";
  486. reg = <0x5b>;
  487. };
  488. pca9552: pca9552@60 {
  489. compatible = "nxp,pca9552";
  490. reg = <0x60>;
  491. #address-cells = <1>;
  492. #size-cells = <0>;
  493. gpio-controller;
  494. #gpio-cells = <2>;
  495. gpio@0 {
  496. reg = <0>;
  497. type = <PCA955X_TYPE_GPIO>;
  498. };
  499. gpio@1 {
  500. reg = <1>;
  501. type = <PCA955X_TYPE_GPIO>;
  502. };
  503. gpio@2 {
  504. reg = <2>;
  505. type = <PCA955X_TYPE_GPIO>;
  506. };
  507. gpio@3 {
  508. reg = <3>;
  509. type = <PCA955X_TYPE_GPIO>;
  510. };
  511. gpio@4 {
  512. reg = <4>;
  513. type = <PCA955X_TYPE_GPIO>;
  514. };
  515. gpio@5 {
  516. reg = <5>;
  517. type = <PCA955X_TYPE_GPIO>;
  518. };
  519. gpio@6 {
  520. reg = <6>;
  521. type = <PCA955X_TYPE_GPIO>;
  522. };
  523. gpio@7 {
  524. reg = <7>;
  525. type = <PCA955X_TYPE_GPIO>;
  526. };
  527. gpio@8 {
  528. reg = <8>;
  529. type = <PCA955X_TYPE_GPIO>;
  530. };
  531. gpio@9 {
  532. reg = <9>;
  533. type = <PCA955X_TYPE_GPIO>;
  534. };
  535. gpio@10 {
  536. reg = <10>;
  537. type = <PCA955X_TYPE_GPIO>;
  538. };
  539. gpio@11 {
  540. reg = <11>;
  541. type = <PCA955X_TYPE_GPIO>;
  542. };
  543. gpio@12 {
  544. reg = <12>;
  545. type = <PCA955X_TYPE_GPIO>;
  546. };
  547. gpio@13 {
  548. reg = <13>;
  549. type = <PCA955X_TYPE_GPIO>;
  550. };
  551. gpio@14 {
  552. reg = <14>;
  553. type = <PCA955X_TYPE_GPIO>;
  554. };
  555. gpio@15 {
  556. reg = <15>;
  557. type = <PCA955X_TYPE_GPIO>;
  558. };
  559. };
  560. };
  561. &i2c4 {
  562. status = "okay";
  563. /* CP0 VDD & VCS : IR35221 */
  564. /* CP0 VDN : IR35221 */
  565. /* CP0 VIO : IR38064 */
  566. /* CP0 VDDR : PXM1330 */
  567. ir35221@70 {
  568. compatible = "infineon,ir35221";
  569. reg = <0x70>;
  570. };
  571. ir35221@72 {
  572. compatible = "infineon,ir35221";
  573. reg = <0x72>;
  574. };
  575. };
  576. &i2c5 {
  577. status = "okay";
  578. /* CP0 VDD & VCS : IR35221 */
  579. /* CP0 VDN : IR35221 */
  580. /* CP0 VIO : IR38064 */
  581. /* CP0 VDDR : PXM1330 */
  582. ir35221@70 {
  583. compatible = "infineon,ir35221";
  584. reg = <0x70>;
  585. };
  586. ir35221@72 {
  587. compatible = "infineon,ir35221";
  588. reg = <0x72>;
  589. };
  590. };
  591. &i2c6 {
  592. status = "okay";
  593. /* pca9548 -> NVMe1 to 8 */
  594. pca9548@70 {
  595. compatible = "nxp,pca9548";
  596. #address-cells = <1>;
  597. #size-cells = <0>;
  598. reg = <0x70>;
  599. bus7_mux223: i2c@0 {
  600. #address-cells = <1>;
  601. #size-cells = <0>;
  602. reg = <0>;
  603. };
  604. bus7_mux224: i2c@1 {
  605. #address-cells = <1>;
  606. #size-cells = <0>;
  607. reg = <1>;
  608. };
  609. bus7_mux225: i2c@2 {
  610. #address-cells = <1>;
  611. #size-cells = <0>;
  612. reg = <2>;
  613. };
  614. bus7_mux226: i2c@3 {
  615. #address-cells = <1>;
  616. #size-cells = <0>;
  617. reg = <3>;
  618. };
  619. bus7_mux227: i2c@4 {
  620. #address-cells = <1>;
  621. #size-cells = <0>;
  622. reg = <4>;
  623. };
  624. bus7_mux228: i2c@5 {
  625. #address-cells = <1>;
  626. #size-cells = <0>;
  627. reg = <5>;
  628. };
  629. bus7_mux229: i2c@6 {
  630. #address-cells = <1>;
  631. #size-cells = <0>;
  632. reg = <6>;
  633. };
  634. bus7_mux230: i2c@7 {
  635. #address-cells = <1>;
  636. #size-cells = <0>;
  637. reg = <7>;
  638. };
  639. };
  640. };
  641. &i2c7 {
  642. status = "okay";
  643. /* pca9548 -> NVMe9 to 16 */
  644. pca9548@70 {
  645. compatible = "nxp,pca9548";
  646. #address-cells = <1>;
  647. #size-cells = <0>;
  648. reg = <0x70>;
  649. bus6_mux215: i2c@0 {
  650. #address-cells = <1>;
  651. #size-cells = <0>;
  652. reg = <0>;
  653. };
  654. bus6_mux216: i2c@1 {
  655. #address-cells = <1>;
  656. #size-cells = <0>;
  657. reg = <1>;
  658. };
  659. bus6_mux217: i2c@2 {
  660. #address-cells = <1>;
  661. #size-cells = <0>;
  662. reg = <2>;
  663. };
  664. bus6_mux218: i2c@3 {
  665. #address-cells = <1>;
  666. #size-cells = <0>;
  667. reg = <3>;
  668. };
  669. bus6_mux219: i2c@4 {
  670. #address-cells = <1>;
  671. #size-cells = <0>;
  672. reg = <4>;
  673. };
  674. bus6_mux220: i2c@5 {
  675. #address-cells = <1>;
  676. #size-cells = <0>;
  677. reg = <5>;
  678. };
  679. bus6_mux221: i2c@6 {
  680. #address-cells = <1>;
  681. #size-cells = <0>;
  682. reg = <6>;
  683. };
  684. bus6_mux222: i2c@7 {
  685. #address-cells = <1>;
  686. #size-cells = <0>;
  687. reg = <7>;
  688. };
  689. };
  690. };
  691. &i2c8 {
  692. status = "okay";
  693. eeprom@50 {
  694. compatible = "atmel,24c64";
  695. reg = <0x50>;
  696. };
  697. };
  698. &i2c9 {
  699. status = "okay";
  700. /* pca9545 Riser ->
  701. * PCIe x8 Slot3
  702. * PCIe x16 slot4
  703. * PCIe x8 slot5
  704. * I2C BMC RISER PCA9554
  705. * BMC SCL/SDA PCA9554
  706. * PCA9554
  707. */
  708. /* pca9545 ->
  709. * PCIe x16 Slot1
  710. * PCIe x8 slot2
  711. * PEX8748
  712. */
  713. pca9545riser@70 {
  714. compatible = "nxp,pca9545";
  715. #address-cells = <1>;
  716. #size-cells = <0>;
  717. reg = <0x70>;
  718. i2c-mux-idle-disconnect;
  719. interrupt-controller;
  720. #interrupt-cells = <2>;
  721. bus9_mux231: i2c@0 {
  722. #address-cells = <1>;
  723. #size-cells = <0>;
  724. reg = <0>;
  725. tca9554@39 {
  726. compatible = "ti,tca9554";
  727. reg = <0x39>;
  728. gpio-controller;
  729. #gpio-cells = <2>;
  730. smbus0-hog {
  731. gpio-hog;
  732. gpios = <4 GPIO_ACTIVE_HIGH>;
  733. output-high;
  734. line-name = "smbus0";
  735. };
  736. };
  737. tmp431@4c {
  738. compatible = "ti,tmp401";
  739. reg = <0x4c>;
  740. };
  741. };
  742. bus9_mux232: i2c@1 {
  743. #address-cells = <1>;
  744. #size-cells = <0>;
  745. reg = <1>;
  746. tca9554@39 {
  747. compatible = "ti,tca9554";
  748. reg = <0x39>;
  749. gpio-controller;
  750. #gpio-cells = <2>;
  751. smbus1-hog {
  752. gpio-hog;
  753. gpios = <4 GPIO_ACTIVE_HIGH>;
  754. output-high;
  755. line-name = "smbus1";
  756. };
  757. };
  758. tmp431@4c {
  759. compatible = "ti,tmp401";
  760. reg = <0x4c>;
  761. };
  762. };
  763. bus9_mux233: i2c@2 {
  764. #address-cells = <1>;
  765. #size-cells = <0>;
  766. reg = <2>;
  767. };
  768. bus9_mux234: i2c@3 {
  769. #address-cells = <1>;
  770. #size-cells = <0>;
  771. reg = <3>;
  772. };
  773. };
  774. pca9545@71 {
  775. compatible = "nxp,pca9545";
  776. #address-cells = <1>;
  777. #size-cells = <0>;
  778. reg = <0x71>;
  779. i2c-mux-idle-disconnect;
  780. interrupt-controller;
  781. #interrupt-cells = <2>;
  782. bus9_mux235: i2c@0 {
  783. #address-cells = <1>;
  784. #size-cells = <0>;
  785. reg = <0>;
  786. tca9554@39 {
  787. compatible = "ti,tca9554";
  788. reg = <0x39>;
  789. gpio-controller;
  790. #gpio-cells = <2>;
  791. smbus2-hog {
  792. gpio-hog;
  793. gpios = <4 GPIO_ACTIVE_HIGH>;
  794. output-high;
  795. line-name = "smbus2";
  796. };
  797. };
  798. tmp431@4c {
  799. compatible = "ti,tmp401";
  800. reg = <0x4c>;
  801. };
  802. };
  803. bus9_mux236: i2c@1 {
  804. #address-cells = <1>;
  805. #size-cells = <0>;
  806. reg = <1>;
  807. tca9554@39 {
  808. compatible = "ti,tca9554";
  809. reg = <0x39>;
  810. gpio-controller;
  811. #gpio-cells = <2>;
  812. smbus3-hog {
  813. gpio-hog;
  814. gpios = <4 GPIO_ACTIVE_HIGH>;
  815. output-high;
  816. line-name = "smbus3";
  817. };
  818. };
  819. tmp431@4c {
  820. compatible = "ti,tmp401";
  821. reg = <0x4c>;
  822. };
  823. };
  824. bus9_mux237: i2c@2 {
  825. #address-cells = <1>;
  826. #size-cells = <0>;
  827. reg = <2>;
  828. };
  829. bus9_mux238: i2c@3 {
  830. #address-cells = <1>;
  831. #size-cells = <0>;
  832. reg = <3>;
  833. };
  834. };
  835. };
  836. &i2c10 {
  837. status = "okay";
  838. /* pca9545 Riser ->
  839. * PCIe x8 Slot8
  840. * PCIe x16 slot9
  841. * PCIe x8 slot10
  842. * I2C BMC RISER PCA9554
  843. * BMC SCL/SDA PCA9554
  844. * PCA9554
  845. */
  846. /* pca9545 ->
  847. * PCIe x16 Slot1
  848. * PCIe x8 slot2
  849. * PEX8748
  850. */
  851. pca9545riser@70 {
  852. compatible = "nxp,pca9545";
  853. #address-cells = <1>;
  854. #size-cells = <0>;
  855. reg = <0x70>;
  856. i2c-mux-idle-disconnect;
  857. interrupt-controller;
  858. #interrupt-cells = <2>;
  859. bus10_mux239: i2c@0 {
  860. #address-cells = <1>;
  861. #size-cells = <0>;
  862. reg = <0>;
  863. tca9554@39 {
  864. compatible = "ti,tca9554";
  865. reg = <0x39>;
  866. gpio-controller;
  867. #gpio-cells = <2>;
  868. smbus4-hog {
  869. gpio-hog;
  870. gpios = <4 GPIO_ACTIVE_HIGH>;
  871. output-high;
  872. line-name = "smbus4";
  873. };
  874. };
  875. tmp431@4c {
  876. compatible = "ti,tmp401";
  877. reg = <0x4c>;
  878. };
  879. };
  880. bus10_mux240: i2c@1 {
  881. #address-cells = <1>;
  882. #size-cells = <0>;
  883. reg = <1>;
  884. tca9554@39 {
  885. compatible = "ti,tca9554";
  886. reg = <0x39>;
  887. gpio-controller;
  888. #gpio-cells = <2>;
  889. smbus5-hog {
  890. gpio-hog;
  891. gpios = <4 GPIO_ACTIVE_HIGH>;
  892. output-high;
  893. line-name = "smbus5";
  894. };
  895. };
  896. tmp431@4c {
  897. compatible = "ti,tmp401";
  898. reg = <0x4c>;
  899. };
  900. };
  901. bus10_mux241: i2c@2 {
  902. #address-cells = <1>;
  903. #size-cells = <0>;
  904. reg = <2>;
  905. };
  906. bus10_mux242: i2c@3 {
  907. #address-cells = <1>;
  908. #size-cells = <0>;
  909. reg = <3>;
  910. };
  911. };
  912. pca9545@71 {
  913. compatible = "nxp,pca9545";
  914. #address-cells = <1>;
  915. #size-cells = <0>;
  916. reg = <0x71>;
  917. i2c-mux-idle-disconnect;
  918. interrupt-controller;
  919. #interrupt-cells = <2>;
  920. bus10_mux243: i2c@0 {
  921. #address-cells = <1>;
  922. #size-cells = <0>;
  923. reg = <0>;
  924. tca9554@39 {
  925. compatible = "ti,tca9554";
  926. reg = <0x39>;
  927. gpio-controller;
  928. #gpio-cells = <2>;
  929. smbus6-hog {
  930. gpio-hog;
  931. gpios = <4 GPIO_ACTIVE_HIGH>;
  932. output-high;
  933. line-name = "smbus6";
  934. };
  935. };
  936. tmp431@4c {
  937. compatible = "ti,tmp401";
  938. reg = <0x4c>;
  939. };
  940. };
  941. bus10_mux244: i2c@1 {
  942. #address-cells = <1>;
  943. #size-cells = <0>;
  944. reg = <1>;
  945. tca9554@39 {
  946. compatible = "ti,tca9554";
  947. reg = <0x39>;
  948. gpio-controller;
  949. #gpio-cells = <2>;
  950. smbus7-hog {
  951. gpio-hog;
  952. gpios = <4 GPIO_ACTIVE_HIGH>;
  953. output-high;
  954. line-name = "smbus7";
  955. };
  956. };
  957. tmp431@4c {
  958. compatible = "ti,tmp401";
  959. reg = <0x4c>;
  960. };
  961. };
  962. bus10_mux245: i2c@2 {
  963. #address-cells = <1>;
  964. #size-cells = <0>;
  965. reg = <2>;
  966. };
  967. bus10_mux246: i2c@3 {
  968. #address-cells = <1>;
  969. #size-cells = <0>;
  970. reg = <3>;
  971. };
  972. };
  973. };
  974. &i2c11 {
  975. status = "okay";
  976. /* TPM */
  977. /* RTC RX8900CE */
  978. /* FPGA for power sequence */
  979. /* TMP275A */
  980. /* TMP275A */
  981. /* EMC1462 */
  982. tpm@57 {
  983. compatible = "infineon,slb9645tt";
  984. reg = <0x57>;
  985. };
  986. rtc@32 {
  987. compatible = "epson,rx8900";
  988. reg = <0x32>;
  989. };
  990. tmp275@48 {
  991. compatible = "ti,tmp275";
  992. reg = <0x48>;
  993. };
  994. tmp275@49 {
  995. compatible = "ti,tmp275";
  996. reg = <0x49>;
  997. };
  998. /* chip emc1462 use emc1403 driver */
  999. emc1403@4c {
  1000. compatible = "smsc,emc1403";
  1001. reg = <0x4c>;
  1002. };
  1003. };
  1004. &i2c12 {
  1005. status = "okay";
  1006. /* pca9545 ->
  1007. * SAS BP1
  1008. * SAS BP2
  1009. * NVMe BP
  1010. * M.2 riser
  1011. */
  1012. pca9545@70 {
  1013. compatible = "nxp,pca9545";
  1014. #address-cells = <1>;
  1015. #size-cells = <0>;
  1016. reg = <0x70>;
  1017. interrupt-controller;
  1018. #interrupt-cells = <2>;
  1019. bus12_mux247: i2c@0 {
  1020. #address-cells = <1>;
  1021. #size-cells = <0>;
  1022. reg = <0>;
  1023. eeprom@50 {
  1024. compatible = "atmel,24c64";
  1025. reg = <0x50>;
  1026. };
  1027. };
  1028. bus12_mux248: i2c@1 {
  1029. #address-cells = <1>;
  1030. #size-cells = <0>;
  1031. reg = <1>;
  1032. eeprom@50 {
  1033. compatible = "atmel,24c64";
  1034. reg = <0x50>;
  1035. };
  1036. };
  1037. bus12_mux249: i2c@2 {
  1038. #address-cells = <1>;
  1039. #size-cells = <0>;
  1040. reg = <2>;
  1041. eeprom@50 {
  1042. compatible = "atmel,24c64";
  1043. reg = <0x50>;
  1044. };
  1045. };
  1046. bus12_mux250: i2c@3 {
  1047. #address-cells = <1>;
  1048. #size-cells = <0>;
  1049. reg = <3>;
  1050. tmp275@48 {
  1051. compatible = "ti,tmp275";
  1052. reg = <0x48>;
  1053. };
  1054. };
  1055. };
  1056. };
  1057. &i2c13 {
  1058. status = "okay";
  1059. /* pca9548 ->
  1060. * NVMe BP
  1061. * NVMe HDD17 to 24
  1062. */
  1063. pca9548@70 {
  1064. compatible = "nxp,pca9548";
  1065. #address-cells = <1>;
  1066. #size-cells = <0>;
  1067. reg = <0x70>;
  1068. bus13_mux251: i2c@0 {
  1069. #address-cells = <1>;
  1070. #size-cells = <0>;
  1071. reg = <0>;
  1072. };
  1073. bus13_mux252: i2c@1 {
  1074. #address-cells = <1>;
  1075. #size-cells = <0>;
  1076. reg = <1>;
  1077. };
  1078. bus13_mux253: i2c@2 {
  1079. #address-cells = <1>;
  1080. #size-cells = <0>;
  1081. reg = <2>;
  1082. };
  1083. bus13_mux254: i2c@3 {
  1084. #address-cells = <1>;
  1085. #size-cells = <0>;
  1086. reg = <3>;
  1087. };
  1088. bus13_mux255: i2c@4 {
  1089. #address-cells = <1>;
  1090. #size-cells = <0>;
  1091. reg = <4>;
  1092. };
  1093. bus13_mux256: i2c@5 {
  1094. #address-cells = <1>;
  1095. #size-cells = <0>;
  1096. reg = <5>;
  1097. };
  1098. bus13_mux257: i2c@6 {
  1099. #address-cells = <1>;
  1100. #size-cells = <0>;
  1101. reg = <6>;
  1102. };
  1103. bus13_mux258: i2c@7 {
  1104. #address-cells = <1>;
  1105. #size-cells = <0>;
  1106. reg = <7>;
  1107. };
  1108. };
  1109. };
  1110. &vuart {
  1111. status = "okay";
  1112. };
  1113. &gfx {
  1114. status = "okay";
  1115. memory-region = <&gfx_memory>;
  1116. };
  1117. &adc {
  1118. status = "okay";
  1119. pinctrl-names = "default";
  1120. pinctrl-0 = <&pinctrl_adc0_default
  1121. &pinctrl_adc1_default
  1122. &pinctrl_adc2_default
  1123. &pinctrl_adc3_default
  1124. &pinctrl_adc4_default
  1125. &pinctrl_adc5_default
  1126. &pinctrl_adc6_default
  1127. &pinctrl_adc7_default
  1128. &pinctrl_adc8_default
  1129. &pinctrl_adc9_default
  1130. &pinctrl_adc10_default
  1131. &pinctrl_adc11_default
  1132. &pinctrl_adc12_default
  1133. &pinctrl_adc13_default
  1134. &pinctrl_adc14_default
  1135. &pinctrl_adc15_default>;
  1136. };
  1137. &wdt1 {
  1138. aspeed,reset-type = "none";
  1139. aspeed,external-signal;
  1140. aspeed,ext-push-pull;
  1141. aspeed,ext-active-high;
  1142. pinctrl-names = "default";
  1143. pinctrl-0 = <&pinctrl_wdtrst1_default>;
  1144. };
  1145. &wdt2 {
  1146. aspeed,alt-boot;
  1147. };
  1148. &ibt {
  1149. status = "okay";
  1150. };
  1151. &vhub {
  1152. status = "okay";
  1153. };
  1154. &video {
  1155. status = "okay";
  1156. memory-region = <&video_engine_memory>;
  1157. };
  1158. #include "ibm-power9-dual.dtsi"