aspeed-bmc-inspur-nf5280m6.dts 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. // Copyright (c) 2021 Inspur Corporation
  3. /dts-v1/;
  4. #include "aspeed-g5.dtsi"
  5. #include <dt-bindings/gpio/aspeed-gpio.h>
  6. #include <dt-bindings/i2c/i2c.h>
  7. #include <dt-bindings/leds/leds-pca955x.h>
  8. / {
  9. model = "NF5280M6 BMC";
  10. compatible = "inspur,nf5280m6-bmc", "aspeed,ast2500";
  11. chosen {
  12. stdout-path = &uart5;
  13. bootargs = "console=ttyS4,115200 earlycon";
  14. };
  15. memory@80000000 {
  16. reg = <0x80000000 0x40000000>;
  17. };
  18. reserved-memory {
  19. #address-cells = <1>;
  20. #size-cells = <1>;
  21. ranges;
  22. vga_memory: framebuffer@9f000000 {
  23. no-map;
  24. reg = <0x9f000000 0x01000000>; /* 16M */
  25. };
  26. video_engine_memory: jpegbuffer {
  27. size = <0x02000000>; /* 32M */
  28. alignment = <0x01000000>;
  29. compatible = "shared-dma-pool";
  30. reusable;
  31. };
  32. };
  33. leds {
  34. compatible = "gpio-leds";
  35. bmc_alive {
  36. label = "bmc_alive";
  37. gpios = <&gpio ASPEED_GPIO(B, 0) GPIO_ACTIVE_LOW>;
  38. linux,default-trigger = "timer";
  39. led-pattern = <1000 1000>;
  40. };
  41. front-fan {
  42. label = "front-fan";
  43. gpios = <&gpio ASPEED_GPIO(F,2) GPIO_ACTIVE_LOW>;
  44. };
  45. front-psu {
  46. label = "front-psu";
  47. gpios = <&gpio ASPEED_GPIO(F,3) GPIO_ACTIVE_LOW>;
  48. };
  49. front-syshot {
  50. label = "front-syshot";
  51. gpios = <&gpio ASPEED_GPIO(J, 3) GPIO_ACTIVE_LOW>;
  52. };
  53. front-memory {
  54. label = "front-memory";
  55. gpios = <&gpio ASPEED_GPIO(S, 7) GPIO_ACTIVE_LOW>;
  56. };
  57. identify {
  58. label = "identify";
  59. gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_LOW>;
  60. };
  61. };
  62. iio-hwmon {
  63. compatible = "iio-hwmon";
  64. io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
  65. <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
  66. <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
  67. <&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>;
  68. };
  69. };
  70. &fmc {
  71. status = "okay";
  72. flash@0 {
  73. status = "okay";
  74. m25p,fast-read;
  75. label = "bmc";
  76. spi-max-frequency = <50000000>;
  77. #include "openbmc-flash-layout.dtsi"
  78. };
  79. };
  80. &spi1 {
  81. status = "okay";
  82. pinctrl-names = "default";
  83. pinctrl-0 = <&pinctrl_spi1_default>;
  84. flash@0 {
  85. status = "okay";
  86. m25p,fast-read;
  87. label = "bios";
  88. spi-max-frequency = <100000000>;
  89. };
  90. };
  91. &uart1 {
  92. status = "okay";
  93. };
  94. &uart5 {
  95. status = "okay";
  96. };
  97. &mac0 {
  98. status = "okay";
  99. pinctrl-names = "default";
  100. pinctrl-0 = <&pinctrl_rmii1_default>;
  101. clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
  102. <&syscon ASPEED_CLK_MAC1RCLK>;
  103. clock-names = "MACCLK", "RCLK";
  104. use-ncsi;
  105. };
  106. &mac1 {
  107. status = "okay";
  108. pinctrl-names = "default";
  109. pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
  110. };
  111. &gpio {
  112. status = "okay";
  113. /* Enable GPIOE0 and GPIOE2 pass-through by default */
  114. pinctrl-names = "pass-through";
  115. pinctrl-0 = <&pinctrl_gpie0_default
  116. &pinctrl_gpie2_default>;
  117. gpio-line-names =
  118. /*A0-A7*/ "","MAC2LINK","BMC_RESET_CPLD","","BMC_SCL9","","MAC2MDC_R","",
  119. /*B0-B7*/ "BMC_INIT_OK","FM_SKU_ID2","FM_SPD_DDRCPU_LVLSHFT_DIS_R_N",
  120. "FM_CPU_MSMI_CATERR_LVT3_BMC_N","","FM_CPU0_PROCHOT_LVT3_N",
  121. "FM_CPU_MEM_THERMTRIP_LVT3_N","BIOS_LOAD_DEFAULT_R_N",
  122. /*C0-C7*/ "","","","","","","","",
  123. /*D0-D7*/ "","BMC_SD2CMD","BMC_SD2DAT0","BMC_SD2DAT1","BMC_SD2DAT2",
  124. "BMC_SD2DAT3","BMC_SD2DET","BMC_SD2WPT",
  125. /*E0-E7*/ "FM_BOARD_ID0","FM_BOARD_ID1","FM_BOARD_ID2","FM_BOARD_ID3",
  126. "FM_BOARD_ID4","FM_BOARD_ID5","","",
  127. /*F0-F7*/ "PSU1_PRESENT_N","PSU2_PRESENT_N","FAN_FAULT_LED_N","PSU_FAULT_LED_N",
  128. "BIOS_DEBUG_MODE_N","FP_LCD_RESET","FAN_TYPE_SEL",
  129. "RST_GLB_RST_WARN_N",
  130. /*G0-G7*/ "IRQ_LPTM21L_ALERT_N","IRQ_PLD_ALERT_N","AC_FAIL_N","FP_LCD_PRESENT_BMC",
  131. "BMC_JTAG_TCK_MUX_SEL","BMC_BIOS_RESERVED","SYS_NMI_N","BMC_NMI_N",
  132. /*H0-H7*/ "JTAG_BMC_TDI","JTAG_BMC_TDO","JTAG_BMC_TCK","JTAG_BMC_TMS","FM_BOARD_ID6",
  133. "FM_SKU_ID0","IRQ_SML1_PMBUS_ALERT_N","IRQ_SML0_ALERT_MUX_N",
  134. /*I0-I7*/ "FM_CPU_ERR0_LVT3_BMC_N","FM_CPU_ERR1_LVT3_BMC_N","FM_BMC_PCH_SCI_LPC_N",
  135. "FM_SYS_THROTTLE_LVC3","SPI2_PCH_CS0_N","","","",
  136. /*J0-J7*/ "FM_CPU0_SKTOCC_LVT3_N","FM_CPU1_SKTOCC_LVT3_N","","SYSHOT_FAULT_LED_N",
  137. "VGA_HSYNC","VGA_VSYNC","","",
  138. /*K0-K7*/ "","","","","","","","",
  139. /*L0-L7*/ "","","","","","","SYS_UART_TXD1","SYS_UART_RXD1",
  140. /*M0-M7*/ "","","","","","","","",
  141. /*N0-N7*/ "","","","","","","","",
  142. /*O0-O7*/ "","","","","","","","",
  143. /*P0-P7*/ "","","","","","","","",
  144. /*Q0-Q7*/ "","","","","","","FM_PCH_BMC_THERMTRIP_N","INTRUDER_N",
  145. /*R0-R7*/ "SPI_BMC_BOOT_CS1_R_N","FM_CPU_MEMHOT_LVC3_N",
  146. "DBP_CPU_PREQ_N","FM_CPU_ERR2_LVT3_BMC_N",
  147. "RISER_NCSI_EN_N","","LOM_NCSI_EN_N","OCP_NCSI_EN_N",
  148. /*S0-S7*/ "BMC_XDP_PRDY_N","SIO_POWER_GOOD","BMC_PWR_DEBUG_R_N","BMC_DEBUG_EN_R_N","",
  149. "GPIOS5_BMC","","GPIOS7_BMC",
  150. /*T0-T7*/ "","","","","","","","",
  151. /*U0-U7*/ "","","","","","","","",
  152. /*V0-V7*/ "","","","","","","","",
  153. /*W0-W7*/ "","","","","","","","",
  154. /*X0-X7*/ "","","","","","","","",
  155. /*Y0-Y7*/ "","BMC_DET_UID_N","BMC_JTAG_SEL","SIO_ONCONTROL","","","","",
  156. /*Z0-Z7*/ "XDP_PRESENT_N","DBP_SYSPWROK","BMC_JTAG_SEL","FM_SMI_ACTIVE_N","",
  157. "GPIOZ5","","",
  158. /*AA0-AA7*/ "FP_BMC_SYSLED_N","PS_PWROK","RST_PLTRST_BMC_N","HDA_SDO_BMC",
  159. "FM_SLPS4_R_N","","POWER_BUTTON","POWER_OUT",
  160. /*AB0-AB7*/ "RESET_OUT","RESET_BUTTON","BIOS_REFLASH","POST_COMPLETE","","","","",
  161. /*AC0-AC7*/ "","","","","","","","";
  162. };
  163. &i2c0 {
  164. /* FP_LCD */
  165. status = "okay";
  166. };
  167. &i2c1 {
  168. status = "okay";
  169. eeprom@50 {
  170. compatible = "atmel,24c256";
  171. reg = <0x50>;
  172. label = "fru";
  173. };
  174. };
  175. &i2c2 {
  176. status = "okay";
  177. tmp112@48 {
  178. compatible = "ti,tmp112";
  179. reg = <0x48>;
  180. label = "inlet";
  181. };
  182. tmp112@49 {
  183. compatible = "ti,tmp112";
  184. reg = <0x49>;
  185. label = "outlet";
  186. };
  187. pca9548@70 {
  188. compatible = "nxp,pca9548";
  189. reg = <0x70>;
  190. };
  191. };
  192. &i2c3 {
  193. status = "okay";
  194. pca9548@70 {
  195. compatible = "nxp,pca9548";
  196. reg = <0x70>;
  197. };
  198. pca9548@71 {
  199. compatible = "nxp,pca9548";
  200. reg = <0x71>;
  201. };
  202. pca9548@72 {
  203. compatible = "nxp,pca9548";
  204. reg = <0x72>;
  205. };
  206. };
  207. &i2c4 {
  208. /* IPMB */
  209. status = "okay";
  210. };
  211. &i2c5 {
  212. status = "okay";
  213. pca9548@70 {
  214. compatible = "nxp,pca9548";
  215. reg = <0x70>;
  216. };
  217. };
  218. &i2c6 {
  219. status = "okay";
  220. pca9548@70 {
  221. compatible = "nxp,pca9548";
  222. reg = <0x70>;
  223. };
  224. };
  225. &i2c7 {
  226. status = "okay";
  227. adm1278@33 {
  228. compatible = "adi,adm1293";
  229. reg = <0x33>;
  230. };
  231. adm1278@32 {
  232. compatible = "adi,adm1293";
  233. reg = <0x32>;
  234. };
  235. adm1278@20 {
  236. compatible = "adi,adm1293";
  237. reg = <0x20>;
  238. };
  239. };
  240. &i2c8 {
  241. status = "okay";
  242. pca0: pca9555@23 {
  243. compatible = "nxp,pca9555";
  244. reg = <0x23>;
  245. #address-cells = <1>;
  246. #size-cells = <0>;
  247. gpio-controller;
  248. #gpio-cells = <2>;
  249. gpio@0 {
  250. reg = <0>;
  251. type = <PCA955X_TYPE_GPIO>;
  252. };
  253. gpio@1 {
  254. reg = <1>;
  255. type = <PCA955X_TYPE_GPIO>;
  256. };
  257. gpio@2 {
  258. reg = <2>;
  259. type = <PCA955X_TYPE_GPIO>;
  260. };
  261. gpio@3 {
  262. reg = <3>;
  263. type = <PCA955X_TYPE_GPIO>;
  264. };
  265. gpio@4 {
  266. reg = <4>;
  267. type = <PCA955X_TYPE_GPIO>;
  268. };
  269. gpio@5 {
  270. reg = <5>;
  271. type = <PCA955X_TYPE_GPIO>;
  272. };
  273. gpio@6 {
  274. reg = <6>;
  275. type = <PCA955X_TYPE_GPIO>;
  276. };
  277. };
  278. pca1: pca9555@22 {
  279. compatible = "nxp,pca9555";
  280. reg = <0x22>;
  281. #address-cells = <1>;
  282. #size-cells = <0>;
  283. gpio-controller;
  284. #gpio-cells = <2>;
  285. gpio@0 {
  286. reg = <0>;
  287. type = <PCA955X_TYPE_GPIO>;
  288. };
  289. gpio@1 {
  290. reg = <1>;
  291. type = <PCA955X_TYPE_GPIO>;
  292. };
  293. gpio@2 {
  294. reg = <2>;
  295. type = <PCA955X_TYPE_GPIO>;
  296. };
  297. gpio@3 {
  298. reg = <3>;
  299. type = <PCA955X_TYPE_GPIO>;
  300. };
  301. gpio@4 {
  302. reg = <4>;
  303. type = <PCA955X_TYPE_GPIO>;
  304. };
  305. gpio@5 {
  306. reg = <5>;
  307. type = <PCA955X_TYPE_GPIO>;
  308. };
  309. gpio@6 {
  310. reg = <6>;
  311. type = <PCA955X_TYPE_GPIO>;
  312. };
  313. gpio@7 {
  314. reg = <7>;
  315. type = <PCA955X_TYPE_GPIO>;
  316. };
  317. };
  318. pca2: pca9555@20 {
  319. compatible = "nxp,pca9555";
  320. reg = <0x20>;
  321. #address-cells = <1>;
  322. #size-cells = <0>;
  323. gpio-controller;
  324. #gpio-cells = <2>;
  325. gpio@0 {
  326. reg = <0>;
  327. type = <PCA955X_TYPE_GPIO>;
  328. };
  329. gpio@1 {
  330. reg = <1>;
  331. type = <PCA955X_TYPE_GPIO>;
  332. };
  333. gpio@2 {
  334. reg = <2>;
  335. type = <PCA955X_TYPE_GPIO>;
  336. };
  337. gpio@3 {
  338. reg = <3>;
  339. type = <PCA955X_TYPE_GPIO>;
  340. };
  341. gpio@4 {
  342. reg = <4>;
  343. type = <PCA955X_TYPE_GPIO>;
  344. };
  345. gpio@5 {
  346. reg = <5>;
  347. type = <PCA955X_TYPE_GPIO>;
  348. };
  349. gpio@6 {
  350. reg = <6>;
  351. type = <PCA955X_TYPE_GPIO>;
  352. };
  353. gpio@7 {
  354. reg = <7>;
  355. type = <PCA955X_TYPE_GPIO>;
  356. };
  357. };
  358. pca3: pca9555@21 {
  359. compatible = "nxp,pca9555";
  360. reg = <0x21>;
  361. #address-cells = <1>;
  362. #size-cells = <0>;
  363. gpio-controller;
  364. #gpio-cells = <2>;
  365. gpio@0 {
  366. reg = <0>;
  367. type = <PCA955X_TYPE_GPIO>;
  368. };
  369. gpio@1 {
  370. reg = <1>;
  371. type = <PCA955X_TYPE_GPIO>;
  372. };
  373. gpio@2 {
  374. reg = <2>;
  375. type = <PCA955X_TYPE_GPIO>;
  376. };
  377. gpio@3 {
  378. reg = <3>;
  379. type = <PCA955X_TYPE_GPIO>;
  380. };
  381. gpio@4 {
  382. reg = <4>;
  383. type = <PCA955X_TYPE_GPIO>;
  384. };
  385. gpio@5 {
  386. reg = <5>;
  387. type = <PCA955X_TYPE_GPIO>;
  388. };
  389. gpio@6 {
  390. reg = <6>;
  391. type = <PCA955X_TYPE_GPIO>;
  392. };
  393. gpio@7 {
  394. reg = <7>;
  395. type = <PCA955X_TYPE_GPIO>;
  396. };
  397. };
  398. };
  399. &i2c9 {
  400. /* cpld */
  401. status = "okay";
  402. };
  403. &i2c10 {
  404. status = "okay";
  405. pca4: pca9555@24 {
  406. compatible = "nxp,pca9555";
  407. reg = <0x24>;
  408. #address-cells = <1>;
  409. #size-cells = <0>;
  410. gpio-controller;
  411. #gpio-cells = <2>;
  412. gpio@0 {
  413. reg = <0>;
  414. type = <PCA955X_TYPE_GPIO>;
  415. };
  416. gpio@1 {
  417. reg = <1>;
  418. type = <PCA955X_TYPE_GPIO>;
  419. };
  420. gpio@2 {
  421. reg = <2>;
  422. type = <PCA955X_TYPE_GPIO>;
  423. };
  424. gpio@3 {
  425. reg = <3>;
  426. type = <PCA955X_TYPE_GPIO>;
  427. };
  428. gpio@4 {
  429. reg = <4>;
  430. type = <PCA955X_TYPE_GPIO>;
  431. };
  432. gpio@5 {
  433. reg = <5>;
  434. type = <PCA955X_TYPE_GPIO>;
  435. };
  436. gpio@6 {
  437. reg = <6>;
  438. type = <PCA955X_TYPE_GPIO>;
  439. };
  440. gpio@7 {
  441. reg = <7>;
  442. type = <PCA955X_TYPE_GPIO>;
  443. };
  444. };
  445. pca5: pca9555@25 {
  446. compatible = "nxp,pca9555";
  447. reg = <0x25>;
  448. #address-cells = <1>;
  449. #size-cells = <0>;
  450. gpio-controller;
  451. #gpio-cells = <2>;
  452. gpio@0 {
  453. reg = <0>;
  454. type = <PCA955X_TYPE_GPIO>;
  455. };
  456. gpio@1 {
  457. reg = <1>;
  458. type = <PCA955X_TYPE_GPIO>;
  459. };
  460. gpio@2 {
  461. reg = <2>;
  462. type = <PCA955X_TYPE_GPIO>;
  463. };
  464. gpio@3 {
  465. reg = <3>;
  466. type = <PCA955X_TYPE_GPIO>;
  467. };
  468. gpio@4 {
  469. reg = <4>;
  470. type = <PCA955X_TYPE_GPIO>;
  471. };
  472. gpio@5 {
  473. reg = <5>;
  474. type = <PCA955X_TYPE_GPIO>;
  475. };
  476. gpio@6 {
  477. reg = <6>;
  478. type = <PCA955X_TYPE_GPIO>;
  479. };
  480. };
  481. };
  482. &i2c11 {
  483. status = "okay";
  484. power-supply@58 {
  485. compatible = "inspur,ipsps1";
  486. reg = <0x58>;
  487. };
  488. power-supply@59 {
  489. compatible = "inspur,ipsps1";
  490. reg = <0x59>;
  491. };
  492. };
  493. &i2c12 {
  494. status = "okay";
  495. };
  496. &i2c13 {
  497. status = "okay";
  498. };
  499. &pwm_tacho {
  500. status = "okay";
  501. pinctrl-names = "default";
  502. pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
  503. &pinctrl_pwm2_default &pinctrl_pwm3_default
  504. &pinctrl_pwm4_default &pinctrl_pwm5_default
  505. &pinctrl_pwm6_default &pinctrl_pwm7_default>;
  506. fan@0 {
  507. reg = <0x00>;
  508. aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>;
  509. };
  510. fan@1 {
  511. reg = <0x01>;
  512. aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>;
  513. };
  514. fan@2 {
  515. reg = <0x02>;
  516. aspeed,fan-tach-ch = /bits/ 8 <0x04 0x05>;
  517. };
  518. fan@3 {
  519. reg = <0x03>;
  520. aspeed,fan-tach-ch = /bits/ 8 <0x06 0x07>;
  521. };
  522. fan@4 {
  523. reg = <0x04>;
  524. aspeed,fan-tach-ch = /bits/ 8 <0x08 0x09>;
  525. };
  526. fan@5 {
  527. reg = <0x05>;
  528. aspeed,fan-tach-ch = /bits/ 8 <0x0a 0x0b>;
  529. };
  530. fan@6 {
  531. reg = <0x06>;
  532. aspeed,fan-tach-ch = /bits/ 8 <0x0c 0x0d>;
  533. };
  534. fan@7 {
  535. reg = <0x07>;
  536. aspeed,fan-tach-ch = /bits/ 8 <0x0e 0x0f>;
  537. };
  538. };
  539. &kcs3 {
  540. status = "okay";
  541. aspeed,lpc-io-reg = <0xca2>;
  542. };
  543. &kcs4 {
  544. status = "okay";
  545. aspeed,lpc-io-reg = <0xca4>;
  546. };
  547. &adc {
  548. status = "okay";
  549. pinctrl-names = "default";
  550. pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
  551. &pinctrl_adc2_default &pinctrl_adc3_default &pinctrl_adc4_default
  552. &pinctrl_adc5_default &pinctrl_adc6_default &pinctrl_adc7_default
  553. &pinctrl_adc8_default &pinctrl_adc9_default &pinctrl_adc10_default
  554. &pinctrl_adc11_default &pinctrl_adc12_default &pinctrl_adc13_default
  555. &pinctrl_adc14_default &pinctrl_adc15_default>;
  556. };
  557. &vhub {
  558. status = "okay";
  559. };
  560. &video {
  561. status = "okay";
  562. memory-region = <&video_engine_memory>;
  563. };
  564. &vuart {
  565. status = "okay";
  566. };