aspeed-bmc-bytedance-g220a.dts 17 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. // Copyright (C) 2020 Bytedance.
  3. /dts-v1/;
  4. #include "aspeed-g5.dtsi"
  5. #include <dt-bindings/gpio/aspeed-gpio.h>
  6. #include <dt-bindings/i2c/i2c.h>
  7. #include <dt-bindings/leds/leds-pca955x.h>
  8. / {
  9. model = "Bytedance G220A BMC";
  10. compatible = "bytedance,g220a-bmc", "aspeed,ast2500";
  11. aliases {
  12. serial4 = &uart5;
  13. i2c14 = &channel_3_0;
  14. i2c15 = &channel_3_1;
  15. i2c16 = &channel_3_2;
  16. i2c17 = &channel_3_3;
  17. i2c18 = &channel_6_0;
  18. i2c19 = &channel_6_1;
  19. i2c20 = &channel_6_2;
  20. i2c21 = &channel_6_3;
  21. i2c22 = &channel_6_4;
  22. i2c23 = &channel_6_5;
  23. i2c24 = &channel_6_6;
  24. i2c25 = &channel_6_7;
  25. i2c26 = &channel_6_8;
  26. i2c27 = &channel_6_9;
  27. i2c28 = &channel_6_10;
  28. i2c29 = &channel_6_11;
  29. i2c30 = &channel_6_12;
  30. i2c31 = &channel_6_13;
  31. i2c32 = &channel_6_14;
  32. i2c33 = &channel_6_15;
  33. i2c34 = &channel_6_16;
  34. i2c35 = &channel_6_17;
  35. i2c36 = &channel_6_18;
  36. i2c37 = &channel_6_19;
  37. i2c38 = &channel_6_20;
  38. i2c39 = &channel_6_21;
  39. i2c40 = &channel_6_22;
  40. i2c41 = &channel_6_23;
  41. i2c42 = &channel_6_24;
  42. i2c43 = &channel_6_25;
  43. i2c44 = &channel_10_0;
  44. i2c45 = &channel_10_1;
  45. i2c46 = &channel_10_2;
  46. i2c47 = &channel_10_3;
  47. i2c48 = &channel_10_4;
  48. i2c49 = &channel_10_5;
  49. i2c50 = &channel_10_6;
  50. i2c51 = &channel_10_7;
  51. };
  52. chosen {
  53. stdout-path = &uart5;
  54. bootargs = "console=ttyS4,115200 earlycon";
  55. };
  56. memory@80000000 {
  57. reg = <0x80000000 0x40000000>;
  58. };
  59. reserved-memory {
  60. #address-cells = <1>;
  61. #size-cells = <1>;
  62. ranges;
  63. vga_memory: framebuffer@bc000000 {
  64. no-map;
  65. reg = <0xbc000000 0x04000000>; /* 64M */
  66. };
  67. video_engine_memory: jpegbuffer {
  68. size = <0x02000000>; /* 32M */
  69. alignment = <0x01000000>;
  70. compatible = "shared-dma-pool";
  71. reusable;
  72. };
  73. };
  74. iio-hwmon {
  75. compatible = "iio-hwmon";
  76. io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
  77. <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
  78. <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
  79. <&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>;
  80. };
  81. leds {
  82. compatible = "gpio-leds";
  83. bmc_alive {
  84. label = "bmc_alive";
  85. gpios = <&gpio ASPEED_GPIO(B, 0) GPIO_ACTIVE_LOW>;
  86. linux,default-trigger = "timer";
  87. led-pattern = <1000 1000>;
  88. };
  89. };
  90. gpio-keys {
  91. compatible = "gpio-keys";
  92. event-burn-in-signal {
  93. label = "burn-in";
  94. gpios = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_LOW>;
  95. linux,code = <ASPEED_GPIO(R, 5)>;
  96. };
  97. };
  98. gpio-keys-polled {
  99. compatible = "gpio-keys-polled";
  100. poll-interval = <1000>;
  101. event-rear-riser1-presence {
  102. label = "rear-riser1-presence";
  103. gpios = <&pca0 1 GPIO_ACTIVE_LOW>;
  104. linux,code = <1>;
  105. };
  106. event-alrt-pvddq-cpu0 {
  107. label = "alrt-pvddq-cpu0";
  108. gpios = <&pca0 8 GPIO_ACTIVE_LOW>;
  109. linux,code = <2>;
  110. };
  111. event-rear-riser0-presence {
  112. label = "rear-riser0-presence";
  113. gpios = <&pca0 9 GPIO_ACTIVE_LOW>;
  114. linux,code = <3>;
  115. };
  116. event-fault-pvddq-cpu0 {
  117. label = "fault-pvddq-cpu0";
  118. gpios = <&pca0 10 GPIO_ACTIVE_LOW>;
  119. linux,code = <4>;
  120. };
  121. event-alrt-pvddq-cpu1 {
  122. label = "alrt-pvddq-cpu1";
  123. gpios = <&pca0 11 GPIO_ACTIVE_LOW>;
  124. linux,code = <5>;
  125. };
  126. event-fault-pvddq-cpu1 {
  127. label = "alrt-pvddq-cpu1";
  128. gpios = <&pca0 12 GPIO_ACTIVE_LOW>;
  129. linux,code = <6>;
  130. };
  131. event-fault-pvccin-cpu1 {
  132. label = "fault-pvccin-cpuq";
  133. gpios = <&pca0 13 GPIO_ACTIVE_LOW>;
  134. linux,code = <7>;
  135. };
  136. event-bmc-rom0-wp {
  137. label = "bmc-rom0-wp";
  138. gpios = <&pca1 0 GPIO_ACTIVE_LOW>;
  139. linux,code = <8>;
  140. };
  141. event-bmc-rom1-wp {
  142. label = "bmc-rom1-wp";
  143. gpios = <&pca1 1 GPIO_ACTIVE_LOW>;
  144. linux,code = <9>;
  145. };
  146. event-fan0-presence {
  147. label = "fan0-presence";
  148. gpios = <&pca1 2 GPIO_ACTIVE_LOW>;
  149. linux,code = <10>;
  150. };
  151. event-fan1-presence {
  152. label = "fan1-presence";
  153. gpios = <&pca1 3 GPIO_ACTIVE_LOW>;
  154. linux,code = <11>;
  155. };
  156. event-fan2-presence {
  157. label = "fan2-presence";
  158. gpios = <&pca1 4 GPIO_ACTIVE_LOW>;
  159. linux,code = <12>;
  160. };
  161. event-fan3-presence {
  162. label = "fan3-presence";
  163. gpios = <&pca1 5 GPIO_ACTIVE_LOW>;
  164. linux,code = <13>;
  165. };
  166. event-fan4-presence {
  167. label = "fan4-presence";
  168. gpios = <&pca1 6 GPIO_ACTIVE_LOW>;
  169. linux,code = <14>;
  170. };
  171. event-fan5-presence {
  172. label = "fan5-presence";
  173. gpios = <&pca1 7 GPIO_ACTIVE_LOW>;
  174. linux,code = <15>;
  175. };
  176. event-front-bp1-presence {
  177. label = "front-bp1-presence";
  178. gpios = <&pca1 8 GPIO_ACTIVE_LOW>;
  179. linux,code = <16>;
  180. };
  181. event-rear-bp-presence {
  182. label = "rear-bp-presence";
  183. gpios = <&pca1 9 GPIO_ACTIVE_LOW>;
  184. linux,code = <17>;
  185. };
  186. event-fault-pvccin-cpu0 {
  187. label = "fault-pvccin-cpu0";
  188. gpios = <&pca1 10 GPIO_ACTIVE_LOW>;
  189. linux,code = <18>;
  190. };
  191. event-alrt-p1v05-pvcc {
  192. label = "alrt-p1v05-pvcc1";
  193. gpios = <&pca1 11 GPIO_ACTIVE_LOW>;
  194. linux,code = <19>;
  195. };
  196. event-fault-p1v05-pvccio {
  197. label = "alrt-p1v05-pvcc1";
  198. gpios = <&pca1 12 GPIO_ACTIVE_LOW>;
  199. linux,code = <20>;
  200. };
  201. event-alrt-p1v8-pvccio {
  202. label = "alrt-p1v8-pvccio";
  203. gpios = <&pca1 13 GPIO_ACTIVE_LOW>;
  204. linux,code = <21>;
  205. };
  206. event-fault-p1v8-pvccio {
  207. label = "fault-p1v8-pvccio";
  208. gpios = <&pca1 14 GPIO_ACTIVE_LOW>;
  209. linux,code = <22>;
  210. };
  211. event-front-bp0-presence {
  212. label = "front-bp0-presence";
  213. gpios = <&pca1 15 GPIO_ACTIVE_LOW>;
  214. linux,code = <23>;
  215. };
  216. };
  217. };
  218. &fmc {
  219. status = "okay";
  220. flash@0 {
  221. status = "okay";
  222. label = "bmc";
  223. m25p,fast-read;
  224. spi-max-frequency = <50000000>;
  225. #include "openbmc-flash-layout-64.dtsi"
  226. };
  227. flash@1 {
  228. status = "okay";
  229. label = "alt-bmc";
  230. m25p,fast-read;
  231. spi-max-frequency = <50000000>;
  232. #include "openbmc-flash-layout-64-alt.dtsi"
  233. };
  234. };
  235. &spi1 {
  236. status = "okay";
  237. pinctrl-names = "default";
  238. pinctrl-0 = <&pinctrl_spi1_default>;
  239. flash@0 {
  240. status = "okay";
  241. m25p,fast-read;
  242. label = "bios";
  243. spi-max-frequency = <100000000>;
  244. };
  245. };
  246. &adc {
  247. status = "okay";
  248. };
  249. &wdt2 {
  250. status = "okay";
  251. aspeed,alt-boot;
  252. };
  253. &gpio {
  254. status = "okay";
  255. gpio-line-names =
  256. /*A0-A7*/ "SMRST_OCP_N","MAC2_LINK","BMC_CPLD_SMB_RST_R_N","BMC_CPLD_GPIO0",
  257. "","","","",
  258. /*B0-B7*/ "BMC_INIT_R_OK","FM_BOARD_REV_ID2","FM_PROJECT_ID7","FAULT_P12V_STBY_N",
  259. "","CPU0_PROCHOT_LVT3_N","","BIOS_LOAD_DEFAULT_R_N",
  260. /*C0-C7*/ "","","","","","","","",
  261. /*D0-D7*/ "","","","","","","","",
  262. /*E0-E7*/ "FM_PROJECT_ID0","FM_PROJECT_ID1","FM_PROJECT_ID2","FM_PROJECT_ID3",
  263. "FM_PROJECT_ID4","FM_PROJECT_ID5","","",
  264. /*F0-F7*/ "PSU0_PRSNT_N","PSU1_PRSNT_N","","FAULT_P12V_NVME_N",
  265. "BIOS_DEBUG_MODE_R_N","DISABLE_CPU_DDR_R_SPD","COOLING_STRATEGY",
  266. "PCH_GLB_RST_N",
  267. /*G0-G7*/ "P12V_PMBUS_ALERT_N","CPLD_ALERT_N","BMC_RELOAD_N",
  268. "P12V_PVDDQ_PMBUS_ALERT_N","BMC_JTAG_TCK_MUX_R_SEL","","NMI_OUT",
  269. "NMI_BUTTON",
  270. /*H0-H7*/ "BMC_CPLD_JTAG_TDI","BMC_CPLD_JTAG_TDO","BMC_CPLD_JTAG_TCK",
  271. "BMC_CPLD_JTAG_TMS","FM_PROJECT_ID6","FM_BOARD_REV_ID0",
  272. "PCA9546_U70_RST_N","IRQ_SML0_ALERT_N",
  273. /*I0-I7*/ "FAULT_FRONT_RISER_P12V_N","FAULT_OCP_P12V_N","FM_BMC_PCH_SCI_R_N",
  274. "","","","","",
  275. /*J0-J7*/ "FM_CPU0_SKTOCC_N","FM_CPU1_SKTOCC_N","FM_CPU1_DISABLE_COD_N",
  276. "","","","","",
  277. /*K0-K7*/ "","","","","","","","",
  278. /*L0-L7*/ "P12V_FAULT_N","PWRGD_P12V_PCIE_RISER","","LEAKAGE_DETECT_INPUT_N",
  279. "","IRQ_SML1_PMBUS_ALERT_N","","",
  280. /*M0-M7*/ "","","","","","","","",
  281. /*N0-N7*/ "","","","","","","","",
  282. /*O0-O7*/ "","","","","","","","",
  283. /*P0-P7*/ "","","","","","","","",
  284. /*Q0-Q7*/ "","","","","","","FM_PCH_THERMTRIP_N","CHASSIS_INTRUSION",
  285. /*R0-R7*/ "","PVCCIN_CPU1_SMBALERT_N","BMC_PREQ_R_N","FAULT_P12V_PCIE_RISER_N",
  286. "ALT_P12V_PCIE_RISER_N","BURN_BOARD_N","PVCCIN_CPU0_SMBALERT_N","",
  287. /*S0-S7*/ "BMC_PRDY_N","SIO_POWER_GOOD","FM_BMC_PWR_DEBUG_R_N",
  288. "FM_BMC_XDP_DEBUG_EN","","STRAP_BMC_BATTERY_GPIOS5","","",
  289. /*T0-T7*/ "","","","","","","","",
  290. /*U0-U7*/ "","","","","","","","",
  291. /*V0-V7*/ "","","","","","","","",
  292. /*W0-W7*/ "","","","","","","","",
  293. /*X0-X7*/ "","","","","","","","",
  294. /*Y0-Y7*/ "","PWRGD_PSU0_PWROK","CPU1_PROCHOT_LVT3_N","IRQ_BMC_PCH_SMI_LPC_N",
  295. "","","","",
  296. /*Z0-Z7*/ "XDP_PRSNT_N","BMC_XDP_SYS_PWROK","BMC_XDP_JTAG_SEL",
  297. "PCH_BMC_SMI_ACTIVE_R_N","","","","",
  298. /*AA0-AA7*/ "PWRGD_P12V_STBY_OCP","PS_PWROK","RST_PLTRST_BMC_R_N","HDA_SDO_R",
  299. "FM_SLPS4_R_N","PWRGD_PSU1_PWROK","POWER_BUTTON","POWER_OUT",
  300. /*AB0-AB7*/ "","RESET_OUT","SPI_BIOS_MODE_SELECT","POST_COMPLETE","","","","",
  301. /*AC0-AC7*/ "","","","","","","","CPLD_PLTRST_B_N";
  302. };
  303. &kcs3 {
  304. aspeed,lpc-io-reg = <0xCA2>;
  305. status = "okay";
  306. };
  307. &kcs4 {
  308. aspeed,lpc-io-reg = <0xCA4>;
  309. status = "okay";
  310. };
  311. &lpc_snoop {
  312. snoop-ports = <0x80>;
  313. status = "okay";
  314. };
  315. &uart1 {
  316. status = "okay";
  317. pinctrl-names = "default";
  318. pinctrl-0 = <&pinctrl_txd1_default
  319. &pinctrl_rxd1_default
  320. &pinctrl_nrts1_default
  321. &pinctrl_ndtr1_default
  322. &pinctrl_ndsr1_default
  323. &pinctrl_ncts1_default
  324. &pinctrl_ndcd1_default
  325. &pinctrl_nri1_default>;
  326. };
  327. &uart2 {
  328. status = "okay";
  329. pinctrl-names = "default";
  330. pinctrl-0 = <&pinctrl_txd2_default
  331. &pinctrl_rxd2_default
  332. &pinctrl_nrts2_default
  333. &pinctrl_ndtr2_default
  334. &pinctrl_ndsr2_default
  335. &pinctrl_ncts2_default
  336. &pinctrl_ndcd2_default
  337. &pinctrl_nri2_default>;
  338. };
  339. &uart3 {
  340. status = "okay";
  341. };
  342. &uart4 {
  343. status = "okay";
  344. };
  345. &uart5 {
  346. status = "okay";
  347. };
  348. &mac0 {
  349. status = "okay";
  350. pinctrl-names = "default";
  351. pinctrl-0 = <&pinctrl_rmii1_default>;
  352. clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
  353. <&syscon ASPEED_CLK_MAC1RCLK>;
  354. clock-names = "MACCLK", "RCLK";
  355. use-ncsi;
  356. };
  357. &mac1 {
  358. status = "okay";
  359. pinctrl-names = "default";
  360. pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
  361. };
  362. &i2c0 {
  363. status = "okay";
  364. };
  365. &i2c1 {
  366. status = "okay";
  367. };
  368. &i2c2 {
  369. status = "okay";
  370. };
  371. &i2c3 {
  372. status = "okay";
  373. i2c-switch@70 {
  374. compatible = "nxp,pca9546";
  375. reg = <0x70>;
  376. #address-cells = <1>;
  377. #size-cells = <0>;
  378. channel_3_0: i2c@0 {
  379. #address-cells = <1>;
  380. #size-cells = <0>;
  381. reg = <0>;
  382. };
  383. channel_3_1: i2c@1 {
  384. #address-cells = <1>;
  385. #size-cells = <0>;
  386. reg = <1>;
  387. };
  388. channel_3_2: i2c@2 {
  389. #address-cells = <1>;
  390. #size-cells = <0>;
  391. reg = <2>;
  392. };
  393. channel_3_3: i2c@3 {
  394. #address-cells = <1>;
  395. #size-cells = <0>;
  396. reg = <3>;
  397. };
  398. };
  399. };
  400. &i2c4 {
  401. status = "okay";
  402. ipmb0@10 {
  403. compatible = "ipmb-dev";
  404. reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
  405. i2c-protocol;
  406. };
  407. };
  408. &i2c5 {
  409. status = "okay";
  410. };
  411. &i2c6 {
  412. status = "okay";
  413. i2c-switch@72 {
  414. compatible = "nxp,pca9548";
  415. reg = <0x72>;
  416. #address-cells = <1>;
  417. #size-cells = <0>;
  418. channel_6_0: i2c@0 {
  419. #address-cells = <1>;
  420. #size-cells = <0>;
  421. reg = <0>;
  422. };
  423. channel_6_1: i2c@1 {
  424. #address-cells = <1>;
  425. #size-cells = <0>;
  426. reg = <1>;
  427. };
  428. channel_6_2: i2c@2 {
  429. #address-cells = <1>;
  430. #size-cells = <0>;
  431. reg = <2>;
  432. };
  433. channel_6_3: i2c@3 {
  434. #address-cells = <1>;
  435. #size-cells = <0>;
  436. reg = <3>;
  437. };
  438. channel_6_4: i2c@4 {
  439. #address-cells = <1>;
  440. #size-cells = <0>;
  441. reg = <4>;
  442. };
  443. channel_6_5: i2c@5 {
  444. #address-cells = <1>;
  445. #size-cells = <0>;
  446. reg = <5>;
  447. };
  448. channel_6_6: i2c@6 {
  449. #address-cells = <1>;
  450. #size-cells = <0>;
  451. reg = <6>;
  452. };
  453. channel_6_7: i2c@7 {
  454. #address-cells = <1>;
  455. #size-cells = <0>;
  456. reg = <7>;
  457. };
  458. };
  459. i2c-switch@70 {
  460. compatible = "nxp,pca9546";
  461. reg = <0x70>;
  462. #address-cells = <1>;
  463. #size-cells = <0>;
  464. channel_6_8: i2c@0 {
  465. #address-cells = <1>;
  466. #size-cells = <0>;
  467. reg = <0>;
  468. i2c-switch@71 {
  469. compatible = "nxp,pca9546";
  470. reg = <0x71>;
  471. #address-cells = <1>;
  472. #size-cells = <0>;
  473. channel_6_12: i2c@0 {
  474. #address-cells = <1>;
  475. #size-cells = <0>;
  476. reg = <0>;
  477. };
  478. channel_6_13: i2c@1 {
  479. #address-cells = <1>;
  480. #size-cells = <0>;
  481. reg = <1>;
  482. };
  483. channel_6_14: i2c@2 {
  484. #address-cells = <1>;
  485. #size-cells = <0>;
  486. reg = <2>;
  487. };
  488. channel_6_15: i2c@3 {
  489. #address-cells = <1>;
  490. #size-cells = <0>;
  491. reg = <3>;
  492. };
  493. };
  494. };
  495. channel_6_9: i2c@1 {
  496. #address-cells = <1>;
  497. #size-cells = <0>;
  498. reg = <1>;
  499. i2c-switch@71 {
  500. compatible = "nxp,pca9546";
  501. reg = <0x71>;
  502. #address-cells = <1>;
  503. #size-cells = <0>;
  504. channel_6_16: i2c@0 {
  505. #address-cells = <1>;
  506. #size-cells = <0>;
  507. reg = <0>;
  508. };
  509. channel_6_17: i2c@1 {
  510. #address-cells = <1>;
  511. #size-cells = <0>;
  512. reg = <1>;
  513. };
  514. channel_6_18: i2c@2 {
  515. #address-cells = <1>;
  516. #size-cells = <0>;
  517. reg = <2>;
  518. };
  519. channel_6_19: i2c@3 {
  520. #address-cells = <1>;
  521. #size-cells = <0>;
  522. reg = <3>;
  523. };
  524. };
  525. };
  526. channel_6_10: i2c@2 {
  527. #address-cells = <1>;
  528. #size-cells = <0>;
  529. reg = <2>;
  530. i2c-switch@71 {
  531. compatible = "nxp,pca9546";
  532. reg = <0x71>;
  533. #address-cells = <1>;
  534. #size-cells = <0>;
  535. channel_6_20: i2c@0 {
  536. #address-cells = <1>;
  537. #size-cells = <0>;
  538. reg = <0>;
  539. };
  540. channel_6_21: i2c@1 {
  541. #address-cells = <1>;
  542. #size-cells = <0>;
  543. reg = <1>;
  544. };
  545. channel_6_22: i2c@2 {
  546. #address-cells = <1>;
  547. #size-cells = <0>;
  548. reg = <2>;
  549. };
  550. channel_6_23: i2c@3 {
  551. #address-cells = <1>;
  552. #size-cells = <0>;
  553. reg = <3>;
  554. };
  555. };
  556. };
  557. channel_6_11: i2c@3 {
  558. #address-cells = <1>;
  559. #size-cells = <0>;
  560. reg = <3>;
  561. i2c-switch@71 {
  562. compatible = "nxp,pca9546";
  563. reg = <0x71>;
  564. #address-cells = <1>;
  565. #size-cells = <0>;
  566. channel_6_24: i2c@0 {
  567. #address-cells = <1>;
  568. #size-cells = <0>;
  569. reg = <0>;
  570. };
  571. channel_6_25: i2c@1 {
  572. #address-cells = <1>;
  573. #size-cells = <0>;
  574. reg = <1>;
  575. };
  576. };
  577. };
  578. };
  579. };
  580. &i2c7 {
  581. status = "okay";
  582. };
  583. &i2c8 {
  584. status = "okay";
  585. pca0:pca9555@24 {
  586. compatible = "nxp,pca9555";
  587. reg = <0x24>;
  588. #address-cells = <1>;
  589. #size-cells = <0>;
  590. gpio-controller;
  591. #gpio-cells = <2>;
  592. gpio@1 {
  593. reg = <1>;
  594. type = <PCA955X_TYPE_GPIO>;
  595. };
  596. gpio@8 {
  597. reg = <8>;
  598. type = <PCA955X_TYPE_GPIO>;
  599. };
  600. gpio@9 {
  601. reg = <9>;
  602. type = <PCA955X_TYPE_GPIO>;
  603. };
  604. gpio@10 {
  605. reg = <10>;
  606. type = <PCA955X_TYPE_GPIO>;
  607. };
  608. gpio@11 {
  609. reg = <11>;
  610. type = <PCA955X_TYPE_GPIO>;
  611. };
  612. gpio@12 {
  613. reg = <12>;
  614. type = <PCA955X_TYPE_GPIO>;
  615. };
  616. gpio@13 {
  617. reg = <13>;
  618. type = <PCA955X_TYPE_GPIO>;
  619. };
  620. };
  621. pca1:pca9555@25 {
  622. compatible = "nxp,pca9555";
  623. reg = <0x25>;
  624. #address-cells = <1>;
  625. #size-cells = <0>;
  626. gpio-controller;
  627. #gpio-cells = <2>;
  628. gpio@0 {
  629. reg = <0>;
  630. type = <PCA955X_TYPE_GPIO>;
  631. };
  632. gpio@1 {
  633. reg = <1>;
  634. type = <PCA955X_TYPE_GPIO>;
  635. };
  636. gpio@2 {
  637. reg = <2>;
  638. type = <PCA955X_TYPE_GPIO>;
  639. };
  640. gpio@3 {
  641. reg = <3>;
  642. type = <PCA955X_TYPE_GPIO>;
  643. };
  644. gpio@4 {
  645. reg = <4>;
  646. type = <PCA955X_TYPE_GPIO>;
  647. };
  648. gpio@5 {
  649. reg = <5>;
  650. type = <PCA955X_TYPE_GPIO>;
  651. };
  652. gpio@6 {
  653. reg = <6>;
  654. type = <PCA955X_TYPE_GPIO>;
  655. };
  656. gpio@7 {
  657. reg = <7>;
  658. type = <PCA955X_TYPE_GPIO>;
  659. };
  660. gpio@8 {
  661. reg = <8>;
  662. type = <PCA955X_TYPE_GPIO>;
  663. };
  664. gpio@9 {
  665. reg = <9>;
  666. type = <PCA955X_TYPE_GPIO>;
  667. };
  668. gpio@10 {
  669. reg = <10>;
  670. type = <PCA955X_TYPE_GPIO>;
  671. };
  672. gpio@11 {
  673. reg = <11>;
  674. type = <PCA955X_TYPE_GPIO>;
  675. };
  676. gpio@12 {
  677. reg = <12>;
  678. type = <PCA955X_TYPE_GPIO>;
  679. };
  680. gpio@13 {
  681. reg = <13>;
  682. type = <PCA955X_TYPE_GPIO>;
  683. };
  684. gpio@14 {
  685. reg = <14>;
  686. type = <PCA955X_TYPE_GPIO>;
  687. };
  688. gpio@15 {
  689. reg = <15>;
  690. type = <PCA955X_TYPE_GPIO>;
  691. };
  692. };
  693. };
  694. &i2c9 {
  695. status = "okay";
  696. };
  697. &i2c10 {
  698. status = "okay";
  699. i2c-switch@70 {
  700. compatible = "nxp,pca9546";
  701. reg = <0x70>;
  702. #address-cells = <1>;
  703. #size-cells = <0>;
  704. channel_10_0: i2c@0 {
  705. #address-cells = <1>;
  706. #size-cells = <0>;
  707. reg = <0>;
  708. };
  709. channel_10_1: i2c@1 {
  710. #address-cells = <1>;
  711. #size-cells = <0>;
  712. reg = <1>;
  713. };
  714. channel_10_2: i2c@2 {
  715. #address-cells = <1>;
  716. #size-cells = <0>;
  717. reg = <2>;
  718. };
  719. channel_10_3: i2c@3 {
  720. #address-cells = <1>;
  721. #size-cells = <0>;
  722. reg = <3>;
  723. };
  724. };
  725. i2c-switch@71 {
  726. compatible = "nxp,pca9546";
  727. reg = <0x71>;
  728. #address-cells = <1>;
  729. #size-cells = <0>;
  730. channel_10_4: i2c@0 {
  731. #address-cells = <1>;
  732. #size-cells = <0>;
  733. reg = <0>;
  734. };
  735. channel_10_5: i2c@1 {
  736. #address-cells = <1>;
  737. #size-cells = <0>;
  738. reg = <1>;
  739. };
  740. channel_10_6: i2c@2 {
  741. #address-cells = <1>;
  742. #size-cells = <0>;
  743. reg = <2>;
  744. };
  745. channel_10_7: i2c@3 {
  746. #address-cells = <1>;
  747. #size-cells = <0>;
  748. reg = <3>;
  749. };
  750. };
  751. };
  752. &i2c11 {
  753. status = "okay";
  754. };
  755. &i2c12 {
  756. status = "okay";
  757. };
  758. &i2c13 {
  759. status = "okay";
  760. };
  761. &pwm_tacho {
  762. status = "okay";
  763. pinctrl-names = "default";
  764. pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
  765. &pinctrl_pwm2_default &pinctrl_pwm3_default
  766. &pinctrl_pwm4_default &pinctrl_pwm5_default>;
  767. fan@0 {
  768. reg = <0x00>;
  769. aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>;
  770. };
  771. fan@1 {
  772. reg = <0x01>;
  773. aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>;
  774. };
  775. fan@2 {
  776. reg = <0x02>;
  777. aspeed,fan-tach-ch = /bits/ 8 <0x04 0x05>;
  778. };
  779. fan@3 {
  780. reg = <0x03>;
  781. aspeed,fan-tach-ch = /bits/ 8 <0x06 0x07>;
  782. };
  783. fan@4 {
  784. reg = <0x04>;
  785. aspeed,fan-tach-ch = /bits/ 8 <0x08 0x09>;
  786. };
  787. fan@5 {
  788. reg = <0x05>;
  789. aspeed,fan-tach-ch = /bits/ 8 <0x0a 0x0b>;
  790. };
  791. };
  792. &gpio {
  793. pin_gpio_i3 {
  794. gpio-hog;
  795. gpios = <ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
  796. output-low;
  797. line-name = "NCSI_BMC_R_SEL";
  798. };
  799. pin_gpio_b6 {
  800. gpio-hog;
  801. gpios = <ASPEED_GPIO(B, 6) GPIO_ACTIVE_HIGH>;
  802. output-low;
  803. line-name = "EN_NCSI_SWITCH_N";
  804. };
  805. };
  806. &video {
  807. status = "okay";
  808. memory-region = <&video_engine_memory>;
  809. };
  810. &vhub {
  811. status = "okay";
  812. };