armada-388-clearfog.dts 2.9 KB

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  1. // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2. /*
  3. * Device Tree file for SolidRun Clearfog Pro revision A1 rev 2.0 (88F6828)
  4. *
  5. * Copyright (C) 2015 Russell King
  6. */
  7. /dts-v1/;
  8. #include "armada-388-clearfog.dtsi"
  9. / {
  10. model = "SolidRun Clearfog A1";
  11. compatible = "solidrun,clearfog-a1", "marvell,armada388",
  12. "marvell,armada385", "marvell,armada380";
  13. soc {
  14. internal-regs {
  15. usb3@f0000 {
  16. /* CON2, nearest CPU, USB2 only. */
  17. status = "okay";
  18. };
  19. };
  20. pcie {
  21. pcie@3,0 {
  22. /* Port 2, Lane 0. CON2, nearest CPU. */
  23. reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
  24. status = "okay";
  25. };
  26. };
  27. };
  28. gpio-keys {
  29. compatible = "gpio-keys";
  30. pinctrl-0 = <&rear_button_pins>;
  31. pinctrl-names = "default";
  32. button-0 {
  33. /* The rear SW3 button */
  34. label = "Rear Button";
  35. gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
  36. linux,can-disable;
  37. linux,code = <BTN_0>;
  38. };
  39. };
  40. };
  41. &eth1 {
  42. /* ethernet@30000 */
  43. fixed-link {
  44. speed = <1000>;
  45. full-duplex;
  46. };
  47. };
  48. &expander0 {
  49. /*
  50. * PCA9655 GPIO expander:
  51. * 0-CON3 CLKREQ#
  52. * 1-CON3 PERST#
  53. * 2-CON2 PERST#
  54. * 3-CON3 W_DISABLE
  55. * 4-CON2 CLKREQ#
  56. * 5-USB3 overcurrent
  57. * 6-USB3 power
  58. * 7-CON2 W_DISABLE
  59. * 8-JP4 P1
  60. * 9-JP4 P4
  61. * 10-JP4 P5
  62. * 11-m.2 DEVSLP
  63. * 12-SFP_LOS
  64. * 13-SFP_TX_FAULT
  65. * 14-SFP_TX_DISABLE
  66. * 15-SFP_MOD_DEF0
  67. */
  68. pcie2-0-clkreq-hog {
  69. gpio-hog;
  70. gpios = <4 GPIO_ACTIVE_LOW>;
  71. input;
  72. line-name = "pcie2.0-clkreq";
  73. };
  74. pcie2-0-w-disable-hog {
  75. gpio-hog;
  76. gpios = <7 GPIO_ACTIVE_LOW>;
  77. output-low;
  78. line-name = "pcie2.0-w-disable";
  79. };
  80. };
  81. &mdio {
  82. status = "okay";
  83. switch@4 {
  84. compatible = "marvell,mv88e6085";
  85. #address-cells = <1>;
  86. #size-cells = <0>;
  87. reg = <4>;
  88. pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>;
  89. pinctrl-names = "default";
  90. ports {
  91. #address-cells = <1>;
  92. #size-cells = <0>;
  93. port@0 {
  94. reg = <0>;
  95. label = "lan5";
  96. };
  97. port@1 {
  98. reg = <1>;
  99. label = "lan4";
  100. };
  101. port@2 {
  102. reg = <2>;
  103. label = "lan3";
  104. };
  105. port@3 {
  106. reg = <3>;
  107. label = "lan2";
  108. };
  109. port@4 {
  110. reg = <4>;
  111. label = "lan1";
  112. };
  113. port@5 {
  114. reg = <5>;
  115. label = "cpu";
  116. ethernet = <&eth1>;
  117. fixed-link {
  118. speed = <1000>;
  119. full-duplex;
  120. };
  121. };
  122. port@6 {
  123. /* 88E1512 external phy */
  124. reg = <6>;
  125. label = "lan6";
  126. fixed-link {
  127. speed = <1000>;
  128. full-duplex;
  129. };
  130. };
  131. };
  132. };
  133. };
  134. &pinctrl {
  135. clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins {
  136. marvell,pins = "mpp46";
  137. marvell,function = "ref";
  138. };
  139. clearfog_dsa0_pins: clearfog-dsa0-pins {
  140. marvell,pins = "mpp23", "mpp41";
  141. marvell,function = "gpio";
  142. };
  143. clearfog_spi1_cs_pins: spi1-cs-pins {
  144. marvell,pins = "mpp55";
  145. marvell,function = "spi1";
  146. };
  147. rear_button_pins: rear-button-pins {
  148. marvell,pins = "mpp34";
  149. marvell,function = "gpio";
  150. };
  151. };
  152. &spi1 {
  153. /*
  154. * Add SPI CS pins for clearfog:
  155. * CS0: W25Q32
  156. * CS1:
  157. * CS2: mikrobus
  158. */
  159. pinctrl-0 = <&spi1_pins &clearfog_spi1_cs_pins &mikro_spi_pins>;
  160. };