armada-385-linksys.dtsi 4.3 KB

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  1. // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2. /*
  3. * Device Tree include file for Armada 385 based Linksys boards
  4. *
  5. * Copyright (C) 2015 Imre Kaloz <[email protected]>
  6. */
  7. #include <dt-bindings/gpio/gpio.h>
  8. #include <dt-bindings/input/input.h>
  9. #include "armada-385.dtsi"
  10. / {
  11. model = "Linksys boards based on Armada 385";
  12. compatible = "linksys,armada385", "marvell,armada385",
  13. "marvell,armada380";
  14. chosen {
  15. stdout-path = "serial0:115200n8";
  16. };
  17. memory {
  18. device_type = "memory";
  19. reg = <0x00000000 0x20000000>; /* 512 MiB */
  20. };
  21. soc {
  22. ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
  23. MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
  24. MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
  25. MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
  26. MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
  27. };
  28. usb3_1_phy: usb3_1-phy {
  29. compatible = "usb-nop-xceiv";
  30. vcc-supply = <&usb3_1_vbus>;
  31. #phy-cells = <0>;
  32. };
  33. usb3_1_vbus: usb3_1-vbus {
  34. compatible = "regulator-fixed";
  35. pinctrl-names = "default";
  36. pinctrl-0 = <&usb3_1_vbus_pins>;
  37. regulator-name = "usb3_1-vbus";
  38. regulator-min-microvolt = <5000000>;
  39. regulator-max-microvolt = <5000000>;
  40. enable-active-high;
  41. gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
  42. };
  43. gpio_keys: gpio-keys {
  44. compatible = "gpio-keys";
  45. pinctrl-0 = <&gpio_keys_pins>;
  46. pinctrl-names = "default";
  47. button-wps {
  48. label = "WPS";
  49. linux,code = <KEY_WPS_BUTTON>;
  50. gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
  51. };
  52. button-reset {
  53. label = "Factory Reset Button";
  54. linux,code = <KEY_RESTART>;
  55. gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
  56. };
  57. };
  58. gpio_leds: gpio-leds {
  59. compatible = "gpio-leds";
  60. pinctrl-0 = <&gpio_leds_pins>;
  61. pinctrl-names = "default";
  62. power {
  63. gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
  64. default-state = "on";
  65. };
  66. sata {
  67. gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
  68. default-state = "off";
  69. linux,default-trigger = "disk-activity";
  70. };
  71. };
  72. };
  73. &ahci0 {
  74. status = "okay";
  75. };
  76. &bm {
  77. status = "okay";
  78. };
  79. &bm_bppi {
  80. status = "okay";
  81. };
  82. &eth0 {
  83. status = "okay";
  84. phy-mode = "rgmii-id";
  85. buffer-manager = <&bm>;
  86. bm,pool-long = <0>;
  87. bm,pool-short = <1>;
  88. fixed-link {
  89. speed = <1000>;
  90. full-duplex;
  91. };
  92. };
  93. &eth2 {
  94. status = "okay";
  95. phy-mode = "sgmii";
  96. buffer-manager = <&bm>;
  97. bm,pool-long = <2>;
  98. bm,pool-short = <3>;
  99. fixed-link {
  100. speed = <1000>;
  101. full-duplex;
  102. };
  103. };
  104. &i2c0 {
  105. pinctrl-names = "default";
  106. pinctrl-0 = <&i2c0_pins>;
  107. status = "okay";
  108. tmp421@4c {
  109. compatible = "ti,tmp421";
  110. reg = <0x4c>;
  111. };
  112. expander0: pca9635@68 {
  113. #address-cells = <1>;
  114. #size-cells = <0>;
  115. compatible = "nxp,pca9635";
  116. reg = <0x68>;
  117. };
  118. };
  119. &nand_controller {
  120. /* 128MiB or 256MiB */
  121. status = "okay";
  122. #address-cells = <1>;
  123. #size-cells = <0>;
  124. nand: nand@0 {
  125. reg = <0>;
  126. label = "pxa3xx_nand-0";
  127. nand-rb = <0>;
  128. nand-ecc-strength = <4>;
  129. nand-ecc-step-size = <512>;
  130. marvell,nand-keep-config;
  131. nand-on-flash-bbt;
  132. };
  133. };
  134. &mdio {
  135. status = "okay";
  136. switch@0 {
  137. compatible = "marvell,mv88e6085";
  138. #address-cells = <1>;
  139. #size-cells = <0>;
  140. reg = <0>;
  141. ports {
  142. #address-cells = <1>;
  143. #size-cells = <0>;
  144. port@0 {
  145. reg = <0>;
  146. label = "lan4";
  147. };
  148. port@1 {
  149. reg = <1>;
  150. label = "lan3";
  151. };
  152. port@2 {
  153. reg = <2>;
  154. label = "lan2";
  155. };
  156. port@3 {
  157. reg = <3>;
  158. label = "lan1";
  159. };
  160. port@4 {
  161. reg = <4>;
  162. label = "wan";
  163. };
  164. port@5 {
  165. reg = <5>;
  166. label = "cpu";
  167. ethernet = <&eth2>;
  168. fixed-link {
  169. speed = <1000>;
  170. full-duplex;
  171. };
  172. };
  173. };
  174. };
  175. };
  176. &pciec {
  177. status = "okay";
  178. };
  179. &pcie1 {
  180. /* Marvell 88W8864, 5GHz-only */
  181. status = "okay";
  182. };
  183. &pcie2 {
  184. /* Marvell 88W8864, 2GHz-only */
  185. status = "okay";
  186. };
  187. &pinctrl {
  188. gpio_keys_pins: gpio-keys-pins {
  189. /* mpp24: wps, mpp29: reset */
  190. marvell,pins = "mpp24", "mpp29";
  191. marvell,function = "gpio";
  192. };
  193. gpio_leds_pins: gpio-leds-pins {
  194. /* mpp54: sata, mpp55: power */
  195. marvell,pins = "mpp54", "mpp55";
  196. marvell,function = "gpio";
  197. };
  198. usb3_1_vbus_pins: usb3_1-vbus-pins {
  199. marvell,pins = "mpp50";
  200. marvell,function = "gpio";
  201. };
  202. };
  203. &spi0 {
  204. status = "disabled";
  205. };
  206. &uart0 {
  207. /* J10: VCC, NC, RX, NC, TX, GND */
  208. status = "okay";
  209. };
  210. &usb0 {
  211. /* USB part of the eSATA/USB 2.0 port */
  212. status = "okay";
  213. };
  214. &usb3_1 {
  215. status = "okay";
  216. usb-phy = <&usb3_1_phy>;
  217. };
  218. &rtc {
  219. /* No crystal connected to the internal RTC */
  220. status = "disabled";
  221. };