armada-382-rd-ac3x-48g4x2xl.dts 1.7 KB

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  1. // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2. /*
  3. * Device Tree file for Marvell Armada 382 reference board
  4. * (RD-AC3X-48G4X2XL)
  5. *
  6. * Copyright (C) 2020 Allied Telesis Labs
  7. */
  8. /dts-v1/;
  9. #include "armada-385.dtsi"
  10. #include <dt-bindings/gpio/gpio.h>
  11. / {
  12. model = "Marvell Armada 382 RD-AC3X";
  13. compatible = "marvell,rd-ac3x-48g4x2xl", "marvell,rd-ac3x",
  14. "marvell,armada385", "marvell,armada380";
  15. chosen {
  16. stdout-path = "serial0:115200n8";
  17. };
  18. aliases {
  19. ethernet0 = &eth1;
  20. };
  21. memory {
  22. device_type = "memory";
  23. reg = <0x00000000 0x20000000>; /* 512MB */
  24. };
  25. soc {
  26. ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
  27. MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
  28. };
  29. };
  30. &i2c0 {
  31. pinctrl-names = "default";
  32. pinctrl-0 = <&i2c0_pins>;
  33. status = "okay";
  34. eeprom@53{
  35. compatible = "atmel,24c64";
  36. reg = <0x53>;
  37. };
  38. /* CPLD device present at 0x3c. Function unknown */
  39. };
  40. &uart0 {
  41. pinctrl-names = "default";
  42. pinctrl-0 = <&uart0_pins>;
  43. status = "okay";
  44. };
  45. &eth1 {
  46. status = "okay";
  47. phy = <&phy0>;
  48. phy-mode = "rgmii-id";
  49. };
  50. &mdio {
  51. pinctrl-names = "default";
  52. pinctrl-0 = <&mdio_pins>;
  53. phy0: ethernet-phy@0 {
  54. reg = <0>;
  55. };
  56. };
  57. &pciec {
  58. status = "okay";
  59. };
  60. &pcie1 {
  61. /* Port 0, Lane 0 */
  62. status = "okay";
  63. };
  64. &nand_controller {
  65. status = "okay";
  66. nand@0 {
  67. reg = <0>;
  68. label = "pxa3xx_nand-0";
  69. nand-rb = <0>;
  70. nand-on-flash-bbt;
  71. partitions {
  72. compatible = "fixed-partitions";
  73. #address-cells = <1>;
  74. #size-cells = <1>;
  75. partition@0 {
  76. reg = <0x00000000 0x00500000>;
  77. label = "u-boot";
  78. };
  79. partition@500000{
  80. reg = <0x00500000 0x00400000>;
  81. label = "u-boot env";
  82. };
  83. partition@900000{
  84. reg = <0x00900000 0x3F700000>;
  85. label = "user";
  86. };
  87. };
  88. };
  89. };
  90. &refclk {
  91. clock-frequency = <200000000>;
  92. };