armada-370-synology-ds213j.dts 7.0 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Device Tree file for Synology DS213j
  4. *
  5. * Copyright (C) 2014, Arnaud EBALARD <[email protected]>
  6. *
  7. * Note: this Device Tree assumes that the bootloader has remapped the
  8. * internal registers to 0xf1000000 (instead of the old 0xd0000000).
  9. * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
  10. * bootloaders provided by Marvell. It is used in recent versions of
  11. * DSM software provided by Synology. Nonetheless, some earlier boards
  12. * were delivered with an older version of u-boot that left internal
  13. * registers mapped at 0xd0000000. If you have such a device you will
  14. * not be able to directly boot a kernel based on this Device Tree. In
  15. * that case, the preferred solution is to update your bootloader (e.g.
  16. * by upgrading to latest version of DSM, or building a new one and
  17. * installing it from u-boot prompt) or adjust the Devive Tree
  18. * (s/0xf1000000/0xd0000000/ in 'ranges' below).
  19. */
  20. /dts-v1/;
  21. #include <dt-bindings/input/input.h>
  22. #include <dt-bindings/gpio/gpio.h>
  23. #include "armada-370.dtsi"
  24. / {
  25. model = "Synology DS213j";
  26. compatible = "synology,ds213j", "marvell,armada370",
  27. "marvell,armada-370-xp";
  28. chosen {
  29. stdout-path = "serial0:115200n8";
  30. };
  31. memory@0 {
  32. device_type = "memory";
  33. reg = <0x00000000 0x20000000>; /* 512 MB */
  34. };
  35. soc {
  36. ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
  37. MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
  38. MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
  39. internal-regs {
  40. /* RTC provided by Seiko S-35390A I2C RTC chip below */
  41. rtc@10300 {
  42. status = "disabled";
  43. };
  44. i2c@11000 {
  45. compatible = "marvell,mv64xxx-i2c";
  46. pinctrl-0 = <&i2c0_pins>;
  47. pinctrl-names = "default";
  48. clock-frequency = <400000>;
  49. status = "okay";
  50. /* Main device RTC chip */
  51. s35390a: s35390a@30 {
  52. compatible = "sii,s35390a";
  53. reg = <0x30>;
  54. };
  55. };
  56. /* Connected to a header on device's PCB */
  57. serial@12000 {
  58. status = "okay";
  59. };
  60. /* Connected to a TI MSP430F2111 for power control */
  61. serial@12100 {
  62. status = "okay";
  63. };
  64. poweroff@12100 {
  65. compatible = "synology,power-off";
  66. reg = <0x12100 0x100>;
  67. clocks = <&coreclk 0>;
  68. };
  69. /* rear USB port, near reset button */
  70. usb@50000 {
  71. status = "okay";
  72. };
  73. /* rear USB port, near RJ45 port */
  74. usb@51000 {
  75. status = "okay";
  76. };
  77. ethernet@70000 {
  78. status = "okay";
  79. phy = <&phy1>;
  80. phy-mode = "sgmii";
  81. };
  82. sata@a0000 {
  83. nr-ports = <2>;
  84. status = "okay";
  85. };
  86. };
  87. };
  88. gpio-fan-32-38 {
  89. status = "okay";
  90. compatible = "gpio-fan";
  91. pinctrl-0 = <&fan_ctrl_low_pin &fan_ctrl_mid_pin
  92. &fan_ctrl_high_pin &fan_alarm_pin>;
  93. pinctrl-names = "default";
  94. gpios = <&gpio1 31 GPIO_ACTIVE_HIGH
  95. &gpio2 0 GPIO_ACTIVE_HIGH
  96. &gpio2 1 GPIO_ACTIVE_HIGH>;
  97. alarm-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
  98. gpio-fan,speed-map = < 0 0
  99. 1000 1
  100. 1150 2
  101. 1350 4
  102. 1500 3
  103. 1650 5
  104. 1750 6
  105. 1900 7 >;
  106. };
  107. gpio-leds {
  108. compatible = "gpio-leds";
  109. pinctrl-0 = <&disk1_led_pin
  110. &disk2_led_pin>;
  111. pinctrl-names = "default";
  112. disk1-led-amber {
  113. label = "synology:amber:disk1";
  114. gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
  115. default-state = "keep";
  116. };
  117. disk2-led-amber {
  118. label = "synology:amber:disk2";
  119. gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
  120. default-state = "keep";
  121. };
  122. };
  123. regulators {
  124. compatible = "simple-bus";
  125. #address-cells = <1>;
  126. #size-cells = <0>;
  127. pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin>;
  128. pinctrl-names = "default";
  129. sata1_regulator: sata1-regulator@1 {
  130. compatible = "regulator-fixed";
  131. reg = <1>;
  132. regulator-name = "SATA1 Power";
  133. regulator-min-microvolt = <5000000>;
  134. regulator-max-microvolt = <5000000>;
  135. startup-delay-us = <2000000>;
  136. enable-active-high;
  137. regulator-always-on;
  138. regulator-boot-on;
  139. gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
  140. };
  141. sata2_regulator: sata2-regulator@2 {
  142. compatible = "regulator-fixed";
  143. reg = <2>;
  144. regulator-name = "SATA2 Power";
  145. regulator-min-microvolt = <5000000>;
  146. regulator-max-microvolt = <5000000>;
  147. startup-delay-us = <4000000>;
  148. enable-active-high;
  149. regulator-always-on;
  150. regulator-boot-on;
  151. gpio = <&gpio1 30 GPIO_ACTIVE_HIGH>;
  152. };
  153. };
  154. };
  155. &mdio {
  156. phy1: ethernet-phy@1 { /* Marvell 88E1512 */
  157. reg = <1>;
  158. };
  159. };
  160. &pinctrl {
  161. disk1_led_pin: disk1-led-pin {
  162. marvell,pins = "mpp31";
  163. marvell,function = "gpio";
  164. };
  165. disk2_led_pin: disk2-led-pin {
  166. marvell,pins = "mpp32";
  167. marvell,function = "gpio";
  168. };
  169. sata1_pwr_pin: sata1-pwr-pin {
  170. marvell,pins = "mpp37";
  171. marvell,function = "gpio";
  172. };
  173. sata2_pwr_pin: sata2-pwr-pin {
  174. marvell,pins = "mpp62";
  175. marvell,function = "gpio";
  176. };
  177. sata1_pres_pin: sata1-pres-pin {
  178. marvell,pins = "mpp60";
  179. marvell,function = "gpio";
  180. };
  181. sata2_pres_pin: sata2-pres-pin {
  182. marvell,pins = "mpp48";
  183. marvell,function = "gpio";
  184. };
  185. syno_id_bit0_pin: syno-id-bit0-pin {
  186. marvell,pins = "mpp55";
  187. marvell,function = "gpio";
  188. };
  189. syno_id_bit1_pin: syno-id-bit1-pin {
  190. marvell,pins = "mpp56";
  191. marvell,function = "gpio";
  192. };
  193. syno_id_bit2_pin: syno-id-bit2-pin {
  194. marvell,pins = "mpp57";
  195. marvell,function = "gpio";
  196. };
  197. syno_id_bit3_pin: syno-id-bit3-pin {
  198. marvell,pins = "mpp58";
  199. marvell,function = "gpio";
  200. };
  201. fan_ctrl_low_pin: fan-ctrl-low-pin {
  202. marvell,pins = "mpp65";
  203. marvell,function = "gpio";
  204. };
  205. fan_ctrl_mid_pin: fan-ctrl-mid-pin {
  206. marvell,pins = "mpp64";
  207. marvell,function = "gpio";
  208. };
  209. fan_ctrl_high_pin: fan-ctrl-high-pin {
  210. marvell,pins = "mpp63";
  211. marvell,function = "gpio";
  212. };
  213. fan_alarm_pin: fan-alarm-pin {
  214. marvell,pins = "mpp38";
  215. marvell,function = "gpio";
  216. };
  217. };
  218. &spi0 {
  219. status = "okay";
  220. flash@0 {
  221. #address-cells = <1>;
  222. #size-cells = <1>;
  223. compatible = "micron,n25q064", "jedec,spi-nor";
  224. reg = <0>; /* Chip select 0 */
  225. spi-max-frequency = <20000000>;
  226. /*
  227. * Warning!
  228. *
  229. * Synology u-boot uses its compiled-in environment
  230. * and it seems Synology did not care to change u-boot
  231. * default configuration in order to allow saving a
  232. * modified environment at a sensible location. So,
  233. * if you do a 'saveenv' under u-boot, your modified
  234. * environment will be saved at 1MB after the start
  235. * of the flash, i.e. in the middle of the uImage.
  236. * For that reason, it is strongly advised not to
  237. * change the default environment, unless you know
  238. * what you are doing.
  239. */
  240. partition@0 { /* u-boot */
  241. label = "RedBoot";
  242. reg = <0x00000000 0x000c0000>; /* 768KB */
  243. };
  244. partition@c0000 { /* uImage */
  245. label = "zImage";
  246. reg = <0x000c0000 0x002d0000>; /* 2880KB */
  247. };
  248. partition@390000 { /* uInitramfs */
  249. label = "rd.gz";
  250. reg = <0x00390000 0x00440000>; /* 4250KB */
  251. };
  252. partition@7d0000 { /* MAC address and serial number */
  253. label = "vendor";
  254. reg = <0x007d0000 0x00010000>; /* 64KB */
  255. };
  256. partition@7e0000 {
  257. label = "RedBoot config";
  258. reg = <0x007e0000 0x00010000>; /* 64KB */
  259. };
  260. partition@7f0000 {
  261. label = "FIS directory";
  262. reg = <0x007f0000 0x00010000>; /* 64KB */
  263. };
  264. };
  265. };