arm-realview-pba8.dts 3.8 KB

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  1. /*
  2. * Copyright 2016 Linaro Ltd
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a copy
  5. * of this software and associated documentation files (the "Software"), to deal
  6. * in the Software without restriction, including without limitation the rights
  7. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  8. * copies of the Software, and to permit persons to whom the Software is
  9. * furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  18. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  19. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  20. * THE SOFTWARE.
  21. */
  22. /dts-v1/;
  23. #include "arm-realview-pbx.dtsi"
  24. / {
  25. model = "ARM RealView Platform Baseboard for Cortex-A8";
  26. compatible = "arm,realview-pba8";
  27. arm,hbi = <0x178>;
  28. cpus {
  29. #address-cells = <1>;
  30. #size-cells = <0>;
  31. enable-method = "arm,realview-smp";
  32. cpu0: cpu@0 {
  33. device_type = "cpu";
  34. compatible = "arm,cortex-a8";
  35. reg = <0>;
  36. };
  37. };
  38. pmu: pmu@0 {
  39. compatible = "arm,cortex-a8-pmu";
  40. interrupt-parent = <&intc>;
  41. interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
  42. interrupt-affinity = <&cpu0>;
  43. };
  44. /* Primary GIC PL390 interrupt controller in the test chip */
  45. intc: interrupt-controller@1e000000 {
  46. compatible = "arm,pl390";
  47. #interrupt-cells = <3>;
  48. #address-cells = <1>;
  49. interrupt-controller;
  50. reg = <0x1e001000 0x1000>,
  51. <0x1e000000 0x100>;
  52. };
  53. };
  54. &ethernet {
  55. interrupt-parent = <&intc>;
  56. interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
  57. };
  58. &usb {
  59. interrupt-parent = <&intc>;
  60. interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
  61. };
  62. &soc {
  63. compatible = "arm,realview-pba8-soc", "simple-bus";
  64. };
  65. &syscon {
  66. compatible = "arm,realview-pba8-syscon", "syscon", "simple-mfd";
  67. };
  68. &serial0 {
  69. interrupt-parent = <&intc>;
  70. interrupts = <0 12 IRQ_TYPE_LEVEL_HIGH>;
  71. };
  72. &serial1 {
  73. interrupt-parent = <&intc>;
  74. interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>;
  75. };
  76. &serial2 {
  77. interrupt-parent = <&intc>;
  78. interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
  79. };
  80. &serial3 {
  81. interrupt-parent = <&intc>;
  82. interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
  83. };
  84. &ssp {
  85. interrupt-parent = <&intc>;
  86. interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
  87. };
  88. &wdog0 {
  89. interrupt-parent = <&intc>;
  90. interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>;
  91. };
  92. &wdog1 {
  93. interrupt-parent = <&intc>;
  94. interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
  95. };
  96. &timer01 {
  97. interrupt-parent = <&intc>;
  98. interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
  99. };
  100. &timer23 {
  101. interrupt-parent = <&intc>;
  102. interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
  103. };
  104. &gpio0 {
  105. interrupt-parent = <&intc>;
  106. interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
  107. };
  108. &gpio1 {
  109. interrupt-parent = <&intc>;
  110. interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
  111. };
  112. &gpio2 {
  113. interrupt-parent = <&intc>;
  114. interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
  115. };
  116. &rtc {
  117. interrupt-parent = <&intc>;
  118. interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
  119. };
  120. &timer45 {
  121. interrupt-parent = <&intc>;
  122. interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
  123. };
  124. &timer67 {
  125. interrupt-parent = <&intc>;
  126. interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>;
  127. };
  128. &aaci {
  129. interrupt-parent = <&intc>;
  130. interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>;
  131. };
  132. &mmc {
  133. interrupt-parent = <&intc>;
  134. interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH>,
  135. <0 18 IRQ_TYPE_LEVEL_HIGH>;
  136. };
  137. &kmi0 {
  138. interrupt-parent = <&intc>;
  139. interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>;
  140. };
  141. &kmi1 {
  142. interrupt-parent = <&intc>;
  143. interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
  144. };
  145. &clcd {
  146. interrupt-parent = <&intc>;
  147. interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
  148. };