am5729-beagleboneai.dts 14 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2014-2019 Texas Instruments Incorporated - http://www.ti.com/
  4. */
  5. /dts-v1/;
  6. #include "dra74x.dtsi"
  7. #include "am57xx-commercial-grade.dtsi"
  8. #include "dra74x-mmc-iodelay.dtsi"
  9. #include "dra74-ipu-dsp-common.dtsi"
  10. #include <dt-bindings/gpio/gpio.h>
  11. #include <dt-bindings/interrupt-controller/irq.h>
  12. #include <dt-bindings/pinctrl/dra.h>
  13. / {
  14. model = "BeagleBoard.org BeagleBone AI";
  15. compatible = "beagle,am5729-beagleboneai", "ti,am5728",
  16. "ti,dra742", "ti,dra74", "ti,dra7";
  17. aliases {
  18. rtc0 = &tps659038_rtc;
  19. rtc1 = &rtc;
  20. display0 = &hdmi_conn;
  21. };
  22. chosen {
  23. stdout-path = &uart1;
  24. };
  25. memory@0 {
  26. device_type = "memory";
  27. reg = <0x0 0x80000000 0x0 0x40000000>;
  28. };
  29. reserved-memory {
  30. #address-cells = <2>;
  31. #size-cells = <2>;
  32. ranges;
  33. ipu2_memory_region: ipu2-memory@95800000 {
  34. compatible = "shared-dma-pool";
  35. reg = <0x0 0x95800000 0x0 0x3800000>;
  36. reusable;
  37. status = "okay";
  38. };
  39. dsp1_memory_region: dsp1-memory@99000000 {
  40. compatible = "shared-dma-pool";
  41. reg = <0x0 0x99000000 0x0 0x4000000>;
  42. reusable;
  43. status = "okay";
  44. };
  45. ipu1_memory_region: ipu1-memory@9d000000 {
  46. compatible = "shared-dma-pool";
  47. reg = <0x0 0x9d000000 0x0 0x2000000>;
  48. reusable;
  49. status = "okay";
  50. };
  51. dsp2_memory_region: dsp2-memory@9f000000 {
  52. compatible = "shared-dma-pool";
  53. reg = <0x0 0x9f000000 0x0 0x800000>;
  54. reusable;
  55. status = "okay";
  56. };
  57. };
  58. vdd_adc: gpioregulator-vdd_adc {
  59. compatible = "regulator-gpio";
  60. regulator-name = "vdd_adc";
  61. vin-supply = <&vdd_5v>;
  62. regulator-min-microvolt = <1800000>;
  63. regulator-max-microvolt = <3300000>;
  64. regulator-always-on;
  65. regulator-boot-on;
  66. gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>;
  67. states = <1800000 0
  68. 3300000 1>;
  69. };
  70. vdd_5v: fixedregulator-vdd_5v {
  71. compatible = "regulator-fixed";
  72. regulator-name = "vdd_5v";
  73. regulator-min-microvolt = <5000000>;
  74. regulator-max-microvolt = <5000000>;
  75. regulator-always-on;
  76. regulator-boot-on;
  77. };
  78. vtt_fixed: fixedregulator-vtt {
  79. /* TPS51200 */
  80. compatible = "regulator-fixed";
  81. regulator-name = "vtt_fixed";
  82. vin-supply = <&vdd_ddr>;
  83. regulator-min-microvolt = <3300000>;
  84. regulator-max-microvolt = <3300000>;
  85. regulator-always-on;
  86. regulator-boot-on;
  87. };
  88. leds {
  89. compatible = "gpio-leds";
  90. led0 {
  91. label = "beaglebone:green:usr0";
  92. gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
  93. linux,default-trigger = "heartbeat";
  94. default-state = "off";
  95. };
  96. led1 {
  97. label = "beaglebone:green:usr1";
  98. gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
  99. linux,default-trigger = "mmc0";
  100. default-state = "off";
  101. };
  102. led2 {
  103. label = "beaglebone:green:usr2";
  104. gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
  105. linux,default-trigger = "cpu";
  106. default-state = "off";
  107. };
  108. led3 {
  109. label = "beaglebone:green:usr3";
  110. gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
  111. linux,default-trigger = "mmc1";
  112. default-state = "off";
  113. };
  114. led4 {
  115. label = "beaglebone:green:usr4";
  116. gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>;
  117. linux,default-trigger = "netdev";
  118. default-state = "off";
  119. };
  120. };
  121. hdmi_conn: connector@0 {
  122. compatible = "hdmi-connector";
  123. label = "hdmi";
  124. type = "a";
  125. port {
  126. hdmi_connector_in: endpoint {
  127. remote-endpoint = <&hdmi_encoder_out>;
  128. };
  129. };
  130. };
  131. hdmi_enc: encoder@0 {
  132. /* "ti,tpd12s016" software compatible with "ti,tpd12s015"
  133. * no need for individual driver
  134. */
  135. compatible = "ti,tpd12s015";
  136. gpios = <0>,
  137. <0>,
  138. <&gpio7 12 GPIO_ACTIVE_HIGH>;
  139. ports {
  140. #address-cells = <0x1>;
  141. #size-cells = <0x0>;
  142. port@0 {
  143. reg = <0x0>;
  144. hdmi_encoder_in: endpoint@0 {
  145. remote-endpoint = <&hdmi_out>;
  146. };
  147. };
  148. port@1 {
  149. reg = <0x1>;
  150. hdmi_encoder_out: endpoint@0 {
  151. remote-endpoint = <&hdmi_connector_in>;
  152. };
  153. };
  154. };
  155. };
  156. emmc_pwrseq: emmc_pwrseq {
  157. compatible = "mmc-pwrseq-emmc";
  158. reset-gpios = <&gpio5 7 GPIO_ACTIVE_LOW>;
  159. };
  160. brcmf_pwrseq: brcmf_pwrseq {
  161. compatible = "mmc-pwrseq-simple";
  162. reset-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>, /* BT-REG-ON */
  163. <&gpio3 18 GPIO_ACTIVE_LOW>; /* WL-REG-ON */
  164. };
  165. extcon_usb1: extcon_usb1 {
  166. compatible = "linux,extcon-usb-gpio";
  167. ti,enable-id-detection;
  168. id-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
  169. };
  170. };
  171. &i2c1 {
  172. status = "okay";
  173. clock-frequency = <400000>;
  174. tps659038: tps659038@58 {
  175. compatible = "ti,tps659038";
  176. reg = <0x58>;
  177. interrupt-parent = <&gpio6>;
  178. interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
  179. #interrupt-cells = <2>;
  180. interrupt-controller;
  181. ti,system-power-controller;
  182. ti,palmas-override-powerhold;
  183. tps659038_pmic {
  184. compatible = "ti,tps659038-pmic";
  185. smps12-in-supply = <&vdd_5v>;
  186. smps3-in-supply = <&vdd_5v>;
  187. smps45-in-supply = <&vdd_5v>;
  188. smps6-in-supply = <&vdd_5v>;
  189. smps7-in-supply = <&vdd_5v>;
  190. mps3-in-supply = <&vdd_5v>;
  191. smps8-in-supply = <&vdd_5v>;
  192. smps9-in-supply = <&vdd_5v>;
  193. ldo1-in-supply = <&vdd_5v>;
  194. ldo2-in-supply = <&vdd_5v>;
  195. ldo3-in-supply = <&vdd_5v>;
  196. ldo4-in-supply = <&vdd_5v>;
  197. ldo9-in-supply = <&vdd_5v>;
  198. ldoln-in-supply = <&vdd_5v>;
  199. ldousb-in-supply = <&vdd_5v>;
  200. ldortc-in-supply = <&vdd_5v>;
  201. regulators {
  202. vdd_mpu: smps12 {
  203. /* VDD_MPU */
  204. regulator-name = "smps12";
  205. regulator-min-microvolt = <850000>;
  206. regulator-max-microvolt = <1250000>;
  207. regulator-always-on;
  208. regulator-boot-on;
  209. };
  210. vdd_ddr: smps3 {
  211. /* VDD_DDR EMIF1 EMIF2 */
  212. regulator-name = "smps3";
  213. regulator-min-microvolt = <1350000>;
  214. regulator-max-microvolt = <1350000>;
  215. regulator-always-on;
  216. regulator-boot-on;
  217. };
  218. vdd_dspeve: smps45 {
  219. /* VDD_DSPEVE on AM572 */
  220. regulator-name = "smps45";
  221. regulator-min-microvolt = < 850000>;
  222. regulator-max-microvolt = <1250000>;
  223. regulator-always-on;
  224. regulator-boot-on;
  225. };
  226. vdd_gpu: smps6 {
  227. /* VDD_GPU */
  228. regulator-name = "smps6";
  229. regulator-min-microvolt = < 850000>;
  230. regulator-max-microvolt = <1250000>;
  231. regulator-always-on;
  232. regulator-boot-on;
  233. };
  234. vdd_core: smps7 {
  235. /* VDD_CORE */
  236. regulator-name = "smps7";
  237. regulator-min-microvolt = < 850000>; /*** 1.15V */
  238. regulator-max-microvolt = <1150000>;
  239. regulator-always-on;
  240. regulator-boot-on;
  241. };
  242. vdd_iva: smps8 {
  243. /* VDD_IVAHD */ /*** 1.06V */
  244. regulator-name = "smps8";
  245. };
  246. vdd_3v3: smps9 {
  247. /* VDD_3V3 */
  248. regulator-name = "smps9";
  249. regulator-min-microvolt = <3300000>;
  250. regulator-max-microvolt = <3300000>;
  251. regulator-always-on;
  252. regulator-boot-on;
  253. };
  254. vdd_sd: ldo1 {
  255. /* VDDSHV8 - VSDMMC */
  256. regulator-name = "ldo1";
  257. regulator-min-microvolt = <1800000>;
  258. regulator-max-microvolt = <3300000>;
  259. regulator-boot-on;
  260. regulator-always-on;
  261. };
  262. vdd_1v8: ldo2 {
  263. /* VDDSH18V */
  264. regulator-name = "ldo2";
  265. regulator-min-microvolt = <1800000>;
  266. regulator-max-microvolt = <1800000>;
  267. regulator-always-on;
  268. regulator-boot-on;
  269. };
  270. vdd_1v8_phy_ldo3: ldo3 {
  271. /* R1.3a 572x V1_8PHY_LDO3: USB, SATA */
  272. regulator-name = "ldo3";
  273. regulator-min-microvolt = <1800000>;
  274. regulator-max-microvolt = <1800000>;
  275. regulator-always-on;
  276. regulator-boot-on;
  277. };
  278. vdd_1v8_phy_ldo4: ldo4 {
  279. /* R1.3a 572x V1_8PHY_LDO4: PCIE, HDMI*/
  280. regulator-name = "ldo4";
  281. regulator-min-microvolt = <1800000>;
  282. regulator-max-microvolt = <1800000>;
  283. regulator-always-on;
  284. regulator-boot-on;
  285. };
  286. /* LDO5-8 unused */
  287. vdd_rtc: ldo9 {
  288. /* VDD_RTC */
  289. regulator-name = "ldo9";
  290. regulator-min-microvolt = < 840000>;
  291. regulator-max-microvolt = <1160000>;
  292. regulator-always-on;
  293. regulator-boot-on;
  294. };
  295. vdd_1v8_pll: ldoln {
  296. /* VDDA_1V8_PLL */
  297. regulator-name = "ldoln";
  298. regulator-min-microvolt = <1800000>;
  299. regulator-max-microvolt = <1800000>;
  300. regulator-always-on;
  301. regulator-boot-on;
  302. };
  303. ldousb_reg: ldousb {
  304. /* VDDA_3V_USB: VDDA_USBHS33 */
  305. regulator-name = "ldousb";
  306. regulator-min-microvolt = <3300000>;
  307. regulator-max-microvolt = <3300000>;
  308. regulator-always-on;
  309. regulator-boot-on;
  310. };
  311. ldortc_reg: ldortc {
  312. /* VDDA_RTC */
  313. regulator-name = "ldortc";
  314. regulator-min-microvolt = <1800000>;
  315. regulator-max-microvolt = <1800000>;
  316. regulator-always-on;
  317. regulator-boot-on;
  318. };
  319. regen1: regen1 {
  320. /* VDD_3V3_ON */
  321. regulator-name = "regen1";
  322. regulator-boot-on;
  323. regulator-always-on;
  324. };
  325. regen2: regen2 {
  326. /* Needed for PMIC internal resource */
  327. regulator-name = "regen2";
  328. regulator-boot-on;
  329. regulator-always-on;
  330. };
  331. };
  332. };
  333. tps659038_rtc: tps659038_rtc {
  334. compatible = "ti,palmas-rtc";
  335. interrupt-parent = <&tps659038>;
  336. interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
  337. wakeup-source;
  338. };
  339. tps659038_pwr_button: tps659038_pwr_button {
  340. compatible = "ti,palmas-pwrbutton";
  341. interrupt-parent = <&tps659038>;
  342. interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
  343. wakeup-source;
  344. ti,palmas-long-press-seconds = <12>;
  345. };
  346. tps659038_gpio: tps659038_gpio {
  347. compatible = "ti,palmas-gpio";
  348. gpio-controller;
  349. #gpio-cells = <2>;
  350. };
  351. };
  352. /* STMPE811 touch screen controller */
  353. stmpe811@41 {
  354. compatible = "st,stmpe811";
  355. reg = <0x41>;
  356. interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
  357. interrupt-parent = <&gpio2>;
  358. interrupt-controller;
  359. id = <0>;
  360. blocks = <0x5>;
  361. irq-trigger = <0x1>;
  362. st,mod-12b = <1>; /* 12-bit ADC */
  363. st,ref-sel = <0>; /* internal ADC reference */
  364. st,adc-freq = <1>; /* 3.25 MHz ADC clock speed */
  365. st,sample-time = <4>; /* ADC converstion time: 80 clocks */
  366. stmpe_adc {
  367. compatible = "st,stmpe-adc";
  368. st,norequest-mask = <0x00>; /* mask any channels to be used by touchscreen */
  369. adc0: iio-device@0 {
  370. #io-channel-cells = <1>;
  371. iio-channels = <&adc0 4>, <&adc0 1>, <&adc0 2>, <&adc0 3>, <&adc0 4>, <&adc0 5>, <&adc0 6>;
  372. iio-channel-names = "AIN0_P9_39", "AIN1_P9_40", "AIN2_P9_37", "AIN3_P9_38",
  373. "AIN4_P9_33", "AIN5_P9_36", "AIN6_P9_35";
  374. };
  375. };
  376. stmpe_touchscreen {
  377. status = "disabled";
  378. compatible = "st,stmpe-ts";
  379. /* 8 sample average control */
  380. st,ave-ctrl = <3>;
  381. /* 7 length fractional part in z */
  382. st,fraction-z = <7>;
  383. /*
  384. * 50 mA typical 80 mA max touchscreen drivers
  385. * current limit value
  386. */
  387. st,i-drive = <1>;
  388. /* 1 ms panel driver settling time */
  389. st,settling = <3>;
  390. /* 5 ms touch detect interrupt delay */
  391. st,touch-det-delay = <5>;
  392. };
  393. stmpe_gpio {
  394. compatible = "st,stmpe-gpio";
  395. };
  396. stmpe_pwm {
  397. compatible = "st,stmpe-pwm";
  398. #pwm-cells = <2>;
  399. };
  400. };
  401. };
  402. &mcspi3 {
  403. status = "okay";
  404. ti,pindir-d0-out-d1-in;
  405. sn65hvs882: sn65hvs882@0 {
  406. compatible = "pisosr-gpio";
  407. gpio-controller;
  408. #gpio-cells = <2>;
  409. reg = <0>;
  410. spi-max-frequency = <1000000>;
  411. spi-cpol;
  412. };
  413. };
  414. &cpu0 {
  415. vdd-supply = <&vdd_mpu>;
  416. voltage-tolerance = <1>;
  417. };
  418. &uart1 {
  419. status = "okay";
  420. };
  421. &davinci_mdio_sw {
  422. reset-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
  423. reset-delay-us = <2>;
  424. phy0: ethernet-phy@4 {
  425. reg = <4>;
  426. eee-broken-100tx;
  427. eee-broken-1000t;
  428. };
  429. };
  430. &mac_sw {
  431. status = "okay";
  432. };
  433. &cpsw_port1 {
  434. phy-handle = <&phy0>;
  435. phy-mode = "rgmii-rxid";
  436. ti,dual-emac-pvid = <1>;
  437. };
  438. &cpsw_port2 {
  439. status = "disabled";
  440. };
  441. &ocp {
  442. pruss1_shmem: pruss_shmem@4b200000 {
  443. status = "okay";
  444. compatible = "ti,pruss-shmem";
  445. reg = <0x4b200000 0x020000>;
  446. };
  447. pruss2_shmem: pruss_shmem@4b280000 {
  448. status = "okay";
  449. compatible = "ti,pruss-shmem";
  450. reg = <0x4b280000 0x020000>;
  451. };
  452. };
  453. &mmc1 {
  454. status = "okay";
  455. vmmc-supply = <&vdd_3v3>;
  456. vqmmc-supply = <&vdd_sd>;
  457. bus-width = <4>;
  458. cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
  459. pinctrl-names = "default";
  460. pinctrl-0 = <&mmc1_pins_default>;
  461. };
  462. &mmc2 {
  463. status = "okay";
  464. vmmc-supply = <&vdd_1v8>;
  465. vqmmc-supply = <&vdd_1v8>;
  466. bus-width = <8>;
  467. ti,non-removable;
  468. non-removable;
  469. mmc-pwrseq = <&emmc_pwrseq>;
  470. ti,needs-special-reset;
  471. dmas = <&sdma_xbar 47>, <&sdma_xbar 48>;
  472. dma-names = "tx", "rx";
  473. };
  474. &mmc4 {
  475. /* DS: Default speed (DS) up to 25 MHz, including 1- and 4-bit modes (3.3 V signaling). */
  476. /* HS: High speed up to 50 MHz (3.3 V signaling). */
  477. /* SDR12: SDR up to 25 MHz (1.8 V signaling). */
  478. /* SDR25: SDR up to 50 MHz (1.8 V signaling). */
  479. /* SDR50: SDR up to 100 MHz (1.8 V signaling). */
  480. /* SDR104: SDR up to 208 MHz (1.8 V signaling) */
  481. /* DDR50: DDR up to 50 MHz (1.8 V signaling). */
  482. status = "okay";
  483. ti,needs-special-reset;
  484. vmmc-supply = <&vdd_3v3>;
  485. cap-power-off-card;
  486. keep-power-in-suspend;
  487. bus-width = <4>;
  488. ti,non-removable;
  489. non-removable;
  490. no-1-8-v;
  491. max-frequency = <24000000>;
  492. #address-cells = <1>;
  493. #size-cells = <0>;
  494. mmc-pwrseq = <&brcmf_pwrseq>;
  495. brcmf: wifi@1 {
  496. status = "okay";
  497. reg = <1>;
  498. compatible = "brcm,bcm4329-fmac";
  499. brcm,sd-head-align = <4>;
  500. brcm,sd_head_align = <4>;
  501. brcm,sd_sgentry_align = <512>;
  502. interrupt-parent = <&gpio3>;
  503. interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
  504. interrupt-names = "host-wake";
  505. };
  506. };
  507. &usb2_phy1 {
  508. phy-supply = <&ldousb_reg>;
  509. };
  510. &usb2_phy2 {
  511. phy-supply = <&ldousb_reg>;
  512. };
  513. &usb1 {
  514. status = "okay";
  515. dr_mode = "otg";
  516. };
  517. &omap_dwc3_1 {
  518. extcon = <&extcon_usb1>;
  519. };
  520. &usb2 {
  521. status = "okay";
  522. dr_mode = "host";
  523. };
  524. &dss {
  525. status = "okay";
  526. vdda_video-supply = <&vdd_1v8_pll>;
  527. };
  528. &hdmi {
  529. status = "okay";
  530. vdda-supply = <&vdd_1v8_phy_ldo4>;
  531. port {
  532. hdmi_out: endpoint {
  533. remote-endpoint = <&hdmi_encoder_in>;
  534. };
  535. };
  536. };
  537. &bandgap {
  538. status = "okay";
  539. };
  540. &cpu_alert0 {
  541. temperature = <55000>; /* milliCelsius */
  542. };
  543. &cpu_crit {
  544. temperature = <85000>; /* milliCelsius */
  545. };
  546. &gpu_crit {
  547. temperature = <85000>; /* milliCelsius */
  548. };
  549. &core_crit {
  550. temperature = <85000>; /* milliCelsius */
  551. };
  552. &dspeve_crit {
  553. temperature = <85000>; /* milliCelsius */
  554. };
  555. &iva_crit {
  556. temperature = <85000>; /* milliCelsius */
  557. };
  558. &sata {
  559. status = "disabled";
  560. };
  561. &sata_phy {
  562. status = "disabled";
  563. };
  564. /* bluetooth */
  565. &uart6 {
  566. status = "okay";
  567. };
  568. /* cape header stuff */
  569. &i2c4 {
  570. status = "okay";
  571. clock-frequency = <100000>;
  572. };
  573. &cpu0_opp_table {
  574. opp_slow-500000000 {
  575. opp-shared;
  576. };
  577. };
  578. &ipu2 {
  579. status = "okay";
  580. memory-region = <&ipu2_memory_region>;
  581. };
  582. &ipu1 {
  583. status = "okay";
  584. memory-region = <&ipu1_memory_region>;
  585. };
  586. &dsp1 {
  587. status = "okay";
  588. memory-region = <&dsp1_memory_region>;
  589. };
  590. &dsp2 {
  591. status = "okay";
  592. memory-region = <&dsp2_memory_region>;
  593. };