am437x-sk-evm.dts 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
  4. */
  5. /* AM437x SK EVM */
  6. /dts-v1/;
  7. #include "am4372.dtsi"
  8. #include <dt-bindings/pinctrl/am43xx.h>
  9. #include <dt-bindings/pwm/pwm.h>
  10. #include <dt-bindings/gpio/gpio.h>
  11. #include <dt-bindings/input/input.h>
  12. #include <dt-bindings/interrupt-controller/irq.h>
  13. / {
  14. model = "TI AM437x SK EVM";
  15. compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43";
  16. aliases {
  17. display0 = &lcd0;
  18. };
  19. chosen {
  20. stdout-path = &uart0;
  21. };
  22. /* fixed 32k external oscillator clock */
  23. clk_32k_rtc: clk_32k_rtc {
  24. #clock-cells = <0>;
  25. compatible = "fixed-clock";
  26. clock-frequency = <32768>;
  27. };
  28. lcd_bl: backlight {
  29. compatible = "pwm-backlight";
  30. pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
  31. brightness-levels = <0 51 53 56 62 75 101 152 255>;
  32. default-brightness-level = <8>;
  33. };
  34. sound {
  35. compatible = "simple-audio-card";
  36. simple-audio-card,name = "AM437x-SK-EVM";
  37. simple-audio-card,widgets =
  38. "Headphone", "Headphone Jack",
  39. "Line", "Line In";
  40. simple-audio-card,routing =
  41. "Headphone Jack", "HPLOUT",
  42. "Headphone Jack", "HPROUT",
  43. "LINE1L", "Line In",
  44. "LINE1R", "Line In";
  45. simple-audio-card,format = "dsp_b";
  46. simple-audio-card,bitclock-master = <&sound_master>;
  47. simple-audio-card,frame-master = <&sound_master>;
  48. simple-audio-card,bitclock-inversion;
  49. simple-audio-card,cpu {
  50. sound-dai = <&mcasp1>;
  51. };
  52. sound_master: simple-audio-card,codec {
  53. sound-dai = <&tlv320aic3106>;
  54. system-clock-frequency = <24000000>;
  55. };
  56. };
  57. matrix_keypad: matrix_keypad0 {
  58. compatible = "gpio-matrix-keypad";
  59. pinctrl-names = "default";
  60. pinctrl-0 = <&matrix_keypad_pins>;
  61. debounce-delay-ms = <5>;
  62. col-scan-delay-us = <5>;
  63. row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH /* Bank5, pin5 */
  64. &gpio5 6 GPIO_ACTIVE_HIGH>; /* Bank5, pin6 */
  65. col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH /* Bank5, pin13 */
  66. &gpio5 4 GPIO_ACTIVE_HIGH>; /* Bank5, pin4 */
  67. linux,keymap = <
  68. MATRIX_KEY(0, 0, KEY_DOWN)
  69. MATRIX_KEY(0, 1, KEY_RIGHT)
  70. MATRIX_KEY(1, 0, KEY_LEFT)
  71. MATRIX_KEY(1, 1, KEY_UP)
  72. >;
  73. };
  74. leds {
  75. compatible = "gpio-leds";
  76. pinctrl-names = "default";
  77. pinctrl-0 = <&leds_pins>;
  78. led0 {
  79. label = "am437x-sk:red:heartbeat";
  80. gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */
  81. linux,default-trigger = "heartbeat";
  82. default-state = "off";
  83. };
  84. led1 {
  85. label = "am437x-sk:green:mmc1";
  86. gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */
  87. linux,default-trigger = "mmc0";
  88. default-state = "off";
  89. };
  90. led2 {
  91. label = "am437x-sk:blue:cpu0";
  92. gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */
  93. linux,default-trigger = "cpu0";
  94. default-state = "off";
  95. };
  96. led3 {
  97. label = "am437x-sk:blue:usr3";
  98. gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */
  99. default-state = "off";
  100. };
  101. };
  102. lcd0: display {
  103. compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi";
  104. label = "lcd";
  105. pinctrl-names = "default";
  106. pinctrl-0 = <&lcd_pins>;
  107. backlight = <&lcd_bl>;
  108. enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
  109. port {
  110. lcd_in: endpoint {
  111. remote-endpoint = <&dpi_out>;
  112. };
  113. };
  114. };
  115. vmmcwl_fixed: fixedregulator-mmcwl {
  116. /*
  117. * WL_EN is not SDIO standard compliant. It is an out of band
  118. * signal and hard to be dealt with in a standard way by the
  119. * SDIO core driver.
  120. * So modelling the WL_EN line as a regulator was a natural
  121. * choice as the MMC core already deals with MMC supplies.
  122. */
  123. compatible = "regulator-fixed";
  124. regulator-name = "vmmcwl_fixed";
  125. regulator-min-microvolt = <1800000>;
  126. regulator-max-microvolt = <1800000>;
  127. gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
  128. enable-active-high;
  129. };
  130. };
  131. &am43xx_pinmux {
  132. matrix_keypad_pins: matrix_keypad_pins {
  133. pinctrl-single,pins = <
  134. AM4372_IOPAD(0xa4c, PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */
  135. AM4372_IOPAD(0xa50, PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */
  136. AM4372_IOPAD(0xa54, PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */
  137. AM4372_IOPAD(0xa58, PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */
  138. >;
  139. };
  140. leds_pins: leds_pins {
  141. pinctrl-single,pins = <
  142. AM4372_IOPAD(0xa28, PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */
  143. AM4372_IOPAD(0xa2c, PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */
  144. AM4372_IOPAD(0xa30, PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */
  145. AM4372_IOPAD(0xa34, PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */
  146. >;
  147. };
  148. i2c0_pins: i2c0_pins {
  149. pinctrl-single,pins = <
  150. AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
  151. AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
  152. >;
  153. };
  154. i2c1_pins: i2c1_pins {
  155. pinctrl-single,pins = <
  156. AM4372_IOPAD(0x95c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
  157. AM4372_IOPAD(0x958, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
  158. >;
  159. };
  160. mmc1_pins: pinmux_mmc1_pins {
  161. pinctrl-single,pins = <
  162. AM4372_IOPAD(0x8f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
  163. AM4372_IOPAD(0x8f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
  164. AM4372_IOPAD(0x8f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
  165. AM4372_IOPAD(0x8fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
  166. AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
  167. AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
  168. AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
  169. >;
  170. };
  171. ecap0_pins: backlight_pins {
  172. pinctrl-single,pins = <
  173. AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
  174. >;
  175. };
  176. edt_ft5306_ts_pins: edt_ft5306_ts_pins {
  177. pinctrl-single,pins = <
  178. AM4372_IOPAD(0x874, PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
  179. AM4372_IOPAD(0x878, PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */
  180. >;
  181. };
  182. vpfe0_pins_default: vpfe0_pins_default {
  183. pinctrl-single,pins = <
  184. AM4372_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/
  185. AM4372_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/
  186. AM4372_IOPAD(0x9b8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_field mode 0*/
  187. AM4372_IOPAD(0x9bc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_wen mode 0*/
  188. AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/
  189. AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/
  190. AM4372_IOPAD(0x9c8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/
  191. AM4372_IOPAD(0xa08, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/
  192. AM4372_IOPAD(0xa0c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/
  193. AM4372_IOPAD(0xa10, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/
  194. AM4372_IOPAD(0xa14, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/
  195. AM4372_IOPAD(0xa18, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/
  196. AM4372_IOPAD(0xa1c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/
  197. AM4372_IOPAD(0xa20, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/
  198. AM4372_IOPAD(0xa24, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/
  199. >;
  200. };
  201. vpfe0_pins_sleep: vpfe0_pins_sleep {
  202. pinctrl-single,pins = <
  203. AM4372_IOPAD(0x9b0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  204. AM4372_IOPAD(0x9b4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  205. AM4372_IOPAD(0x9b8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  206. AM4372_IOPAD(0x9bc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  207. AM4372_IOPAD(0x9c0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  208. AM4372_IOPAD(0x9c4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  209. AM4372_IOPAD(0x9c8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  210. AM4372_IOPAD(0xa08, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  211. AM4372_IOPAD(0xa0c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  212. AM4372_IOPAD(0xa10, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  213. AM4372_IOPAD(0xa14, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  214. AM4372_IOPAD(0xa18, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  215. AM4372_IOPAD(0xa1c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  216. AM4372_IOPAD(0xa20, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  217. AM4372_IOPAD(0xa24, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  218. >;
  219. };
  220. clkout1_pin: pinmux_clkout1_pin {
  221. pinctrl-single,pins = <
  222. 0x270 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* XDMA_EVENT_INTR0/CLKOUT1 */
  223. >;
  224. };
  225. cpsw_default: cpsw_default {
  226. pinctrl-single,pins = <
  227. /* Slave 1 */
  228. AM4372_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
  229. AM4372_IOPAD(0x914, PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
  230. AM4372_IOPAD(0x928, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
  231. AM4372_IOPAD(0x924, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
  232. AM4372_IOPAD(0x920, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
  233. AM4372_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
  234. AM4372_IOPAD(0x930, PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
  235. AM4372_IOPAD(0x918, PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
  236. AM4372_IOPAD(0x940, PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
  237. AM4372_IOPAD(0x93c, PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
  238. AM4372_IOPAD(0x938, PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */
  239. AM4372_IOPAD(0x934, PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */
  240. /* Slave 2 */
  241. AM4372_IOPAD(0x858, PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
  242. AM4372_IOPAD(0x840, PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
  243. AM4372_IOPAD(0x854, PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
  244. AM4372_IOPAD(0x850, PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
  245. AM4372_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
  246. AM4372_IOPAD(0x848, PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
  247. AM4372_IOPAD(0x85c, PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
  248. AM4372_IOPAD(0x844, PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */
  249. AM4372_IOPAD(0x86c, PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
  250. AM4372_IOPAD(0x868, PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
  251. AM4372_IOPAD(0x864, PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
  252. AM4372_IOPAD(0x860, PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
  253. >;
  254. };
  255. cpsw_sleep: cpsw_sleep {
  256. pinctrl-single,pins = <
  257. /* Slave 1 reset value */
  258. AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
  259. AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
  260. AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
  261. AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
  262. AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
  263. AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
  264. AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
  265. AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
  266. AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
  267. AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
  268. AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
  269. AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
  270. /* Slave 2 reset value */
  271. AM4372_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
  272. AM4372_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
  273. AM4372_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
  274. AM4372_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
  275. AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
  276. AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
  277. AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
  278. AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
  279. AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
  280. AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
  281. AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
  282. AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
  283. >;
  284. };
  285. davinci_mdio_default: davinci_mdio_default {
  286. pinctrl-single,pins = <
  287. /* MDIO */
  288. AM4372_IOPAD(0x948, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
  289. AM4372_IOPAD(0x94c, PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */
  290. >;
  291. };
  292. davinci_mdio_sleep: davinci_mdio_sleep {
  293. pinctrl-single,pins = <
  294. /* MDIO reset value */
  295. AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
  296. AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
  297. >;
  298. };
  299. dss_pins: dss_pins {
  300. pinctrl-single,pins = <
  301. AM4372_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */
  302. AM4372_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1)
  303. AM4372_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1)
  304. AM4372_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1)
  305. AM4372_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1)
  306. AM4372_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1)
  307. AM4372_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1)
  308. AM4372_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */
  309. AM4372_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */
  310. AM4372_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)
  311. AM4372_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)
  312. AM4372_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)
  313. AM4372_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)
  314. AM4372_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)
  315. AM4372_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)
  316. AM4372_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)
  317. AM4372_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)
  318. AM4372_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)
  319. AM4372_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)
  320. AM4372_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)
  321. AM4372_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)
  322. AM4372_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)
  323. AM4372_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)
  324. AM4372_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */
  325. AM4372_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */
  326. AM4372_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */
  327. AM4372_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */
  328. AM4372_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */
  329. >;
  330. };
  331. qspi_pins: qspi_pins {
  332. pinctrl-single,pins = <
  333. AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE3) /* gpmc_csn0.qspi_csn */
  334. AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
  335. AM4372_IOPAD(0x890, PIN_INPUT | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
  336. AM4372_IOPAD(0x894, PIN_INPUT | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
  337. AM4372_IOPAD(0x898, PIN_INPUT | MUX_MODE3) /* gpmc_wen.qspi_d2 */
  338. AM4372_IOPAD(0x89c, PIN_INPUT | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
  339. >;
  340. };
  341. mcasp1_pins: mcasp1_pins {
  342. pinctrl-single,pins = <
  343. AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
  344. AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
  345. AM4372_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
  346. AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
  347. >;
  348. };
  349. mcasp1_pins_sleep: mcasp1_pins_sleep {
  350. pinctrl-single,pins = <
  351. AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
  352. AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
  353. AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
  354. AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
  355. >;
  356. };
  357. lcd_pins: lcd_pins {
  358. pinctrl-single,pins = <
  359. AM4372_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
  360. >;
  361. };
  362. usb1_pins: usb1_pins {
  363. pinctrl-single,pins = <
  364. AM4372_IOPAD(0xac0, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
  365. >;
  366. };
  367. usb2_pins: usb2_pins {
  368. pinctrl-single,pins = <
  369. AM4372_IOPAD(0xac4, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
  370. >;
  371. };
  372. mmc3_pins_default: pinmux_mmc3_pins_default {
  373. pinctrl-single,pins = <
  374. AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD21) cam1_data2.mmc2_clk */
  375. AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE22) cam1_data3.mmc2_cmd */
  376. AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD22) cam1_data4.mmc2_dat0 */
  377. AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE23) cam1_data5.mmc2_dat1 */
  378. AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD23) cam1_data6.mmc2_dat2 */
  379. AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE24) cam1_data7.mmc2_dat3 */
  380. >;
  381. };
  382. mmc3_pins_sleep: pinmux_mmc3_pins_sleep {
  383. pinctrl-single,pins = <
  384. AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD21) cam1_data2.mmc2_clk */
  385. AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE22) cam1_data3.mmc2_cmd */
  386. AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD22) cam1_data4.mmc2_dat0 */
  387. AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE23) cam1_data5.mmc2_dat1 */
  388. AM4372_IOPAD(0xa00, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD23) cam1_data6.mmc2_dat2 */
  389. AM4372_IOPAD(0xa04, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE24) cam1_data7.mmc2_dat3 */
  390. >;
  391. };
  392. wlan_pins_default: pinmux_wlan_pins_default {
  393. pinctrl-single,pins = <
  394. AM4372_IOPAD(0x9d0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam1_data8.gpio4_8 WL_EN */
  395. AM4372_IOPAD(0x9e4, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* cam1_wen.gpio4_13 WL_IRQ */
  396. >;
  397. };
  398. wlan_pins_sleep: pinmux_wlan_pins_sleep {
  399. pinctrl-single,pins = <
  400. AM4372_IOPAD(0x9d0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam1_data8.gpio4_8 WL_EN */
  401. AM4372_IOPAD(0x9e4, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* cam1_wen.gpio4_13 WL_IRQ */
  402. >;
  403. };
  404. uart1_bt_pins_default: pinmux_uart1_bt_pins_default {
  405. pinctrl-single,pins = <
  406. AM4372_IOPAD(0x980, PIN_INPUT | MUX_MODE0) /* uart1_rxd.uart1_rxd */
  407. AM4372_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
  408. AM4372_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */
  409. AM4372_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */
  410. AM4372_IOPAD(0x9cc, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam1_data9.gpio4_7 BT_EN */
  411. >;
  412. };
  413. uart1_bt_pins_sleep: pinmux_uart1_bt_pins_sleep {
  414. pinctrl-single,pins = <
  415. AM4372_IOPAD(0x980, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_rxd.uart1_rxd */
  416. AM4372_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_txd.uart1_txd */
  417. AM4372_IOPAD(0x978, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_ctsn.uart1_ctsn */
  418. AM4372_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_rtsn.uart1_rtsn */
  419. AM4372_IOPAD(0x9cc, PIN_OUTPUT_PULLUP | MUX_MODE7) /* cam1_data9.gpio4_7 BT_EN */
  420. >;
  421. };
  422. };
  423. &i2c0 {
  424. status = "okay";
  425. pinctrl-names = "default";
  426. pinctrl-0 = <&i2c0_pins>;
  427. clock-frequency = <100000>;
  428. tps@24 {
  429. compatible = "ti,tps65218";
  430. reg = <0x24>;
  431. interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
  432. interrupt-controller;
  433. #interrupt-cells = <2>;
  434. dcdc1: regulator-dcdc1 {
  435. /* VDD_CORE limits min of OPP50 and max of OPP100 */
  436. regulator-name = "vdd_core";
  437. regulator-min-microvolt = <912000>;
  438. regulator-max-microvolt = <1144000>;
  439. regulator-boot-on;
  440. regulator-always-on;
  441. };
  442. dcdc2: regulator-dcdc2 {
  443. /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */
  444. regulator-name = "vdd_mpu";
  445. regulator-min-microvolt = <912000>;
  446. regulator-max-microvolt = <1378000>;
  447. regulator-boot-on;
  448. regulator-always-on;
  449. };
  450. dcdc3: regulator-dcdc3 {
  451. regulator-name = "vdds_ddr";
  452. regulator-boot-on;
  453. regulator-always-on;
  454. regulator-state-mem {
  455. regulator-on-in-suspend;
  456. };
  457. regulator-state-disk {
  458. regulator-off-in-suspend;
  459. };
  460. };
  461. dcdc4: regulator-dcdc4 {
  462. regulator-name = "v3_3d";
  463. regulator-min-microvolt = <3300000>;
  464. regulator-max-microvolt = <3300000>;
  465. regulator-boot-on;
  466. regulator-always-on;
  467. };
  468. dcdc5: regulator-dcdc5 {
  469. compatible = "ti,tps65218-dcdc5";
  470. regulator-name = "v1_0bat";
  471. regulator-min-microvolt = <1000000>;
  472. regulator-max-microvolt = <1000000>;
  473. regulator-boot-on;
  474. regulator-always-on;
  475. regulator-state-mem {
  476. regulator-on-in-suspend;
  477. };
  478. };
  479. dcdc6: regulator-dcdc6 {
  480. compatible = "ti,tps65218-dcdc6";
  481. regulator-name = "v1_8bat";
  482. regulator-min-microvolt = <1800000>;
  483. regulator-max-microvolt = <1800000>;
  484. regulator-boot-on;
  485. regulator-always-on;
  486. regulator-state-mem {
  487. regulator-on-in-suspend;
  488. };
  489. };
  490. ldo1: regulator-ldo1 {
  491. regulator-name = "v1_8d";
  492. regulator-min-microvolt = <1800000>;
  493. regulator-max-microvolt = <1800000>;
  494. regulator-boot-on;
  495. regulator-always-on;
  496. };
  497. power-button {
  498. compatible = "ti,tps65218-pwrbutton";
  499. status = "okay";
  500. interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
  501. };
  502. };
  503. at24@50 {
  504. compatible = "atmel,24c256";
  505. pagesize = <64>;
  506. reg = <0x50>;
  507. };
  508. };
  509. &i2c1 {
  510. status = "okay";
  511. pinctrl-names = "default";
  512. pinctrl-0 = <&i2c1_pins>;
  513. clock-frequency = <400000>;
  514. ov2659@30 {
  515. compatible = "ovti,ov2659";
  516. reg = <0x30>;
  517. pinctrl-names = "default";
  518. pinctrl-0 = <&clkout1_pin>;
  519. clocks = <&clkout1_mux_ck>;
  520. clock-names = "xvclk";
  521. assigned-clocks = <&clkout1_mux_ck>;
  522. assigned-clock-parents = <&clkout1_osc_div_ck>;
  523. port {
  524. ov2659_1: endpoint {
  525. remote-endpoint = <&vpfe0_ep>;
  526. link-frequencies = /bits/ 64 <70000000>;
  527. };
  528. };
  529. };
  530. edt-ft5306@38 {
  531. status = "okay";
  532. compatible = "edt,edt-ft5306", "edt,edt-ft5x06";
  533. pinctrl-names = "default";
  534. pinctrl-0 = <&edt_ft5306_ts_pins>;
  535. reg = <0x38>;
  536. interrupt-parent = <&gpio0>;
  537. interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
  538. reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
  539. touchscreen-size-x = <480>;
  540. touchscreen-size-y = <272>;
  541. wakeup-source;
  542. };
  543. tlv320aic3106: tlv320aic3106@1b {
  544. #sound-dai-cells = <0>;
  545. compatible = "ti,tlv320aic3106";
  546. reg = <0x1b>;
  547. status = "okay";
  548. /* Regulators */
  549. AVDD-supply = <&dcdc4>;
  550. IOVDD-supply = <&dcdc4>;
  551. DRVDD-supply = <&dcdc4>;
  552. DVDD-supply = <&ldo1>;
  553. };
  554. lis331dlh@18 {
  555. compatible = "st,lis331dlh";
  556. reg = <0x18>;
  557. status = "okay";
  558. Vdd-supply = <&dcdc4>;
  559. Vdd_IO-supply = <&dcdc4>;
  560. interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>;
  561. };
  562. };
  563. &epwmss0 {
  564. status = "okay";
  565. };
  566. &ecap0 {
  567. status = "okay";
  568. pinctrl-names = "default";
  569. pinctrl-0 = <&ecap0_pins>;
  570. };
  571. &gpio0 {
  572. status = "okay";
  573. };
  574. &gpio1 {
  575. status = "okay";
  576. };
  577. &gpio4 {
  578. status = "okay";
  579. };
  580. &gpio5 {
  581. status = "okay";
  582. };
  583. &mmc1 {
  584. status = "okay";
  585. pinctrl-names = "default";
  586. pinctrl-0 = <&mmc1_pins>;
  587. vmmc-supply = <&dcdc4>;
  588. bus-width = <4>;
  589. cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
  590. };
  591. &uart1 {
  592. status = "okay";
  593. pinctrl-names = "default", "sleep";
  594. pinctrl-0 = <&uart1_bt_pins_default>;
  595. pinctrl-1 = <&uart1_bt_pins_sleep>;
  596. };
  597. &mmc3 {
  598. status = "okay";
  599. /*
  600. * these are on the crossbar and are outlined in the
  601. * xbar-event-map element
  602. */
  603. dmas = <&edma_xbar 30 0 1>,
  604. <&edma_xbar 31 0 2>;
  605. dma-names = "tx", "rx";
  606. vmmc-supply = <&vmmcwl_fixed>;
  607. bus-width = <4>;
  608. pinctrl-names = "default", "sleep";
  609. pinctrl-0 = <&mmc3_pins_default>;
  610. pinctrl-1 = <&mmc3_pins_sleep>;
  611. cap-power-off-card;
  612. keep-power-in-suspend;
  613. non-removable;
  614. #address-cells = <1>;
  615. #size-cells = <0>;
  616. wlcore: wlcore@2 {
  617. compatible = "ti,wl1835";
  618. pinctrl-names = "default", "sleep";
  619. pinctrl-0 = <&wlan_pins_default>;
  620. pinctrl-1 = <&wlan_pins_sleep>;
  621. reg = <2>;
  622. interrupt-parent = <&gpio4>;
  623. interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
  624. };
  625. };
  626. &usb2_phy1 {
  627. status = "okay";
  628. };
  629. &usb1 {
  630. dr_mode = "otg";
  631. status = "okay";
  632. pinctrl-names = "default";
  633. pinctrl-0 = <&usb1_pins>;
  634. };
  635. &usb2_phy2 {
  636. status = "okay";
  637. };
  638. &usb2 {
  639. dr_mode = "host";
  640. status = "okay";
  641. pinctrl-names = "default";
  642. pinctrl-0 = <&usb2_pins>;
  643. };
  644. &qspi {
  645. status = "okay";
  646. pinctrl-names = "default";
  647. pinctrl-0 = <&qspi_pins>;
  648. spi-max-frequency = <48000000>;
  649. flash@0 {
  650. compatible = "mx66l51235l";
  651. spi-max-frequency = <48000000>;
  652. reg = <0>;
  653. spi-cpol;
  654. spi-cpha;
  655. spi-tx-bus-width = <1>;
  656. spi-rx-bus-width = <4>;
  657. #address-cells = <1>;
  658. #size-cells = <1>;
  659. /* MTD partition table.
  660. * The ROM checks the first 512KiB
  661. * for a valid file to boot(XIP).
  662. */
  663. partition@0 {
  664. label = "QSPI.U_BOOT";
  665. reg = <0x00000000 0x000080000>;
  666. };
  667. partition@1 {
  668. label = "QSPI.U_BOOT.backup";
  669. reg = <0x00080000 0x00080000>;
  670. };
  671. partition@2 {
  672. label = "QSPI.U-BOOT-SPL_OS";
  673. reg = <0x00100000 0x00010000>;
  674. };
  675. partition@3 {
  676. label = "QSPI.U_BOOT_ENV";
  677. reg = <0x00110000 0x00010000>;
  678. };
  679. partition@4 {
  680. label = "QSPI.U-BOOT-ENV.backup";
  681. reg = <0x00120000 0x00010000>;
  682. };
  683. partition@5 {
  684. label = "QSPI.KERNEL";
  685. reg = <0x00130000 0x0800000>;
  686. };
  687. partition@6 {
  688. label = "QSPI.FILESYSTEM";
  689. reg = <0x00930000 0x36D0000>;
  690. };
  691. };
  692. };
  693. &mac_sw {
  694. pinctrl-names = "default", "sleep";
  695. pinctrl-0 = <&cpsw_default>;
  696. pinctrl-1 = <&cpsw_sleep>;
  697. status = "okay";
  698. };
  699. &davinci_mdio_sw {
  700. pinctrl-names = "default", "sleep";
  701. pinctrl-0 = <&davinci_mdio_default>;
  702. pinctrl-1 = <&davinci_mdio_sleep>;
  703. ethphy0: ethernet-phy@4 {
  704. reg = <4>;
  705. };
  706. ethphy1: ethernet-phy@5 {
  707. reg = <5>;
  708. };
  709. };
  710. &cpsw_port1 {
  711. phy-handle = <&ethphy0>;
  712. phy-mode = "rgmii-rxid";
  713. ti,dual-emac-pvid = <1>;
  714. };
  715. &cpsw_port2 {
  716. phy-handle = <&ethphy1>;
  717. phy-mode = "rgmii-rxid";
  718. ti,dual-emac-pvid = <2>;
  719. };
  720. &elm {
  721. status = "okay";
  722. };
  723. &mcasp1 {
  724. #sound-dai-cells = <0>;
  725. pinctrl-names = "default", "sleep";
  726. pinctrl-0 = <&mcasp1_pins>;
  727. pinctrl-1 = <&mcasp1_pins_sleep>;
  728. status = "okay";
  729. op-mode = <0>;
  730. tdm-slots = <2>;
  731. serial-dir = <
  732. 0 0 1 2
  733. >;
  734. tx-num-evt = <1>;
  735. rx-num-evt = <1>;
  736. };
  737. &dss {
  738. status = "okay";
  739. pinctrl-names = "default";
  740. pinctrl-0 = <&dss_pins>;
  741. port {
  742. dpi_out: endpoint@0 {
  743. remote-endpoint = <&lcd_in>;
  744. data-lines = <24>;
  745. };
  746. };
  747. };
  748. &rtc {
  749. clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
  750. clock-names = "ext-clk", "int-clk";
  751. status = "okay";
  752. };
  753. &wdt {
  754. status = "okay";
  755. };
  756. &cpu {
  757. cpu0-supply = <&dcdc2>;
  758. };
  759. &vpfe0 {
  760. status = "okay";
  761. pinctrl-names = "default", "sleep";
  762. pinctrl-0 = <&vpfe0_pins_default>;
  763. pinctrl-1 = <&vpfe0_pins_sleep>;
  764. /* Camera port */
  765. port {
  766. vpfe0_ep: endpoint {
  767. remote-endpoint = <&ov2659_1>;
  768. ti,am437x-vpfe-interface = <0>;
  769. bus-width = <8>;
  770. hsync-active = <0>;
  771. vsync-active = <0>;
  772. };
  773. };
  774. };
  775. &wkup_m3_ipc {
  776. firmware-name = "am43x-evm-scale-data.bin";
  777. };
  778. &pruss1_mdio {
  779. status = "disabled";
  780. };