am335x-myirtech-myd.dts 16 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /* SPDX-FileCopyrightText: Alexander Shiyan, <[email protected]> */
  3. /* Based on code by myd_c335x.dts, MYiRtech.com */
  4. /* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ */
  5. /dts-v1/;
  6. #include "am335x-myirtech-myc.dtsi"
  7. #include <dt-bindings/display/tda998x.h>
  8. #include <dt-bindings/input/input.h>
  9. / {
  10. model = "MYIR MYD-AM335X";
  11. compatible = "myir,myd-am335x", "myir,myc-am335x", "ti,am33xx";
  12. chosen {
  13. stdout-path = &uart0;
  14. };
  15. clk12m: clk12m {
  16. compatible = "fixed-clock";
  17. clock-frequency = <12000000>;
  18. #clock-cells = <0>;
  19. };
  20. gpio_buttons: gpio_buttons {
  21. compatible = "gpio-keys";
  22. pinctrl-names = "default";
  23. pinctrl-0 = <&gpio_buttons_pins>;
  24. #address-cells = <1>;
  25. #size-cells = <0>;
  26. button1: button@0 {
  27. reg = <0>;
  28. label = "button1";
  29. linux,code = <BTN_1>;
  30. gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  31. };
  32. button2: button@1 {
  33. reg = <1>;
  34. label = "button2";
  35. linux,code = <BTN_2>;
  36. gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
  37. };
  38. };
  39. sound: sound {
  40. compatible = "simple-audio-card";
  41. simple-audio-card,format = "i2s";
  42. simple-audio-card,bitclock-master = <&master_codec>;
  43. simple-audio-card,frame-master = <&master_codec>;
  44. simple-audio-card,cpu {
  45. sound-dai = <&mcasp0>;
  46. };
  47. master_codec: simple-audio-card,codec@1 {
  48. sound-dai = <&sgtl5000>;
  49. };
  50. simple-audio-card,codec@2 {
  51. sound-dai = <&tda9988>;
  52. };
  53. };
  54. vdd_5v0: vdd_5v0_reg {
  55. compatible = "regulator-fixed";
  56. regulator-name = "vdd_5v0";
  57. regulator-min-microvolt = <5000000>;
  58. regulator-max-microvolt = <5000000>;
  59. regulator-always-on;
  60. regulator-boot-on;
  61. };
  62. vdd_3v3: vdd_3v3_reg {
  63. compatible = "regulator-fixed";
  64. regulator-name = "vdd-3v3";
  65. regulator-min-microvolt = <3300000>;
  66. regulator-max-microvolt = <3300000>;
  67. regulator-always-on;
  68. regulator-boot-on;
  69. vin-supply = <&vdd_5v0>;
  70. };
  71. };
  72. &cpsw_port2 {
  73. status = "okay";
  74. phy-handle = <&phy1>;
  75. phy-mode = "rgmii-id";
  76. ti,dual-emac-pvid = <2>;
  77. };
  78. &davinci_mdio_sw {
  79. phy1: ethernet-phy@6 {
  80. reg = <6>;
  81. eee-broken-1000t;
  82. };
  83. };
  84. &mac_sw {
  85. pinctrl-0 = <&eth_slave1_pins_default>, <&eth_slave2_pins_default>;
  86. pinctrl-1 = <&eth_slave1_pins_sleep>, <&eth_slave2_pins_sleep>;
  87. slaves = <2>;
  88. };
  89. &dcan0 {
  90. pinctrl-names = "default", "sleep";
  91. pinctrl-0 = <&dcan0_pins_default>;
  92. pinctrl-1 = <&dcan0_pins_sleep>;
  93. status = "okay";
  94. };
  95. &dcan1 {
  96. pinctrl-names = "default", "sleep";
  97. pinctrl-0 = <&dcan1_pins_default>;
  98. pinctrl-1 = <&dcan1_pins_sleep>;
  99. status = "okay";
  100. };
  101. &ehrpwm0 {
  102. pinctrl-names = "default", "sleep";
  103. pinctrl-0 = <&ehrpwm0_pins_default>;
  104. pinctrl-1 = <&ehrpwm0_pins_sleep>;
  105. status = "okay";
  106. };
  107. &epwmss0 {
  108. status = "okay";
  109. };
  110. &i2c1 {
  111. pinctrl-names = "default", "gpio", "sleep";
  112. pinctrl-0 = <&i2c1_pins_default>;
  113. pinctrl-1 = <&i2c1_pins_gpio>;
  114. pinctrl-2 = <&i2c1_pins_sleep>;
  115. clock-frequency = <400000>;
  116. scl-gpios = <&gpio0 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  117. sda-gpios = <&gpio0 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  118. status = "okay";
  119. sgtl5000: sgtl5000@a {
  120. compatible = "fsl,sgtl5000";
  121. reg =<0xa>;
  122. clocks = <&clk12m>;
  123. micbias-resistor-k-ohms = <4>;
  124. micbias-voltage-m-volts = <2250>;
  125. VDDA-supply = <&vdd_3v3>;
  126. VDDIO-supply = <&vdd_3v3>;
  127. #sound-dai-cells = <0>;
  128. };
  129. tda9988: tda9988@70 {
  130. compatible = "nxp,tda998x";
  131. reg =<0x70>;
  132. audio-ports = <TDA998x_I2S 1>;
  133. #sound-dai-cells = <0>;
  134. ports {
  135. port@0 {
  136. hdmi_0: endpoint@0 {
  137. remote-endpoint = <&lcdc_0>;
  138. };
  139. };
  140. };
  141. };
  142. };
  143. &lcdc {
  144. pinctrl-names = "default", "sleep";
  145. pinctrl-0 = <&lcdc_pins_default>;
  146. pinctrl-1 = <&lcdc_pins_sleep>;
  147. blue-and-red-wiring = "straight";
  148. status = "okay";
  149. port {
  150. lcdc_0: endpoint@0 {
  151. remote-endpoint = <&hdmi_0>;
  152. };
  153. };
  154. };
  155. &leds {
  156. pinctrl-0 = <&led_mod_pins &leds_pins>;
  157. led1: led1 {
  158. label = "base:user1";
  159. gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
  160. color = <LED_COLOR_ID_GREEN>;
  161. default-state = "off";
  162. };
  163. led2: led2 {
  164. label = "base:user2";
  165. gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
  166. color = <LED_COLOR_ID_GREEN>;
  167. default-state = "off";
  168. };
  169. };
  170. &mcasp0 {
  171. pinctrl-names = "default", "sleep";
  172. pinctrl-0 = <&mcasp0_pins_default>;
  173. pinctrl-1 = <&mcasp0_pins_sleep>;
  174. op-mode = <0>;
  175. tdm-slots = <2>;
  176. serial-dir = <0 1 2 0>;
  177. tx-num-evt = <32>;
  178. rx-num-evt = <32>;
  179. status = "okay";
  180. #sound-dai-cells = <0>;
  181. };
  182. &mmc1 {
  183. pinctrl-names = "default", "sleep";
  184. pinctrl-0 = <&mmc1_pins_default>;
  185. pinctrl-1 = <&mmc1_pins_sleep>;
  186. cd-gpios = <&gpio3 21 GPIO_ACTIVE_LOW>;
  187. bus-width = <4>;
  188. vmmc-supply = <&vdd_3v3>;
  189. status = "okay";
  190. };
  191. &nand0 {
  192. nand_parts: partitions {
  193. compatible = "fixed-partitions";
  194. #address-cells = <1>;
  195. #size-cells = <1>;
  196. partition@0 {
  197. label = "MLO";
  198. reg = <0x00000 0x20000>;
  199. };
  200. partition@80000 {
  201. label = "boot";
  202. reg = <0x80000 0x100000>;
  203. };
  204. };
  205. };
  206. &tscadc {
  207. status = "okay";
  208. adc: adc {
  209. ti,adc-channels = <0 1 2 3 4 5 6>;
  210. };
  211. };
  212. &uart0 {
  213. pinctrl-names = "default";
  214. pinctrl-0 = <&uart0_pins>;
  215. status = "okay";
  216. };
  217. &uart1 {
  218. pinctrl-names = "default", "sleep";
  219. pinctrl-0 = <&uart1_pins_default>;
  220. pinctrl-1 = <&uart1_pins_sleep>;
  221. linux,rs485-enabled-at-boot-time;
  222. status = "okay";
  223. };
  224. &uart2 {
  225. pinctrl-names = "default", "sleep";
  226. pinctrl-0 = <&uart2_pins_default>;
  227. pinctrl-1 = <&uart2_pins_sleep>;
  228. status = "okay";
  229. };
  230. &usb {
  231. pinctrl-names = "default";
  232. pinctrl-0 = <&usb_pins>;
  233. };
  234. &usb0 {
  235. dr_mode = "otg";
  236. };
  237. &usb0_phy {
  238. vcc-supply = <&vdd_5v0>;
  239. };
  240. &usb1 {
  241. dr_mode = "host";
  242. };
  243. &usb1_phy {
  244. vcc-supply = <&vdd_5v0>;
  245. };
  246. &vdd_mod {
  247. vin-supply = <&vdd_3v3>;
  248. };
  249. &am33xx_pinmux {
  250. dcan0_pins_default: pinmux_dcan0_pins_default {
  251. pinctrl-single,pins = <
  252. AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_OUTPUT, MUX_MODE2) /* dcan0_tx_mux2 */
  253. AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT, MUX_MODE2) /* dcan0_rx_mux2 */
  254. >;
  255. };
  256. dcan0_pins_sleep: pinmux_dcan0_pins_sleep {
  257. pinctrl-single,pins = <
  258. AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE7)
  259. AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLDOWN, MUX_MODE7)
  260. >;
  261. };
  262. dcan1_pins_default: pinmux_dcan1_pins_default {
  263. pinctrl-single,pins = <
  264. AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT, MUX_MODE2) /* dcan1_tx_mux0 */
  265. AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT, MUX_MODE2) /* dcan1_rx_mux0 */
  266. >;
  267. };
  268. dcan1_pins_sleep: pinmux_dcan1_pins_sleep {
  269. pinctrl-single,pins = <
  270. AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE7)
  271. AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLDOWN, MUX_MODE7)
  272. >;
  273. };
  274. ehrpwm0_pins_default: pinmux_ehrpwm0_pins_default {
  275. pinctrl-single,pins = <
  276. AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_OUTPUT, MUX_MODE3) /* ehrpwm0A_mux1 */
  277. >;
  278. };
  279. ehrpwm0_pins_sleep: pinmux_ehrpwm0_pins_sleep {
  280. pinctrl-single,pins = <
  281. AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
  282. >;
  283. };
  284. eth_slave2_pins_default: pinmux_eth_slave2_pins_default {
  285. pinctrl-single,pins = <
  286. AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_tctl */
  287. AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii2_rctl */
  288. AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_td3 */
  289. AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_td2 */
  290. AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_td1 */
  291. AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_td0 */
  292. AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_tclk */
  293. AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii2_rclk */
  294. AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii2_rd3 */
  295. AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii2_rd2 */
  296. AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE2 /* rgmii2_rd1 */)
  297. AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE2 /* rgmii2_rd0 */)
  298. >;
  299. };
  300. eth_slave2_pins_sleep: pinmux_eth_slave2_pins_sleep {
  301. pinctrl-single,pins = <
  302. AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT_PULLDOWN, MUX_MODE7)
  303. AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE7)
  304. AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_INPUT_PULLDOWN, MUX_MODE7)
  305. AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_INPUT_PULLDOWN, MUX_MODE7)
  306. AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_INPUT_PULLDOWN, MUX_MODE7)
  307. AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_INPUT_PULLDOWN, MUX_MODE7)
  308. AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_INPUT_PULLDOWN, MUX_MODE7)
  309. AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE7)
  310. AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE7)
  311. AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE7)
  312. AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE7)
  313. AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE7)
  314. >;
  315. };
  316. gpio_buttons_pins: pinmux_gpio_buttons_pins {
  317. pinctrl-single,pins = <
  318. AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpio3[0] */
  319. AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT, MUX_MODE7) /* gpio0[29] */
  320. >;
  321. };
  322. i2c1_pins_default: pinmux_i2c1_pins_default {
  323. pinctrl-single,pins = <
  324. AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT | SLEWCTRL_FAST, MUX_MODE2) /* I2C1_SDA_mux3 */
  325. AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT | SLEWCTRL_FAST, MUX_MODE2) /* I2C1_SCL_mux3 */
  326. >;
  327. };
  328. i2c1_pins_gpio: pinmux_i2c1_pins_gpio {
  329. pinctrl-single,pins = <
  330. AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT, MUX_MODE7) /* gpio0[4] */
  331. AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT, MUX_MODE7) /* gpio0[5] */
  332. >;
  333. };
  334. i2c1_pins_sleep: pinmux_i2c1_pins_sleep {
  335. pinctrl-single,pins = <
  336. AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLDOWN, MUX_MODE7)
  337. AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLDOWN, MUX_MODE7)
  338. >;
  339. };
  340. lcdc_pins_default: pinmux_lcdc_pins_default {
  341. pinctrl-single,pins = <
  342. AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0) /* lcd_data0 */
  343. AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0) /* lcd_data1 */
  344. AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0) /* lcd_data2 */
  345. AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0) /* lcd_data3 */
  346. AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0) /* lcd_data4 */
  347. AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0) /* lcd_data5 */
  348. AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0) /* lcd_data6 */
  349. AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0) /* lcd_data7 */
  350. AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0) /* lcd_data8 */
  351. AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0) /* lcd_data9 */
  352. AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0) /* lcd_data10 */
  353. AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0) /* lcd_data11 */
  354. AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0) /* lcd_data12 */
  355. AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0) /* lcd_data13 */
  356. AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0) /* lcd_data14 */
  357. AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0) /* lcd_data15 */
  358. AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0) /* lcd_vsync */
  359. AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0) /* lcd_hsync */
  360. AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0) /* lcd_pclk */
  361. AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0) /* lcd_ac_bias_en */
  362. >;
  363. };
  364. lcdc_pins_sleep: pinmux_lcdc_pins_sleep {
  365. pinctrl-single,pins = <
  366. AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PULL_DISABLE, MUX_MODE7)
  367. AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PULL_DISABLE, MUX_MODE7)
  368. AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PULL_DISABLE, MUX_MODE7)
  369. AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PULL_DISABLE, MUX_MODE7)
  370. AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PULL_DISABLE, MUX_MODE7)
  371. AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PULL_DISABLE, MUX_MODE7)
  372. AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PULL_DISABLE, MUX_MODE7)
  373. AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PULL_DISABLE, MUX_MODE7)
  374. AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PULL_DISABLE, MUX_MODE7)
  375. AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PULL_DISABLE, MUX_MODE7)
  376. AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PULL_DISABLE, MUX_MODE7)
  377. AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PULL_DISABLE, MUX_MODE7)
  378. AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PULL_DISABLE, MUX_MODE7)
  379. AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PULL_DISABLE, MUX_MODE7)
  380. AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PULL_DISABLE, MUX_MODE7)
  381. AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PULL_DISABLE, MUX_MODE7)
  382. AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)
  383. AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)
  384. AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
  385. AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
  386. >;
  387. };
  388. leds_pins: pinmux_leds_pins {
  389. pinctrl-single,pins = <
  390. AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE7) /* gpio0[27] */
  391. AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE7) /* gpio0[3] */
  392. >;
  393. };
  394. mcasp0_pins_default: pinmux_mcasp0_pins_default {
  395. pinctrl-single,pins = <
  396. AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLDOWN, MUX_MODE0) /* mcasp0_aclkx_mux0 */
  397. AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_INPUT_PULLDOWN, MUX_MODE0) /* mcasp0_fsx_mux0 */
  398. AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mcasp0_axr2_mux0 */
  399. AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR1, PIN_INPUT_PULLDOWN, MUX_MODE0) /* mcasp0_axr1_mux0 */
  400. >;
  401. };
  402. mcasp0_pins_sleep: pinmux_mcasp0_pins_sleep {
  403. pinctrl-single,pins = <
  404. AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLDOWN, MUX_MODE7)
  405. AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_INPUT_PULLDOWN, MUX_MODE7)
  406. AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_INPUT_PULLDOWN, MUX_MODE7)
  407. AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR1, PIN_INPUT_PULLDOWN, MUX_MODE7)
  408. >;
  409. };
  410. mmc1_pins_default: pinmux_mmc1_pins_default {
  411. pinctrl-single,pins = <
  412. AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_dat3 */
  413. AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_dat2 */
  414. AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_dat1 */
  415. AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_dat0 */
  416. AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_clk */
  417. AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_cmd */
  418. AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE7) /* gpio3[21] */
  419. >;
  420. };
  421. mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
  422. pinctrl-single,pins = <
  423. AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLDOWN, MUX_MODE0)
  424. AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLDOWN, MUX_MODE0)
  425. AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLDOWN, MUX_MODE0)
  426. AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLDOWN, MUX_MODE0)
  427. AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLDOWN, MUX_MODE0)
  428. AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLDOWN, MUX_MODE0)
  429. AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLDOWN, MUX_MODE7)
  430. >;
  431. };
  432. uart0_pins: pinmux_uart0_pins {
  433. pinctrl-single,pins = <
  434. AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0) /* uart0_rxd */
  435. AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* uart0_txd */
  436. >;
  437. };
  438. uart1_pins_default: pinmux_uart1_pins_default {
  439. pinctrl-single,pins = <
  440. AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0) /* uart1_rxd */
  441. AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* uart1_txd */
  442. >;
  443. };
  444. uart1_pins_sleep: pinmux_uart1_pins_sleep {
  445. pinctrl-single,pins = <
  446. AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLDOWN, MUX_MODE7)
  447. AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT_PULLDOWN, MUX_MODE7)
  448. >;
  449. };
  450. uart2_pins_default: pinmux_uart2_pins_default {
  451. pinctrl-single,pins = <
  452. AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT, MUX_MODE6) /* uart2_rxd_mux1 */
  453. AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_OUTPUT, MUX_MODE6) /* uart2_txd_mux1 */
  454. >;
  455. };
  456. uart2_pins_sleep: pinmux_uart2_pins_sleep {
  457. pinctrl-single,pins = <
  458. AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7)
  459. AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
  460. >;
  461. };
  462. usb_pins: pinmux_usb_pins {
  463. pinctrl-single,pins = <
  464. AM33XX_PADCONF(AM335X_PIN_USB0_DRVVBUS, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* USB0_DRVVBUS */
  465. AM33XX_PADCONF(AM335X_PIN_USB1_DRVVBUS, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* USB1_DRVVBUS */
  466. >;
  467. };
  468. };