android_kernel_samsung_sm8650_ksu/arch/arm/boot/dts/am335x-moxa-uc-2101.dts

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2018 MOXA Inc. - https://www.moxa.com/
 *
 * Authors: SZ Lin (林上智) <[email protected]>
 *          Wes Huang (黃淵河) <[email protected]>
 *          Fero JD Zhou (周俊達) <[email protected]>
 */

/dts-v1/;

#include "am335x-moxa-uc-2100-common.dtsi"

/ {
	model = "Moxa UC-2101";
	compatible = "moxa,uc-2101", "ti,am33xx";

	leds {
		compatible = "gpio-leds";
		led1 {
			label = "UC2100:GREEN:USER";
			gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};
	};
};

&am33xx_pinmux {
	pinctrl-names = "default";

	cpsw_default: cpsw_default {
		pinctrl-single,pins = <
			/* Slave 1 */
			AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE1)	/* mii1_crs.rmii1_crs_dv */
			AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE1)	/* mii1_rxerr.rmii1_rxerr */
			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE1)	/* mii1_txen.rmii1_txen */
			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE1)	/* mii1_txd1.rmii1_txd1 */
			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE1)	/* mii1_txd0.rmii1_txd0 */
			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE1)	/* mii1_rxd1.rmii1_rxd1 */
			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE1)	/* mii1_rxd0.rmii1_rxd0 */
			AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE0)
		>;
	};

	spi1_pins: pinmux_spi1 {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_INPUT_PULLUP, MUX_MODE4)	 /* ecap0_in_pwm0_out.spi1_sclk */
			AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE4)	 /* uart1_ctsn.spi1_cs0 */
			AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLUP, MUX_MODE4)	 /* uart0_ctsn.spi1_d0 */
			AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE4)	 /* uart0_rtsn.spi1_d1 */
		>;
	};
};

&davinci_mdio_sw {
	phy0: ethernet-phy@4 {
		reg = <4>;
	};
};

&cpsw_port1 {
	phy-handle = <&phy0>;
	phy-mode = "rmii";
};

&cpsw_port2 {
	status = "disabled";
};