am335x-guardian.dts 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
  4. * Copyright (C) 2018 Robert Bosch Power Tools GmbH
  5. */
  6. /dts-v1/;
  7. #include "am33xx.dtsi"
  8. #include <dt-bindings/input/input.h>
  9. #include <dt-bindings/interrupt-controller/irq.h>
  10. / {
  11. model = "Bosch AM335x Guardian";
  12. compatible = "bosch,am335x-guardian", "ti,am33xx";
  13. chosen {
  14. stdout-path = &uart0;
  15. tick-timer = &timer2;
  16. };
  17. cpus {
  18. cpu@0 {
  19. cpu0-supply = <&dcdc2_reg>;
  20. };
  21. };
  22. memory@80000000 {
  23. device_type = "memory";
  24. reg = <0x80000000 0x10000000>; /* 256 MB */
  25. };
  26. guardian_buttons: gpio-keys {
  27. pinctrl-names = "default";
  28. pinctrl-0 = <&guardian_button_pins>;
  29. compatible = "gpio-keys";
  30. select-button {
  31. label = "guardian-select-button";
  32. linux,code = <KEY_5>;
  33. gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
  34. wakeup-source;
  35. };
  36. power-button {
  37. label = "guardian-power-button";
  38. linux,code = <KEY_POWER>;
  39. gpios = <&gpio2 21 GPIO_ACTIVE_LOW>;
  40. wakeup-source;
  41. };
  42. };
  43. guardian_leds: gpio-leds {
  44. pinctrl-names = "default";
  45. pinctrl-0 = <&guardian_led_pins>;
  46. compatible = "gpio-leds";
  47. life-led {
  48. label = "guardian:life-led";
  49. gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
  50. linux,default-trigger = "heartbeat";
  51. default-state = "off";
  52. };
  53. };
  54. gpio-poweroff {
  55. compatible = "gpio-poweroff";
  56. gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  57. };
  58. panel {
  59. compatible = "ti,tilcdc,panel";
  60. pinctrl-names = "default", "sleep";
  61. pinctrl-0 = <&lcd_pins_default &lcd_disen_pins>;
  62. pinctrl-1 = <&lcd_pins_sleep>;
  63. display-timings {
  64. 320x240 {
  65. hactive = <320>;
  66. vactive = <240>;
  67. hback-porch = <68>;
  68. hfront-porch = <20>;
  69. hsync-len = <1>;
  70. vback-porch = <18>;
  71. vfront-porch = <4>;
  72. vsync-len = <1>;
  73. clock-frequency = <9000000>;
  74. hsync-active = <0>;
  75. vsync-active = <0>;
  76. };
  77. };
  78. panel-info {
  79. ac-bias = <255>;
  80. ac-bias-intrpt = <0>;
  81. dma-burst-sz = <16>;
  82. bpp = <24>;
  83. bus-width = <16>;
  84. fdd = <0x80>;
  85. sync-edge = <0>;
  86. sync-ctrl = <1>;
  87. raster-order = <0>;
  88. fifo-th = <0>;
  89. };
  90. };
  91. guardian_beeper: pwm-7 {
  92. compatible = "ti,omap-dmtimer-pwm";
  93. #pwm-cells = <3>;
  94. ti,timers = <&timer7>;
  95. pinctrl-names = "default";
  96. pinctrl-0 = <&guardian_beeper_pins>;
  97. ti,clock-source = <0x01>;
  98. };
  99. vmmcsd_fixed: fixedregulator0 {
  100. compatible = "regulator-fixed";
  101. regulator-name = "vmmcsd_fixed";
  102. regulator-min-microvolt = <3300000>;
  103. regulator-max-microvolt = <3300000>;
  104. };
  105. mt_keypad: mt_keypad@0 {
  106. compatible = "gpio-mt-keypad";
  107. debounce-delay-ms = <10>;
  108. col-scan-delay-us = <2>;
  109. keypad,num-lines = <5>;
  110. linux,no-autorepeat;
  111. gpio-activelow;
  112. line-gpios = <
  113. &gpio1 24 GPIO_ACTIVE_LOW /*gpio_56*/
  114. &gpio1 23 GPIO_ACTIVE_LOW /*gpio_55*/
  115. &gpio1 22 GPIO_ACTIVE_LOW /*gpio_54*/
  116. &gpio1 20 GPIO_ACTIVE_LOW /*gpio_52*/
  117. &gpio1 16 GPIO_ACTIVE_LOW /*gpio_48*/
  118. >;
  119. };
  120. };
  121. &elm {
  122. status = "okay";
  123. };
  124. &gpmc {
  125. pinctrl-names = "default";
  126. pinctrl-0 = <&nandflash_pins>;
  127. ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
  128. status = "okay";
  129. nand@0,0 {
  130. compatible = "ti,omap2-nand";
  131. reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
  132. interrupt-parent = <&gpmc>;
  133. interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
  134. <1 IRQ_TYPE_NONE>; /* termcount */
  135. rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
  136. ti,nand-xfer-type = "prefetch-dma";
  137. ti,nand-ecc-opt = "bch16";
  138. ti,elm-id = <&elm>;
  139. nand-bus-width = <8>;
  140. gpmc,device-width = <1>;
  141. gpmc,sync-clk-ps = <0>;
  142. gpmc,cs-on-ns = <0>;
  143. gpmc,cs-rd-off-ns = <30>;
  144. gpmc,cs-wr-off-ns = <30>;
  145. gpmc,adv-on-ns = <0>;
  146. gpmc,adv-rd-off-ns = <30>;
  147. gpmc,adv-wr-off-ns = <30>;
  148. gpmc,we-on-ns = <0>;
  149. gpmc,we-off-ns = <15>;
  150. gpmc,oe-on-ns = <1>;
  151. gpmc,oe-off-ns = <15>;
  152. gpmc,access-ns = <30>;
  153. gpmc,rd-cycle-ns = <30>;
  154. gpmc,wr-cycle-ns = <30>;
  155. gpmc,bus-turnaround-ns = <0>;
  156. gpmc,cycle2cycle-delay-ns = <0>;
  157. gpmc,clk-activation-ns = <0>;
  158. gpmc,wr-access-ns = <0>;
  159. gpmc,wr-data-mux-bus-ns = <0>;
  160. /*
  161. * MTD partition table
  162. *
  163. * All SPL-* partitions are sized to minimal length which can
  164. * be independently programmable. For NAND flash this is equal
  165. * to size of erase-block.
  166. */
  167. #address-cells = <1>;
  168. #size-cells = <1>;
  169. partition@0 {
  170. label = "SPL";
  171. reg = <0x0 0x40000>;
  172. };
  173. partition@1 {
  174. label = "SPL.backup1";
  175. reg = <0x40000 0x40000>;
  176. };
  177. partition@2 {
  178. label = "SPL.backup2";
  179. reg = <0x80000 0x40000>;
  180. };
  181. partition@3 {
  182. label = "SPL.backup3";
  183. reg = <0xc0000 0x40000>;
  184. };
  185. partition@4 {
  186. label = "u-boot";
  187. reg = <0x100000 0x100000>;
  188. };
  189. partition@5 {
  190. label = "u-boot.backup1";
  191. reg = <0x200000 0x100000>;
  192. };
  193. partition@6 {
  194. label = "u-boot-2";
  195. reg = <0x300000 0x100000>;
  196. };
  197. partition@7 {
  198. label = "u-boot-2.backup1";
  199. reg = <0x400000 0x100000>;
  200. };
  201. partition@8 {
  202. label = "u-boot-env";
  203. reg = <0x500000 0x40000>;
  204. };
  205. partition@9 {
  206. label = "u-boot-env.backup1";
  207. reg = <0x540000 0x40000>;
  208. };
  209. partition@10 {
  210. label = "splash-screen";
  211. reg = <0x580000 0x40000>;
  212. };
  213. partition@11 {
  214. label = "UBI";
  215. reg = <0x5c0000 0x1fa40000>;
  216. };
  217. };
  218. };
  219. &i2c0 {
  220. pinctrl-names = "default";
  221. pinctrl-0 = <&i2c0_pins>;
  222. clock-frequency = <400000>;
  223. status = "okay";
  224. tps: tps@24 {
  225. reg = <0x24>;
  226. };
  227. };
  228. &lcdc {
  229. blue-and-red-wiring = "crossed";
  230. status = "okay";
  231. port {
  232. lcdc_0: endpoint@0 {
  233. remote-endpoint = <0>;
  234. };
  235. };
  236. };
  237. &mmc1 {
  238. bus-width = <0x4>;
  239. pinctrl-names = "default";
  240. pinctrl-0 = <&mmc1_pins>;
  241. cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
  242. vmmc-supply = <&vmmcsd_fixed>;
  243. status = "okay";
  244. };
  245. &rtc {
  246. clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
  247. clock-names = "ext-clk", "int-clk";
  248. };
  249. &spi0 {
  250. ti,pindir-d0-out-d1-in;
  251. pinctrl-names = "default";
  252. pinctrl-0 = <&spi0_pins>;
  253. status = "okay";
  254. };
  255. #include "tps65217.dtsi"
  256. &tps {
  257. /*
  258. * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
  259. * mode") at poweroff. Most BeagleBone versions do not support RTC-only
  260. * mode and risk hardware damage if this mode is entered.
  261. *
  262. * For details, see linux-omap mailing list May 2015 thread
  263. * [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
  264. * In particular, messages:
  265. * http://www.spinics.net/lists/linux-omap/msg118585.html
  266. * http://www.spinics.net/lists/linux-omap/msg118615.html
  267. *
  268. * You can override this later with
  269. * &tps { /delete-property/ ti,pmic-shutdown-controller; }
  270. * if you want to use RTC-only mode and made sure you are not affected
  271. * by the hardware problems. (Tip: double-check by performing a current
  272. * measurement after shutdown: it should be less than 1 mA.)
  273. */
  274. ti,pmic-shutdown-controller;
  275. interrupt-parent = <&intc>;
  276. interrupts = <7>; /* NMI */
  277. backlight {
  278. isel = <1>; /* 1 - ISET1, 2 ISET2 */
  279. fdim = <500>; /* TPS65217_BL_FDIM_500HZ */
  280. default-brightness = <50>;
  281. /* 1(on) - enable current sink, while initialization */
  282. /* 0(off) - disable current sink, while initialization */
  283. isink-en = <1>;
  284. };
  285. regulators {
  286. dcdc1_reg: regulator@0 {
  287. regulator-name = "vdds_dpr";
  288. regulator-always-on;
  289. };
  290. dcdc2_reg: regulator@1 {
  291. /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
  292. regulator-name = "vdd_mpu";
  293. regulator-min-microvolt = <925000>;
  294. regulator-max-microvolt = <1351500>;
  295. regulator-boot-on;
  296. regulator-always-on;
  297. };
  298. dcdc3_reg: regulator@2 {
  299. /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
  300. regulator-name = "vdd_core";
  301. regulator-min-microvolt = <925000>;
  302. regulator-max-microvolt = <1150000>;
  303. regulator-boot-on;
  304. regulator-always-on;
  305. };
  306. ldo1_reg: regulator@3 {
  307. regulator-name = "vio,vrtc,vdds";
  308. regulator-always-on;
  309. };
  310. ldo2_reg: regulator@4 {
  311. regulator-name = "vdd_3v3aux";
  312. regulator-always-on;
  313. };
  314. ldo3_reg: regulator@5 {
  315. regulator-name = "vdd_1v8";
  316. regulator-min-microvolt = <1800000>;
  317. regulator-max-microvolt = <1800000>;
  318. regulator-always-on;
  319. };
  320. ldo4_reg: regulator@6 {
  321. regulator-name = "vdd_3v3a";
  322. regulator-always-on;
  323. };
  324. };
  325. };
  326. &tscadc {
  327. status = "okay";
  328. adc {
  329. ti,adc-channels = <0 1 2 3 4 5 6>;
  330. };
  331. };
  332. &gpio0 {
  333. gpio-line-names =
  334. "",
  335. "",
  336. "",
  337. "",
  338. "",
  339. "",
  340. "",
  341. "",
  342. "",
  343. "",
  344. "",
  345. "",
  346. "",
  347. "",
  348. "",
  349. "",
  350. "",
  351. "",
  352. "",
  353. "",
  354. "",
  355. "",
  356. "",
  357. "",
  358. "",
  359. "",
  360. "",
  361. "",
  362. "",
  363. "MirxWakeup",
  364. "",
  365. "";
  366. };
  367. &gpio3 {
  368. ti,gpio-always-on;
  369. ti,no-reset-on-init;
  370. gpio-line-names =
  371. "",
  372. "MirxBtReset",
  373. "",
  374. "CcVolAdcEn",
  375. "MirxBlePause",
  376. "",
  377. "",
  378. "",
  379. "",
  380. "",
  381. "",
  382. "",
  383. "",
  384. "",
  385. "AspEn",
  386. "",
  387. "",
  388. "",
  389. "",
  390. "",
  391. "",
  392. "BatVolAdcEn",
  393. "",
  394. "",
  395. "",
  396. "",
  397. "",
  398. "",
  399. "",
  400. "",
  401. "",
  402. "";
  403. };
  404. &uart0 {
  405. pinctrl-names = "default";
  406. pinctrl-0 = <&uart0_pins>;
  407. status = "okay";
  408. };
  409. &uart2 {
  410. pinctrl-names = "default";
  411. pinctrl-0 = <&uart2_pins>;
  412. status = "okay";
  413. };
  414. &usb0 {
  415. dr_mode = "peripheral";
  416. };
  417. &usb1 {
  418. dr_mode = "host";
  419. /delete-property/dmas;
  420. /delete-property/dma-names;
  421. };
  422. &am33xx_pinmux {
  423. pinctrl-names = "default";
  424. pinctrl-0 = <&clkout2_pin &guardian_interface_pins>;
  425. clkout2_pin: pinmux_clkout2_pin {
  426. pinctrl-single,pins = <
  427. /* xdma_event_intr1.clkout2 */
  428. AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
  429. >;
  430. };
  431. guardian_interface_pins: pinmux_interface_pins {
  432. pinctrl-single,pins = <
  433. /* ADC_BATSENSE_EN */
  434. /* (A14) MCASP0_AHCLKx.gpio3[21] */
  435. AM33XX_IOPAD(0x9ac, PIN_OUTPUT_PULLDOWN | MUX_MODE7 )
  436. /* ADC_COINCELL_EN */
  437. /* (J16) MII1_TX_EN.gpio3[3] */
  438. AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE7 )
  439. /* ASP_ENABLE */
  440. /* (A13) MCASP0_ACLKx.gpio3[14] */
  441. AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLUP | MUX_MODE7)
  442. /* (D16) uart1_rxd.uart1_rxd */
  443. AM33XX_IOPAD(0x980, PIN_INPUT | MUX_MODE7)
  444. /* (D15) uart1_txd.uart1_txd */
  445. AM33XX_IOPAD(0x984, PIN_INPUT | MUX_MODE7)
  446. /*SWITCH-OFF_3V6*/
  447. /* (M18) gpio0[1] */
  448. AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE7)
  449. /* MIRACULIX */
  450. /* (H17) gmii1_crs.gpio3[1] */
  451. AM33XX_IOPAD(0x90c, PIN_OUTPUT_PULLDOWN | MUX_MODE7 )
  452. /* (H18) rmii1_refclk.gpio0[29] */
  453. AM33XX_IOPAD(0x944, PIN_OUTPUT_PULLDOWN | MUX_MODE7 )
  454. /* (J18) gmii1_txd3.gpio0[16] */
  455. AM33XX_IOPAD(0x91c, PIN_INPUT | MUX_MODE7 )
  456. /* (J17) gmii1_rxdv.gpio3[4] */
  457. AM33XX_IOPAD(0x918, PIN_OUTPUT_PULLDOWN | MUX_MODE7 )
  458. >;
  459. };
  460. guardian_beeper_pins: pinmux_dmtimer7_pins {
  461. pinctrl-single,pins = <
  462. AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE5) /* (E18) timer7 */
  463. >;
  464. };
  465. guardian_button_pins: pinmux_guardian_button_pins {
  466. pinctrl-single,pins = <
  467. AM33XX_IOPAD(0x940, PIN_INPUT | MUX_MODE7) /* (M16) gmii1_rxd0.gpio2[21] */
  468. AM33XX_IOPAD(0x884, PIN_INPUT | MUX_MODE7) /* (V9) gpmc_csn2.gpio1[31] */
  469. >;
  470. };
  471. i2c0_pins: pinmux_i2c0_pins {
  472. pinctrl-single,pins = <
  473. AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
  474. AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
  475. >;
  476. };
  477. led_bl_pins: gpio_led_bl_pins {
  478. pinctrl-single,pins = <
  479. /* P9_14, gpmc_a[2].GPIO1[18] (backlight control) */
  480. AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE7)
  481. >;
  482. };
  483. lcd_disen_pins: pinmux_lcd_disen_pins {
  484. pinctrl-single,pins = <
  485. /* P9_27, mcasp0_fsr.gpio3[19] (lcd_disen) */
  486. AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLUP | SLEWCTRL_SLOW | MUX_MODE7)
  487. >;
  488. };
  489. lcd_pins_default: pinmux_lcd_pins_default {
  490. pinctrl-single,pins = <
  491. /* (U10) gpmc_ad8.lcd_data23 */
  492. AM33XX_IOPAD(0x820, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
  493. /* (T10) gpmc_ad9.lcd_data22 */
  494. AM33XX_IOPAD(0x824, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
  495. /* (T11) gpmc_ad10.lcd_data21 */
  496. AM33XX_IOPAD(0x828, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
  497. /* (U12) gpmc_ad11.lcd_data20 */
  498. AM33XX_IOPAD(0x82c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
  499. /* (T12) gpmc_ad12.lcd_data19 */
  500. AM33XX_IOPAD(0x830, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
  501. /* (R12) gpmc_ad13.lcd_data18 */
  502. AM33XX_IOPAD(0x834, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
  503. /* (V13) gpmc_ad14.lcd_data17 */
  504. AM33XX_IOPAD(0x838, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
  505. /* (U13) gpmc_ad15.lcd_data16 */
  506. AM33XX_IOPAD(0x83c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
  507. /* lcd_data0.lcd_data0 */
  508. AM33XX_IOPAD(0x8a0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
  509. /* lcd_data1.lcd_data1 */
  510. AM33XX_IOPAD(0x8a4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
  511. /* lcd_data2.lcd_data2 */
  512. AM33XX_IOPAD(0x8a8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
  513. /* lcd_data3.lcd_data3 */
  514. AM33XX_IOPAD(0x8ac, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
  515. /* lcd_data4.lcd_data4 */
  516. AM33XX_IOPAD(0x8b0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
  517. /* lcd_data5.lcd_data5 */
  518. AM33XX_IOPAD(0x8b4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
  519. /* lcd_data6.lcd_data6 */
  520. AM33XX_IOPAD(0x8b8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
  521. /* lcd_data7.lcd_data7 */
  522. AM33XX_IOPAD(0x8bc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
  523. /* lcd_data8.lcd_data8 */
  524. AM33XX_IOPAD(0x8c0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
  525. /* lcd_data9.lcd_data9 */
  526. AM33XX_IOPAD(0x8c4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
  527. /* lcd_data10.lcd_data10 */
  528. AM33XX_IOPAD(0x8c8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
  529. /* lcd_data11.lcd_data11 */
  530. AM33XX_IOPAD(0x8cc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
  531. /* lcd_data12.lcd_data12 */
  532. AM33XX_IOPAD(0x8d0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
  533. /* lcd_data13.lcd_data13 */
  534. AM33XX_IOPAD(0x8d4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
  535. /* lcd_data14.lcd_data14 */
  536. AM33XX_IOPAD(0x8d8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
  537. /* lcd_data15.lcd_data15 */
  538. AM33XX_IOPAD(0x8dc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
  539. /* lcd_vsync.lcd_vsync */
  540. AM33XX_IOPAD(0x8e0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
  541. /* lcd_hsync.lcd_hsync */
  542. AM33XX_IOPAD(0x8e4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
  543. /* lcd_pclk.lcd_pclk */
  544. AM33XX_IOPAD(0x8e8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
  545. /* lcd_ac_bias_en.lcd_ac_bias_en */
  546. AM33XX_IOPAD(0x8ec, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
  547. >;
  548. };
  549. lcd_pins_sleep: pinmux_lcd_pins_sleep {
  550. pinctrl-single,pins = <
  551. /* lcd_data0.lcd_data0 */
  552. AM33XX_IOPAD(0x8a0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
  553. /* lcd_data1.lcd_data1 */
  554. AM33XX_IOPAD(0x8a4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
  555. /* lcd_data2.lcd_data2 */
  556. AM33XX_IOPAD(0x8a8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
  557. /* lcd_data3.lcd_data3 */
  558. AM33XX_IOPAD(0x8ac, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
  559. /* lcd_data4.lcd_data4 */
  560. AM33XX_IOPAD(0x8b0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
  561. /* lcd_data5.lcd_data5 */
  562. AM33XX_IOPAD(0x8b4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
  563. /* lcd_data6.lcd_data6 */
  564. AM33XX_IOPAD(0x8b8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
  565. /* lcd_data7.lcd_data7 */
  566. AM33XX_IOPAD(0x8bc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
  567. /* lcd_data8.lcd_data8 */
  568. AM33XX_IOPAD(0x8c0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
  569. /* lcd_data9.lcd_data9 */
  570. AM33XX_IOPAD(0x8c4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
  571. /* lcd_data10.lcd_data10 */
  572. AM33XX_IOPAD(0x8c8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
  573. /* lcd_data11.lcd_data11 */
  574. AM33XX_IOPAD(0x8cc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
  575. /* lcd_data12.lcd_data12 */
  576. AM33XX_IOPAD(0x8d0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
  577. /* lcd_data13.lcd_data13 */
  578. AM33XX_IOPAD(0x8d4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
  579. /* lcd_data14.lcd_data14 */
  580. AM33XX_IOPAD(0x8d8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
  581. /* lcd_data15.lcd_data15 */
  582. AM33XX_IOPAD(0x8dc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
  583. /* lcd_vsync.lcd_vsync */
  584. AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
  585. /* lcd_hsync.lcd_hsync */
  586. AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
  587. /* lcd_pclk.lcd_pclk */
  588. AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
  589. /* lcd_ac_bias_en.lcd_ac_bias_en */
  590. AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
  591. >;
  592. };
  593. guardian_led_pins: pinmux_guardian_led_pins {
  594. pinctrl-single,pins = <
  595. AM33XX_IOPAD(0x868, PIN_OUTPUT | MUX_MODE7) /* (T16) gpmc_a10.gpio1[26] */
  596. >;
  597. };
  598. mmc1_pins: pinmux_mmc1_pins {
  599. pinctrl-single,pins = <
  600. AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
  601. AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
  602. AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
  603. AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
  604. AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
  605. AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
  606. AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
  607. >;
  608. };
  609. spi0_pins: pinmux_spi0_pins {
  610. pinctrl-single,pins = <
  611. /* SPI0_CLK - spi0_clk.spi */
  612. AM33XX_IOPAD(0x950, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
  613. /* SPI0_MOSI - spi0_d0.spi0 */
  614. AM33XX_IOPAD(0x954, PIN_OUTPUT_PULLUP | MUX_MODE0)
  615. /* SPI0_MISO - spi0_d1.spi0 */
  616. AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0)
  617. /* SPI0_CS0 - spi */
  618. AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLUP | MUX_MODE0)
  619. >;
  620. };
  621. uart0_pins: pinmux_uart0_pins {
  622. pinctrl-single,pins = <
  623. /* uart0_rxd.uart0_rxd */
  624. AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)
  625. /* uart0_txd.uart0_txd */
  626. AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
  627. >;
  628. };
  629. uart2_pins: pinmux_uart2_pins {
  630. pinctrl-single,pins = <
  631. /* K18 uart2_rxd.mirx_txd */
  632. AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE1)
  633. /* L18 uart2_txd.mirx_rxd */
  634. AM33XX_IOPAD(0x930, PIN_OUTPUT_PULLDOWN | MUX_MODE1)
  635. >;
  636. };
  637. nandflash_pins: pinmux_nandflash_pins {
  638. pinctrl-single,pins = <
  639. /* (U7) gpmc_ad0.gpmc_ad0 */
  640. AM33XX_IOPAD(0x800, PIN_INPUT | MUX_MODE0)
  641. /* (V7) gpmc_ad1.gpmc_ad1 */
  642. AM33XX_IOPAD(0x804, PIN_INPUT | MUX_MODE0)
  643. /* (R8) gpmc_ad2.gpmc_ad2 */
  644. AM33XX_IOPAD(0x808, PIN_INPUT | MUX_MODE0)
  645. /* (T8) gpmc_ad3.gpmc_ad3 */
  646. AM33XX_IOPAD(0x80c, PIN_INPUT | MUX_MODE0)
  647. /* (U8) gpmc_ad4.gpmc_ad4 */
  648. AM33XX_IOPAD(0x810, PIN_INPUT | MUX_MODE0)
  649. /* (V8) gpmc_ad5.gpmc_ad5 */
  650. AM33XX_IOPAD(0x814, PIN_INPUT | MUX_MODE0)
  651. /* (R9) gpmc_ad6.gpmc_ad6 */
  652. AM33XX_IOPAD(0x818, PIN_INPUT | MUX_MODE0)
  653. /* (T9) gpmc_ad7.gpmc_ad7 */
  654. AM33XX_IOPAD(0x81c, PIN_INPUT | MUX_MODE0)
  655. /* (T17) gpmc_wait0.gpmc_wait0 */
  656. AM33XX_IOPAD(0x870, PIN_INPUT | MUX_MODE0)
  657. /* (U17) gpmc_wpn.gpmc_wpn */
  658. AM33XX_IOPAD(0x874, PIN_OUTPUT | MUX_MODE0)
  659. /* (V6) gpmc_csn0.gpmc_csn0 */
  660. AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)
  661. /* (R7) gpmc_advn_ale.gpmc_advn_ale */
  662. AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)
  663. /* (T7) gpmc_oen_ren.gpmc_oen_ren */
  664. AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)
  665. /* (U6) gpmc_wen.gpmc_wen */
  666. AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)
  667. /* (T6) gpmc_be0n_cle.gpmc_be0n_cle */
  668. AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)
  669. >;
  670. };
  671. };