am335x-cm-t335.dts 14 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * am335x-cm-t335.dts - Device Tree file for Compulab CM-T335
  4. *
  5. * Copyright (C) 2014 - 2015 CompuLab Ltd. - http://www.compulab.co.il/
  6. */
  7. /dts-v1/;
  8. #include "am33xx.dtsi"
  9. #include <dt-bindings/interrupt-controller/irq.h>
  10. / {
  11. model = "CompuLab CM-T335";
  12. compatible = "compulab,cm-t335", "ti,am33xx";
  13. memory@80000000 {
  14. device_type = "memory";
  15. reg = <0x80000000 0x8000000>; /* 128 MB */
  16. };
  17. leds {
  18. compatible = "gpio-leds";
  19. pinctrl-names = "default";
  20. pinctrl-0 = <&gpio_led_pins>;
  21. led0 {
  22. label = "cm_t335:green";
  23. gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; /* gpio2_0 */
  24. linux,default-trigger = "heartbeat";
  25. };
  26. };
  27. /* regulator for mmc */
  28. vmmc_fixed: fixedregulator0 {
  29. compatible = "regulator-fixed";
  30. regulator-name = "vmmc_fixed";
  31. regulator-min-microvolt = <3300000>;
  32. regulator-max-microvolt = <3300000>;
  33. };
  34. /* Regulator for WiFi */
  35. vwlan_fixed: fixedregulator2 {
  36. compatible = "regulator-fixed";
  37. regulator-name = "vwlan_fixed";
  38. gpio = <&gpio0 20 GPIO_ACTIVE_HIGH>; /* gpio0_20 */
  39. enable-active-high;
  40. };
  41. backlight {
  42. compatible = "pwm-backlight";
  43. pwms = <&ecap0 0 50000 0>;
  44. brightness-levels = <0 51 53 56 62 75 101 152 255>;
  45. default-brightness-level = <8>;
  46. };
  47. sound {
  48. compatible = "simple-audio-card";
  49. simple-audio-card,name = "cm-t335";
  50. simple-audio-card,widgets =
  51. "Microphone", "Mic Jack",
  52. "Line", "Line In",
  53. "Headphone", "Headphone Jack";
  54. simple-audio-card,routing =
  55. "Headphone Jack", "LHPOUT",
  56. "Headphone Jack", "RHPOUT",
  57. "LLINEIN", "Line In",
  58. "RLINEIN", "Line In",
  59. "MICIN", "Mic Jack";
  60. simple-audio-card,format = "i2s";
  61. simple-audio-card,bitclock-master = <&sound_master>;
  62. simple-audio-card,frame-master = <&sound_master>;
  63. simple-audio-card,cpu {
  64. sound-dai = <&mcasp1>;
  65. };
  66. sound_master: simple-audio-card,codec {
  67. sound-dai = <&tlv320aic23>;
  68. system-clock-frequency = <12000000>;
  69. };
  70. };
  71. };
  72. &am33xx_pinmux {
  73. pinctrl-names = "default";
  74. pinctrl-0 = <&bluetooth_pins>;
  75. i2c0_pins: pinmux_i2c0_pins {
  76. pinctrl-single,pins = <
  77. AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
  78. AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
  79. >;
  80. };
  81. i2c1_pins: pinmux_i2c1_pins {
  82. pinctrl-single,pins = <
  83. /* uart0_ctsn.i2c1_sda */
  84. AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLUP, MUX_MODE2)
  85. /* uart0_rtsn.i2c1_scl */
  86. AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE2)
  87. >;
  88. };
  89. gpio_led_pins: pinmux_gpio_led_pins {
  90. pinctrl-single,pins = <
  91. /* gpmc_csn3.gpio2_0 */
  92. AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_OUTPUT, MUX_MODE7)
  93. >;
  94. };
  95. nandflash_pins: pinmux_nandflash_pins {
  96. pinctrl-single,pins = <
  97. AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE0)
  98. AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE0)
  99. AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE0)
  100. AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE0)
  101. AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE0)
  102. AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE0)
  103. AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE0)
  104. AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE0)
  105. AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0)
  106. /* gpmc_wpn.gpio0_31 */
  107. AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7)
  108. AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0)
  109. AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0)
  110. AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0)
  111. AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE0)
  112. AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE0)
  113. >;
  114. };
  115. uart0_pins: pinmux_uart0_pins {
  116. pinctrl-single,pins = <
  117. AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
  118. AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
  119. >;
  120. };
  121. uart1_pins: pinmux_uart1_pins {
  122. pinctrl-single,pins = <
  123. AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT, MUX_MODE0)
  124. AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
  125. AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
  126. AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
  127. >;
  128. };
  129. dcan0_pins: pinmux_dcan0_pins {
  130. pinctrl-single,pins = <
  131. /* uart1_ctsn.dcan0_tx */
  132. AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_OUTPUT, MUX_MODE2)
  133. /* uart1_rtsn.dcan0_rx */
  134. AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT, MUX_MODE2)
  135. >;
  136. };
  137. dcan1_pins: pinmux_dcan1_pins {
  138. pinctrl-single,pins = <
  139. /* uart1_rxd.dcan1_tx */
  140. AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_OUTPUT, MUX_MODE2)
  141. /* uart1_txd.dcan1_rx */
  142. AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE2)
  143. >;
  144. };
  145. ecap0_pins: pinmux_ecap0_pins {
  146. pinctrl-single,pins = <
  147. AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, 0x0, MUX_MODE0)
  148. >;
  149. };
  150. cpsw_default: cpsw_default {
  151. pinctrl-single,pins = <
  152. /* Slave 1 */
  153. /* mii1_tx_en.rgmii1_tctl */
  154. AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
  155. /* mii1_rxdv.rgmii1_rctl */
  156. AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2)
  157. /* mii1_txd3.rgmii1_td3 */
  158. AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
  159. /* mii1_txd2.rgmii1_td2 */
  160. AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
  161. /* mii1_txd1.rgmii1_td1 */
  162. AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
  163. /* mii1_txd0.rgmii1_td0 */
  164. AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
  165. /* mii1_txclk.rgmii1_tclk */
  166. AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
  167. /* mii1_rxclk.rgmii1_rclk */
  168. AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2)
  169. /* mii1_rxd3.rgmii1_rd3 */
  170. AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2)
  171. /* mii1_rxd2.rgmii1_rd2 */
  172. AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2)
  173. /* mii1_rxd1.rgmii1_rd1 */
  174. AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2)
  175. /* mii1_rxd0.rgmii1_rd0 */
  176. AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2)
  177. >;
  178. };
  179. cpsw_sleep: cpsw_sleep {
  180. pinctrl-single,pins = <
  181. /* Slave 1 reset value */
  182. AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
  183. AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
  184. AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
  185. AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
  186. AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
  187. AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
  188. AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
  189. AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
  190. AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
  191. AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
  192. AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
  193. AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
  194. >;
  195. };
  196. davinci_mdio_default: davinci_mdio_default {
  197. pinctrl-single,pins = <
  198. AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
  199. AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
  200. >;
  201. };
  202. davinci_mdio_sleep: davinci_mdio_sleep {
  203. pinctrl-single,pins = <
  204. /* MDIO reset value */
  205. AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
  206. AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
  207. >;
  208. };
  209. mmc1_pins: pinmux_mmc1_pins {
  210. pinctrl-single,pins = <
  211. AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
  212. AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
  213. AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
  214. AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
  215. AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
  216. AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
  217. >;
  218. };
  219. spi0_pins: pinmux_spi0_pins {
  220. pinctrl-single,pins = <
  221. AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE0)
  222. AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT_PULLUP, MUX_MODE0)
  223. AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT, MUX_MODE0)
  224. AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_OUTPUT, MUX_MODE0)
  225. AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_OUTPUT, MUX_MODE0)
  226. >;
  227. };
  228. /* wl1271 bluetooth */
  229. bluetooth_pins: pinmux_bluetooth_pins {
  230. pinctrl-single,pins = <
  231. /* XDMA_EVENT_INTR0.gpio0_19 - bluetooth enable */
  232. AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLUP, MUX_MODE7)
  233. >;
  234. };
  235. /* TLV320AIC23B codec */
  236. mcasp1_pins: pinmux_mcasp1_pins {
  237. pinctrl-single,pins = <
  238. /* MII1_CRS.mcasp1_aclkx */
  239. AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE4)
  240. /* MII1_RX_ER.mcasp1_fsx */
  241. AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE4)
  242. /* MII1_COL.mcasp1_axr2 */
  243. AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE4)
  244. /* RMII1_REF_CLK.mcasp1_axr3 */
  245. AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE4)
  246. >;
  247. };
  248. /* wl1271 WiFi */
  249. wifi_pins: pinmux_wifi_pins {
  250. pinctrl-single,pins = <
  251. /* EMU1.gpio3_8 - WiFi IRQ */
  252. AM33XX_PADCONF(AM335X_PIN_EMU1, PIN_INPUT_PULLUP, MUX_MODE7)
  253. /* XDMA_EVENT_INTR1.gpio0_20 - WiFi enable */
  254. AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT, MUX_MODE7)
  255. >;
  256. };
  257. };
  258. &uart0 {
  259. pinctrl-names = "default";
  260. pinctrl-0 = <&uart0_pins>;
  261. status = "okay";
  262. };
  263. /* WLS1271 bluetooth */
  264. &uart1 {
  265. pinctrl-names = "default";
  266. pinctrl-0 = <&uart1_pins>;
  267. status = "okay";
  268. };
  269. &i2c0 {
  270. pinctrl-names = "default";
  271. pinctrl-0 = <&i2c0_pins>;
  272. status = "okay";
  273. clock-frequency = <400000>;
  274. /* CM-T335 board EEPROM */
  275. eeprom: 24c02@50 {
  276. compatible = "atmel,24c02";
  277. reg = <0x50>;
  278. pagesize = <16>;
  279. };
  280. /* Real Time Clock */
  281. ext_rtc: em3027@56 {
  282. compatible = "emmicro,em3027";
  283. reg = <0x56>;
  284. };
  285. /* Audio codec */
  286. tlv320aic23: codec@1a {
  287. compatible = "ti,tlv320aic23";
  288. reg = <0x1a>;
  289. #sound-dai-cells = <0>;
  290. status = "okay";
  291. };
  292. };
  293. &epwmss0 {
  294. status = "okay";
  295. ecap0: pwm@100 {
  296. status = "okay";
  297. pinctrl-names = "default";
  298. pinctrl-0 = <&ecap0_pins>;
  299. };
  300. };
  301. &gpmc {
  302. status = "okay";
  303. pinctrl-names = "default";
  304. pinctrl-0 = <&nandflash_pins>;
  305. ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
  306. nand@0,0 {
  307. compatible = "ti,omap2-nand";
  308. reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
  309. interrupt-parent = <&gpmc>;
  310. interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
  311. <1 IRQ_TYPE_NONE>; /* termcount */
  312. rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
  313. ti,nand-ecc-opt = "bch8";
  314. ti,elm-id = <&elm>;
  315. nand-bus-width = <8>;
  316. gpmc,device-width = <1>;
  317. gpmc,sync-clk-ps = <0>;
  318. gpmc,cs-on-ns = <0>;
  319. gpmc,cs-rd-off-ns = <44>;
  320. gpmc,cs-wr-off-ns = <44>;
  321. gpmc,adv-on-ns = <6>;
  322. gpmc,adv-rd-off-ns = <34>;
  323. gpmc,adv-wr-off-ns = <44>;
  324. gpmc,we-on-ns = <0>;
  325. gpmc,we-off-ns = <40>;
  326. gpmc,oe-on-ns = <0>;
  327. gpmc,oe-off-ns = <54>;
  328. gpmc,access-ns = <64>;
  329. gpmc,rd-cycle-ns = <82>;
  330. gpmc,wr-cycle-ns = <82>;
  331. gpmc,bus-turnaround-ns = <0>;
  332. gpmc,cycle2cycle-delay-ns = <0>;
  333. gpmc,clk-activation-ns = <0>;
  334. gpmc,wr-access-ns = <40>;
  335. gpmc,wr-data-mux-bus-ns = <0>;
  336. /* MTD partition table */
  337. #address-cells = <1>;
  338. #size-cells = <1>;
  339. partition@0 {
  340. label = "spl";
  341. reg = <0x00000000 0x00200000>;
  342. };
  343. partition@1 {
  344. label = "uboot";
  345. reg = <0x00200000 0x00100000>;
  346. };
  347. partition@2 {
  348. label = "uboot environment";
  349. reg = <0x00300000 0x00100000>;
  350. };
  351. partition@3 {
  352. label = "dtb";
  353. reg = <0x00400000 0x00100000>;
  354. };
  355. partition@4 {
  356. label = "splash";
  357. reg = <0x00500000 0x00400000>;
  358. };
  359. partition@5 {
  360. label = "linux";
  361. reg = <0x00900000 0x00600000>;
  362. };
  363. partition@6 {
  364. label = "rootfs";
  365. reg = <0x00F00000 0>;
  366. };
  367. };
  368. };
  369. &elm {
  370. status = "okay";
  371. };
  372. &mac_sw {
  373. pinctrl-names = "default", "sleep";
  374. pinctrl-0 = <&cpsw_default>;
  375. pinctrl-1 = <&cpsw_sleep>;
  376. status = "okay";
  377. };
  378. &davinci_mdio_sw {
  379. pinctrl-names = "default", "sleep";
  380. pinctrl-0 = <&davinci_mdio_default>;
  381. pinctrl-1 = <&davinci_mdio_sleep>;
  382. ethphy0: ethernet-phy@0 {
  383. reg = <0>;
  384. };
  385. };
  386. &cpsw_port1 {
  387. phy-handle = <&ethphy0>;
  388. phy-mode = "rgmii-txid";
  389. ti,dual-emac-pvid = <1>;
  390. };
  391. &cpsw_port2 {
  392. status = "disabled";
  393. };
  394. &mmc1 {
  395. status = "okay";
  396. vmmc-supply = <&vmmc_fixed>;
  397. bus-width = <4>;
  398. pinctrl-names = "default";
  399. pinctrl-0 = <&mmc1_pins>;
  400. };
  401. &dcan0 {
  402. status = "okay";
  403. pinctrl-names = "default";
  404. pinctrl-0 = <&dcan0_pins>;
  405. };
  406. &dcan1 {
  407. status = "okay";
  408. pinctrl-names = "default";
  409. pinctrl-0 = <&dcan1_pins>;
  410. };
  411. /* Touschscreen and analog digital converter */
  412. &tscadc {
  413. status = "okay";
  414. tsc {
  415. ti,wires = <4>;
  416. ti,x-plate-resistance = <200>;
  417. ti,coordinate-readouts = <5>;
  418. ti,wire-config = <0x01 0x10 0x23 0x32>;
  419. ti,charge-delay = <0x400>;
  420. };
  421. adc {
  422. ti,adc-channels = <4 5 6 7>;
  423. };
  424. };
  425. /* CPU audio */
  426. &mcasp1 {
  427. pinctrl-names = "default";
  428. pinctrl-0 = <&mcasp1_pins>;
  429. op-mode = <0>; /* MCASP_IIS_MODE */
  430. tdm-slots = <2>;
  431. /* 16 serializers */
  432. num-serializer = <16>;
  433. serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
  434. 0 0 2 1 0 0 0 0 0 0 0 0 0 0 0 0
  435. >;
  436. tx-num-evt = <1>;
  437. rx-num-evt = <1>;
  438. #sound-dai-cells = <0>;
  439. status = "okay";
  440. };
  441. &spi0 {
  442. status = "okay";
  443. pinctrl-names = "default";
  444. pinctrl-0 = <&spi0_pins>;
  445. ti,pindir-d0-out-d1-in;
  446. /* WLS1271 WiFi */
  447. wlcore: wlcore@1 {
  448. compatible = "ti,wl1271";
  449. pinctrl-names = "default";
  450. pinctrl-0 = <&wifi_pins>;
  451. reg = <1>;
  452. spi-max-frequency = <48000000>;
  453. clock-xtal;
  454. ref-clock-frequency = <38400000>;
  455. interrupt-parent = <&gpio3>;
  456. interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
  457. vwlan-supply = <&vwlan_fixed>;
  458. };
  459. };