am335x-bone-common.dtsi 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
  4. */
  5. / {
  6. cpus {
  7. cpu@0 {
  8. cpu0-supply = <&dcdc2_reg>;
  9. };
  10. };
  11. memory@80000000 {
  12. device_type = "memory";
  13. reg = <0x80000000 0x10000000>; /* 256 MB */
  14. };
  15. chosen {
  16. stdout-path = &uart0;
  17. };
  18. leds {
  19. pinctrl-names = "default";
  20. pinctrl-0 = <&user_leds_s0>;
  21. compatible = "gpio-leds";
  22. led2 {
  23. label = "beaglebone:green:heartbeat";
  24. gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
  25. linux,default-trigger = "heartbeat";
  26. default-state = "off";
  27. };
  28. led3 {
  29. label = "beaglebone:green:mmc0";
  30. gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
  31. linux,default-trigger = "mmc0";
  32. default-state = "off";
  33. };
  34. led4 {
  35. label = "beaglebone:green:usr2";
  36. gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
  37. linux,default-trigger = "cpu0";
  38. default-state = "off";
  39. };
  40. led5 {
  41. label = "beaglebone:green:usr3";
  42. gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
  43. linux,default-trigger = "mmc1";
  44. default-state = "off";
  45. };
  46. };
  47. vmmcsd_fixed: fixedregulator0 {
  48. compatible = "regulator-fixed";
  49. regulator-name = "vmmcsd_fixed";
  50. regulator-min-microvolt = <3300000>;
  51. regulator-max-microvolt = <3300000>;
  52. };
  53. };
  54. &am33xx_pinmux {
  55. pinctrl-names = "default";
  56. pinctrl-0 = <&clkout2_pin>;
  57. user_leds_s0: user_leds_s0 {
  58. pinctrl-single,pins = <
  59. AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 */
  60. AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a6.gpio1_22 */
  61. AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a7.gpio1_23 */
  62. AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a8.gpio1_24 */
  63. >;
  64. };
  65. i2c0_pins: pinmux_i2c0_pins {
  66. pinctrl-single,pins = <
  67. AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0) /* i2c0_sda.i2c0_sda */
  68. AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0) /* i2c0_scl.i2c0_scl */
  69. >;
  70. };
  71. i2c2_pins: pinmux_i2c2_pins {
  72. pinctrl-single,pins = <
  73. AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_ctsn.i2c2_sda */
  74. AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_rtsn.i2c2_scl */
  75. >;
  76. };
  77. uart0_pins: pinmux_uart0_pins {
  78. pinctrl-single,pins = <
  79. AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
  80. AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
  81. >;
  82. };
  83. clkout2_pin: pinmux_clkout2_pin {
  84. pinctrl-single,pins = <
  85. AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* xdma_event_intr1.clkout2 */
  86. >;
  87. };
  88. cpsw_default: cpsw_default {
  89. pinctrl-single,pins = <
  90. /* Slave 1 */
  91. AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE0)
  92. AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
  93. AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE0)
  94. AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
  95. AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
  96. AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
  97. AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
  98. AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
  99. AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
  100. AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE0)
  101. AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLUP, MUX_MODE0)
  102. AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE0)
  103. AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE0)
  104. >;
  105. };
  106. cpsw_sleep: cpsw_sleep {
  107. pinctrl-single,pins = <
  108. /* Slave 1 reset value */
  109. AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
  110. AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
  111. AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
  112. AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
  113. AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
  114. AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
  115. AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
  116. AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
  117. AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
  118. AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
  119. AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
  120. AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
  121. AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
  122. >;
  123. };
  124. davinci_mdio_default: davinci_mdio_default {
  125. pinctrl-single,pins = <
  126. /* MDIO */
  127. AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
  128. AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
  129. >;
  130. };
  131. davinci_mdio_sleep: davinci_mdio_sleep {
  132. pinctrl-single,pins = <
  133. /* MDIO reset value */
  134. AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
  135. AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
  136. >;
  137. };
  138. mmc1_pins: pinmux_mmc1_pins {
  139. pinctrl-single,pins = <
  140. AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* spio0_cs1.gpio0_6 */
  141. AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
  142. AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
  143. AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
  144. AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
  145. AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
  146. AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
  147. >;
  148. };
  149. emmc_pins: pinmux_emmc_pins {
  150. pinctrl-single,pins = <
  151. AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */
  152. AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
  153. AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
  154. AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
  155. AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
  156. AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
  157. AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
  158. AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
  159. AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
  160. AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
  161. >;
  162. };
  163. };
  164. &uart0 {
  165. pinctrl-names = "default";
  166. pinctrl-0 = <&uart0_pins>;
  167. status = "okay";
  168. };
  169. &usb0 {
  170. dr_mode = "peripheral";
  171. interrupts-extended = <&intc 18 &tps 0>;
  172. interrupt-names = "mc", "vbus";
  173. };
  174. &usb1 {
  175. dr_mode = "host";
  176. };
  177. &i2c0 {
  178. pinctrl-names = "default";
  179. pinctrl-0 = <&i2c0_pins>;
  180. status = "okay";
  181. clock-frequency = <400000>;
  182. tps: tps@24 {
  183. reg = <0x24>;
  184. };
  185. baseboard_eeprom: baseboard_eeprom@50 {
  186. compatible = "atmel,24c256";
  187. reg = <0x50>;
  188. #address-cells = <1>;
  189. #size-cells = <1>;
  190. baseboard_data: baseboard_data@0 {
  191. reg = <0 0x100>;
  192. };
  193. };
  194. };
  195. &i2c2 {
  196. pinctrl-names = "default";
  197. pinctrl-0 = <&i2c2_pins>;
  198. status = "okay";
  199. clock-frequency = <100000>;
  200. cape_eeprom0: cape_eeprom0@54 {
  201. compatible = "atmel,24c256";
  202. reg = <0x54>;
  203. #address-cells = <1>;
  204. #size-cells = <1>;
  205. cape0_data: cape_data@0 {
  206. reg = <0 0x100>;
  207. };
  208. };
  209. cape_eeprom1: cape_eeprom1@55 {
  210. compatible = "atmel,24c256";
  211. reg = <0x55>;
  212. #address-cells = <1>;
  213. #size-cells = <1>;
  214. cape1_data: cape_data@0 {
  215. reg = <0 0x100>;
  216. };
  217. };
  218. cape_eeprom2: cape_eeprom2@56 {
  219. compatible = "atmel,24c256";
  220. reg = <0x56>;
  221. #address-cells = <1>;
  222. #size-cells = <1>;
  223. cape2_data: cape_data@0 {
  224. reg = <0 0x100>;
  225. };
  226. };
  227. cape_eeprom3: cape_eeprom3@57 {
  228. compatible = "atmel,24c256";
  229. reg = <0x57>;
  230. #address-cells = <1>;
  231. #size-cells = <1>;
  232. cape3_data: cape_data@0 {
  233. reg = <0 0x100>;
  234. };
  235. };
  236. };
  237. /include/ "tps65217.dtsi"
  238. &tps {
  239. /*
  240. * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
  241. * mode") at poweroff. Most BeagleBone versions do not support RTC-only
  242. * mode and risk hardware damage if this mode is entered.
  243. *
  244. * For details, see linux-omap mailing list May 2015 thread
  245. * [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
  246. * In particular, messages:
  247. * http://www.spinics.net/lists/linux-omap/msg118585.html
  248. * http://www.spinics.net/lists/linux-omap/msg118615.html
  249. *
  250. * You can override this later with
  251. * &tps { /delete-property/ ti,pmic-shutdown-controller; }
  252. * if you want to use RTC-only mode and made sure you are not affected
  253. * by the hardware problems. (Tip: double-check by performing a current
  254. * measurement after shutdown: it should be less than 1 mA.)
  255. */
  256. interrupts = <7>; /* NMI */
  257. interrupt-parent = <&intc>;
  258. ti,pmic-shutdown-controller;
  259. charger {
  260. status = "okay";
  261. };
  262. pwrbutton {
  263. status = "okay";
  264. };
  265. regulators {
  266. dcdc1_reg: regulator@0 {
  267. regulator-name = "vdds_dpr";
  268. regulator-always-on;
  269. };
  270. dcdc2_reg: regulator@1 {
  271. /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
  272. regulator-name = "vdd_mpu";
  273. regulator-min-microvolt = <925000>;
  274. regulator-max-microvolt = <1351500>;
  275. regulator-boot-on;
  276. regulator-always-on;
  277. };
  278. dcdc3_reg: regulator@2 {
  279. /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
  280. regulator-name = "vdd_core";
  281. regulator-min-microvolt = <925000>;
  282. regulator-max-microvolt = <1150000>;
  283. regulator-boot-on;
  284. regulator-always-on;
  285. };
  286. ldo1_reg: regulator@3 {
  287. regulator-name = "vio,vrtc,vdds";
  288. regulator-always-on;
  289. };
  290. ldo2_reg: regulator@4 {
  291. regulator-name = "vdd_3v3aux";
  292. regulator-always-on;
  293. };
  294. ldo3_reg: regulator@5 {
  295. regulator-name = "vdd_1v8";
  296. regulator-always-on;
  297. };
  298. ldo4_reg: regulator@6 {
  299. regulator-name = "vdd_3v3a";
  300. regulator-always-on;
  301. };
  302. };
  303. };
  304. &cpsw_port1 {
  305. phy-handle = <&ethphy0>;
  306. phy-mode = "mii";
  307. ti,dual-emac-pvid = <1>;
  308. };
  309. &cpsw_port2 {
  310. status = "disabled";
  311. };
  312. &mac_sw {
  313. pinctrl-names = "default", "sleep";
  314. pinctrl-0 = <&cpsw_default>;
  315. pinctrl-1 = <&cpsw_sleep>;
  316. status = "okay";
  317. };
  318. &davinci_mdio_sw {
  319. pinctrl-names = "default", "sleep";
  320. pinctrl-0 = <&davinci_mdio_default>;
  321. pinctrl-1 = <&davinci_mdio_sleep>;
  322. ethphy0: ethernet-phy@0 {
  323. reg = <0>;
  324. };
  325. };
  326. &mmc1 {
  327. status = "okay";
  328. bus-width = <0x4>;
  329. pinctrl-names = "default";
  330. pinctrl-0 = <&mmc1_pins>;
  331. cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
  332. };
  333. &aes {
  334. status = "okay";
  335. };
  336. &sham {
  337. status = "okay";
  338. };
  339. &rtc {
  340. clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
  341. clock-names = "ext-clk", "int-clk";
  342. system-power-controller;
  343. };
  344. &pruss_tm {
  345. status = "okay";
  346. };
  347. &wkup_m3_ipc {
  348. firmware-name = "am335x-bone-scale-data.bin";
  349. };