nsim_700.dts 1.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
  4. */
  5. /dts-v1/;
  6. /include/ "skeleton.dtsi"
  7. / {
  8. model = "snps,nsim";
  9. compatible = "snps,nsim";
  10. #address-cells = <1>;
  11. #size-cells = <1>;
  12. interrupt-parent = <&core_intc>;
  13. chosen {
  14. bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 print-fatal-signals=1";
  15. };
  16. aliases {
  17. serial0 = &uart0;
  18. };
  19. fpga {
  20. compatible = "simple-bus";
  21. #address-cells = <1>;
  22. #size-cells = <1>;
  23. /* child and parent address space 1:1 mapped */
  24. ranges;
  25. core_clk: core_clk {
  26. #clock-cells = <0>;
  27. compatible = "fixed-clock";
  28. clock-frequency = <80000000>;
  29. };
  30. core_intc: interrupt-controller {
  31. compatible = "snps,arc700-intc";
  32. interrupt-controller;
  33. #interrupt-cells = <1>;
  34. };
  35. uart0: serial@f0000000 {
  36. compatible = "ns16550a";
  37. reg = <0xf0000000 0x2000>;
  38. interrupts = <24>;
  39. clock-frequency = <50000000>;
  40. baud = <115200>;
  41. reg-shift = <2>;
  42. reg-io-width = <4>;
  43. no-loopback-test = <1>;
  44. };
  45. arcpct0: pct {
  46. compatible = "snps,arc700-pct";
  47. };
  48. };
  49. };