haps_hs.dts 2.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2016-2014 Synopsys, Inc. (www.synopsys.com)
  4. */
  5. /dts-v1/;
  6. /include/ "skeleton_hs.dtsi"
  7. / {
  8. model = "snps,zebu_hs";
  9. compatible = "snps,zebu_hs";
  10. #address-cells = <2>;
  11. #size-cells = <2>;
  12. interrupt-parent = <&core_intc>;
  13. memory {
  14. device_type = "memory";
  15. /* CONFIG_LINUX_RAM_BASE needs to match low mem start */
  16. reg = <0x0 0x80000000 0x0 0x40000000 /* 1 GB low mem */
  17. 0x1 0x00000000 0x0 0x40000000>; /* 1 GB highmem */
  18. };
  19. chosen {
  20. bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1";
  21. };
  22. aliases {
  23. serial0 = &uart0;
  24. };
  25. fpga {
  26. compatible = "simple-bus";
  27. #address-cells = <1>;
  28. #size-cells = <1>;
  29. /* only perip space at end of low mem accessible
  30. bus addr, parent bus addr, size */
  31. ranges = <0x80000000 0x0 0x80000000 0x80000000>;
  32. core_clk: core_clk {
  33. #clock-cells = <0>;
  34. compatible = "fixed-clock";
  35. clock-frequency = <50000000>;
  36. };
  37. core_intc: interrupt-controller {
  38. compatible = "snps,archs-intc";
  39. interrupt-controller;
  40. #interrupt-cells = <1>;
  41. };
  42. uart0: serial@f0000000 {
  43. compatible = "ns16550a";
  44. reg = <0xf0000000 0x2000>;
  45. interrupts = <24>;
  46. clock-frequency = <50000000>;
  47. baud = <115200>;
  48. reg-shift = <2>;
  49. reg-io-width = <4>;
  50. no-loopback-test = <1>;
  51. };
  52. arcpct0: pct {
  53. compatible = "snps,archs-pct";
  54. #interrupt-cells = <1>;
  55. interrupts = <20>;
  56. };
  57. virtio0: virtio@f0100000 {
  58. compatible = "virtio,mmio";
  59. reg = <0xf0100000 0x2000>;
  60. interrupts = <31>;
  61. };
  62. virtio1: virtio@f0102000 {
  63. compatible = "virtio,mmio";
  64. reg = <0xf0102000 0x2000>;
  65. interrupts = <32>;
  66. };
  67. virtio2: virtio@f0104000 {
  68. compatible = "virtio,mmio";
  69. reg = <0xf0104000 0x2000>;
  70. interrupts = <33>;
  71. };
  72. virtio3: virtio@f0106000 {
  73. compatible = "virtio,mmio";
  74. reg = <0xf0106000 0x2000>;
  75. interrupts = <34>;
  76. };
  77. virtio4: virtio@f0108000 {
  78. compatible = "virtio,mmio";
  79. reg = <0xf0108000 0x2000>;
  80. interrupts = <35>;
  81. };
  82. };
  83. };